JPH08190845A - Semiconductor relay matrix switch - Google Patents

Abstract

PURPOSE: To make a switch system smaller as a whole by using current-held semiconductor relays for crossing point elements in a matrix switch and improving a holding method. CONSTITUTION: A current-held semiconductor relay (a photo MOS relay) PR0-PR8 formed with two control inputs and three contact outputs are arranged in longitudinal and lateral lines to constitute a matrix switch. In the matrix switch, incoming lines Y0-Y2 and outgoing lines X0-X2 are stored to make up a switch system where arbitrary incoming lines and outgoing lines are connected together or opened. When arbitrary crossing point in the matrix switch is closed, the semiconductor relay at the corresponding crossing point is driven by a relay driving control circuit RDC commonly provided. The operation of the semiconductor relay at the crossing point is self-held through the contacts of (electromagnetic) relays R0-R2 prepared in each of the horizontal lines. When the semiconductor relay at the crossing point is reset, the relays R0-R2 are operated by the relay driving control circuit.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor matrix switch, for example, in the case of connecting / disconnecting an input line and an output line, a plurality of semiconductor relays are arranged vertically and horizontally to form a matrix switch. The present invention relates to a semiconductor relay matrix switch which is advantageously used for switching lines.

[0002]

BACKGROUND OF THE INVENTION Matrix switches are used to connect and disconnect (elongate operation such as MDF and IDF) between arbitrary incoming and outgoing lines such as subscriber lines and trunk lines of exchanges. , Used for switching devices for wiring in the floor.

The connection of the input line and the output line of such a device is such that once the connection is established, the connection state is maintained for a long time. For this reason, it is necessary to use a small magnetic latch relay or a pinboard matrix controlled by a robot for the difference element of the switches used to save power, and high reliability in the event of a power failure is also achieved. . Furthermore, as the switch system for connecting the incoming line and the outgoing line becomes large, the difference between the switches becomes very large. Therefore, the magnetic latch relay is also desired to be smaller.

On the other hand, recently, a photo-MOS relay has been developed as a semiconductor relay, which has a very small size, but it is necessary to supply a holding current in order to keep the operation. . Therefore, in the above-mentioned applications, the matrix switch used as a difference element having a configuration capable of sufficiently exhibiting its function from the viewpoint of power saving and ensuring reliability in the event of a power supply failure has been proposed in the past. The current situation is that it has not been done.

In the conventional method, the relay drive control circuit continuously supplies a drive current, or one holding circuit is prepared even if the operation holding circuit is prepared. Things stop at this.

An object of the present invention is to provide a semiconductor relay matrix switch suitable for use in downsizing the entire system by using a semiconductor relay as a difference element of a matrix switch and improving a holding system.

[0007]

According to the semiconductor relay matrix switch of the present invention, a plurality of difference elements are arranged vertically and horizontally to form a matrix switch, and the matrix switch accommodates an input line and an output line, and an arbitrary line is provided. In a switch device that connects or disconnects incoming lines and outgoing lines, when a semiconductor relay is used as the switch difference element and any difference point of the matrix switch is closed, the corresponding difference point is set by the common relay drive control circuit. The semiconductor relay of is closed to close the difference point, and the operation of the semiconductor relay at the difference point is held by self-holding via the contact of the relay provided for each row. A relay provided in each row is operated by the relay drive control circuit to be restored. It is intended.

Further, in the above, the semiconductor relay of the matrix switch is characterized by being a current holding type semiconductor relay having two control inputs and three contact outputs. Further, the present invention is characterized in that the switching contacts of the relays provided for each row are used to control connection of an arbitrary line accommodated in the row to the test line. Further, in the above, the configuration is such that during the line test, the circuit is controlled so as to carry out the line test without using the circuit for holding the operation of the already connected path. Further, the present invention is characterized in that a relay provided for each row or a relay used when a pass operation holding relay is used is a magnetic latch relay. In addition, a plurality of matrix switches are arranged to form a matrix switch group, and the matrix switch group is applied to a two-stage switch configuration. In addition, the power of the circuit for holding the semiconductor relay in operation is switched to the standby power supply when the main power supply of the device fails, so that the operation is maintained, or the power of the circuit for holding the semiconductor relay operation is connected to the standby power supply in advance. In addition, when the standby power source fails, the main power source of the device is switched to hold the operation.

[0009]

In the present invention, a current-holding type photo-MOS relay, which is a semiconductor relay that can be made extremely small, can be used as a difference element of the switch. Even if a matrix switch is formed using such a semiconductor relay, The relay drive control circuit provided in common drives the semiconductor relay at the corresponding difference point to close the difference point, while maintaining the operation of the semiconductor relay at the difference point is self-holding via the relay contact provided for each row. However, the relay system provided in each row can be operated by the relay drive control circuit to restore the semiconductor relay at that point, and the required connection and opening operations can be achieved by the holding method, thus reducing the overall size of the system. You can Further, in the present invention, a semiconductor relay matrix switch is realized in which the relays prepared for each row are used and the switching contacts thereof can be used to perform a line test of an arbitrary line accommodated in the row. Further, in this case, a circuit for holding the operation of the already-connected path is not required during the line test, and the semiconductor matrix switch can be simplified in this respect. Also, if the relay to be prepared for each row, or the relay in the case of using the path operation holding relay, is a magnetic latch relay, it is not necessary to continue driving the relay by the relay drive control circuit during the line test, As a result, the relay drive control circuit provided in common is opened and other control operations can be performed, and a more effective system can be achieved in this respect. Further, in the present invention, a plurality of matrix switches may be arranged side by side to form a matrix switch group, and further, the matrix switch group may be applied to a two-stage type switch configuration, which facilitates a large switch system with many switch differences. Can respond. Further, in the present invention, the power supply of the circuit for holding the operation of the semiconductor relay is switched to the standby power supply prepared separately when the main power supply of the device fails to hold the operation, or the power supply of the holding circuit for the semiconductor relay operation is initially set. The reliability of the switch device can be improved by connecting to the standby power source more and switching to the main power source of the device to maintain the operation when the standby power source fails.

[0010]

Embodiments of the present invention will be described below with reference to the drawings. 1 to 6 show an embodiment of the present invention. Figure 1
The structure of a semiconductor relay that can be used as a difference element of a switch in each embodiment of the present invention including this embodiment will be described.
The illustrated semiconductor relay PR is a photo MO as a current-holding type semiconductor relay composed of two control inputs and three contact outputs.
The S relay is composed of two photodiodes whose energization is controlled on the input side and three phototransistors which are turned on and off on the output side. The operation is a semiconductor relay PR
Only when the control input D1 or D2 (first control input, second control input) is controlled and driven (energized), its contact output C1,
C2, C3 (1st output, 2nd output, 3rd output) is ON
(Conducts).

The semiconductor relay matrix switch is constructed by using the semiconductor relay PR shown in FIG. A semiconductor relay (photo MOS relay)
A plurality of matrix relays are arranged in the lateral example, and as shown in, for example, FIGS. 2 to 4, a plurality of semiconductor relays (PR0 to PR8) are used to arrange the matrix switches in each of the vertical and horizontal columns to form a matrix switch. For example, a switch device that accommodates a subscriber line and a relay line of an exchange and connects or disconnects an incoming line and an outgoing line of an arbitrary line (connection between the incoming line and the outgoing line, opening) is configured. Further, in order to realize the downsizing of the entire system, in addition to introducing such a current holding type photo MOS relay into the switch difference element, the holding method is modified as follows. FIG. 2 is a diagram of a semiconductor relay matrix switch in such a device, showing the configuration of a semiconductor relay control unit (example of vertical 3 × horizontal 3), and FIG. 3 is a diagram showing the same semiconductor relay matrix switch. 4 (vertical 3 × horizontal 3) portion, and FIG. 4 shows the configuration of the semiconductor relay operation holding portion (vertical 3 × horizontal 3) portion in the same semiconductor relay matrix switch configuration diagram. .

The outline of this switch system will be described below.
The system is a relay drive control circuit RD as shown in FIG.
C, and includes the A and B lines of the incoming lines Y0 to Y2 and the A and B lines of the outgoing lines X0 to X2, as shown in FIG. Have. Furthermore, a total of 9 semiconductor relays PR0 to PR8 (3 vertical x 3 horizontal)
In addition, a total of 3 relays R0, one for each row
~ R2 (electromagnetic relay) is provided.

As shown in FIG. 2, the control input D1 of each semiconductor relay is connected to the control line for each of Y0 to Y2 and the control line for each of X0 to X2 of the relay drive control circuit RDC. For example, the terminal of the control input D1 of the semiconductor relay PR0 is connected to the control line for Y0 and the control line for X0, respectively. This also applies to the control inputs D1 of the other semiconductor relays PR1 to PR8 as illustrated. Further, as shown in the figure, each of the control lines on the Y0 to Y2 side and the relays R0 to R2 prepared for each row are arranged.
The relay coil of each of the relays R0 to R2 is connected to the XR side line for use via a diode.

Contact outputs C1 and C of each semiconductor relay
As shown in FIG. 3, reference numeral 2 denotes the structure of the contact portion of the semiconductor relay, and the A and B lines of each incoming line Y0 to Y2 and each outgoing line X0 to X.
It is connected to the 2nd A and B lines. For example, semiconductor relay PR
The contact output C1 of 0 is connected to the A line of the incoming line Y0 and the A line of the outgoing line X0, respectively, and the contact output C2 is connected to the B line of the incoming line Y0 and the B line of the outgoing line X0. Connected respectively. These points also apply to the contact outputs C1 and C2 of the other semiconductor relays PR1 to PR8 as shown in the figure.

Further, the control input D2 and contact output C3 of each semiconductor relay PR0 to PR8, and each relay R0, R1,
The break contacts R0 ⁰ , R1 ⁰ , R2 ⁰ of R2 are connected as shown in FIG. 4 showing the configuration of the semiconductor relay operation holding unit. That is, for example, regarding the semiconductor relay PR0 and the relay R0 on the row side to which the semiconductor relay PR0 belongs, as shown in the figure, the control input D2 and the contact output C3 are connected in series through the resistor R in the power supply line by the power supply E. As well as being inserted, the relay break contact R0 ⁰ is inserted in series. In addition, the remaining two semiconductor relays PR1, PR1 in the row
The same applies to each control input D2 and contact output C3 of PR2. Also, as shown in the figure, another semiconductor relay PR
Control inputs D2 and contact outputs C3 of 3 to PR5 and PR6 to PR8, and break contacts R1 of other relays R1 and R2
The connection relationship with ⁰ and R2 ⁰ also conforms to the above configuration.

In this embodiment, as described above, the current holding type semiconductor relays PR (photo MOS relays) having two control inputs and three contact outputs are arranged in the vertical and horizontal rows to form a matrix switch. , The matrix switch accommodates the incoming lines Y0 to Y2 and the outgoing lines X0 to X2,
It is designed to connect or disconnect any incoming line and outgoing line, and when the current holding type semiconductor relay PR is used as the difference element, the operation method is as follows. Will be realized with. That is, when closing an arbitrary difference point of the matrix switch, the relay drive control circuit RDC provided in common drives the semiconductor relay PR of the corresponding difference point to close the difference point. And
To maintain the operation of the semiconductor relay PR at the difference point, the contacts (R0 ⁰ , R) of the electromagnetic relays R0 to R2 prepared for each row are held.
(1 ⁰ , R2 ⁰ ), when self-holding via the relay drive control circuit RDC, the electromagnetic relays R0 to R2 prepared for each row are restored by the relay drive control circuit RDC. It is a thing.

The operation will be described below with reference to FIGS. (1) The semiconductor relays PR0 to PR8 are controlled by the general-purpose XY relay drive control circuit RDC shown in FIG. FIG. 5 shows a control sequence of the semiconductor relay PR0 of FIG. 2 as an example.

(2) Incoming lines Y0 to Y2, outgoing lines X0 to X
The connection of 2 is connected by the circuit shown in FIG. For example, from the example of (1) above, when the semiconductor relay PR0 is controlled, the semiconductor relays PR0 (C1) and PR0 (C
2) The contact turns ON, the A and B lines of the incoming line Y0 and the outgoing line X
0 lines A and B are connected. That is, the A line of the incoming line Y0 and the A line of the outgoing line X0 are connected, and the B line of the incoming line Y0 and the B line of the outgoing line X0 are connected.

(3) The operation of the semiconductor relay PR thus controlled is held by the circuit shown in FIG. For example, according to the example of the above (1), the operation of the semiconductor relay PR0 is maintained as shown in FIG. 4 by the ground → relay break contact R0 ⁰ → contact C3 of the semiconductor relay PR0 (ON state) → semiconductor relay P
R0 control drive D2 (driving state) → resistance R → power supply E path (operation holding path).

(4) When any difference point is closed and the connection is continued, the operation of the other semiconductor relays in the column and row related to the difference point is not performed (for double and triple connection purposes). If this is not the case).

(5) When the semiconductor relay PR at the difference point is restored, this is done by causing the relay drive control circuit RDC to operate the relays R0 to R2 prepared for each row. For example, from the example of (1) above, the semiconductor relay P
R0 restoration is in the following sequence shown in FIG. The relay R0 in the row to which the semiconductor relay PR0 to be restored belongs is controlled for a certain period of time, and the relay break contact R0 ⁰ shown in FIG. 4 is opened, so that the operation holding path described in (3) above is broken and the semiconductor relay PR0 is restored. The connection between the A and B lines of the incoming line Y0 and the A and B lines of the outgoing line X0 described in (2) above is released.

According to this embodiment, it is possible to connect and disconnect any incoming line and outgoing line as described above. The photo-MOS relay, which is a semiconductor relay used for the difference element in this system, has a very small size.
When the switch system for connecting the incoming line and the outgoing line becomes large, the difference between the switches becomes very large, and a smaller relay is desired for the element to be used, but this example can easily meet this. Even if such a current-holding type photo MOS relay is used for the switch difference element (a current-free holding semiconductor relay may be developed in the future), the holding method should be modified as described above. Thus, the required operation can be realized, the entire system can be downsized, and a practical system can be achieved. In the conventional method, the drive current is continuously flowed in the relay drive control circuit,
Although one holding circuit is prepared even if the operation holding circuit is prepared, in the present embodiment, such a situation can be avoided and the switch device can be realized.

Next, another embodiment of the present invention will be described. In this embodiment, in addition to the above-mentioned embodiment (first embodiment),
Using the switching contacts of the electromagnetic relay R prepared for each row, connect any line accommodated in the row to the line tester,
The purpose is to control so that the line test can be performed.
Further, preferably, in such control, it is intended to realize a semiconductor matrix switch that does not require a circuit for maintaining operation of an already-connected path (a path connecting an arbitrary incoming line and outgoing line) during a line test.

FIGS. 7 to 9 show the present embodiment (second embodiment), respectively.
(Example) In the semiconductor relay matrix switch configuration diagram, a relay control unit including a line test switching control unit (Fig. 7), a relay contact unit including a line test switching unit (Fig. 8), a semiconductor relay operation holding unit (Fig. 9) Shows the configuration of. In the present embodiment, a relay (electromagnetic relay) H driven by a relay drive control circuit RDC is provided in addition to the configurations shown in FIGS. 2 and 3, and A and B of incoming lines Y0 to Y2 are provided.
With respect to the lines, the switching contacts R0 ¹ , R0 ² , R1 ¹ , R1 ² and R2 ¹ , R2 of the relays R0 to R2 for each row described above.
Test line A and line B are connected using 2 ² .
Further, as shown in FIG. 9, a circuit portion including the make contact H ⁰ of the relay H and the diodes D0 to D2 is added to the configuration of FIG.

The outline of the operation in this embodiment is as follows. (21) The relay H shown in FIG. 7 continues to operate during the incoming line test and recovers after the incoming line test. The drive of the relay H is performed by the drive lines of HD and HR of the relay drive control circuit RDC. (22) When the target line is tested, for example, when the incoming line Y0 shown in FIG. 8 is tested, as shown in FIG.
The relay R0 is operated during the test. As a result, FIG.
The relay contacts R0 ¹ , R0 ² shown in FIG.
Then, the incoming line Y0 and the test line are connected, and the incoming line Y0 is tested by the line tester connected to the test line. (23) Incidentally, if the incoming line Y0 is the semiconductor relay PR0.
When it is connected to the outgoing line X0 by operation, the relay make contact H ⁰ shown in FIG.
Semiconductor relay PR even if the relay break contact R0 ⁰ opens
The operation hold of 0 is continued.

(24) Also, after the incoming line YO test is completed,
Sequence control to reactivate the conductor relay PR0
If so, the relay H is unnecessary, and according to this, the above (2
The holding circuit during the test of FIG. 9 shown in 3) is also eliminated. Figure 10
Shows the operation sequence in the case of using the relay H.
On the contrary, in FIG. 11, the case where the relay H is unnecessary is shown.
The operation sequence is shown. In this way,
Switching contact R0 of the electromagnetic relays R0 to R2 prepared for
¹ , R0², R1¹ , R1², R2¹ , R2²Using
, Connect any line accommodated in a row to the line tester,
The line test can be performed and this control
The path already connected (any incoming and outgoing line
It is also possible to eliminate the circuit that holds the operation of the connected path.
However, the present embodiment can be implemented in this manner.
It

The present embodiment can also be implemented in the following modes. That is, in the above control, it is possible to realize a semiconductor matrix switch having a configuration in which a relay (electromagnetic) and a path operation holding (electromagnetic) relay to be prepared for each row are magnetic latch relays. 12
FIG. 3 is a principle diagram of an example of a relay R0 using, for example, a one-winding magnetic latch relay in this case. In this case, when setting (operating) the relay R0, Y0-
XRS drive is performed for a fixed time. On the other hand, when the relay R0 is reset (restored), the Y0-XRR drive is performed for a fixed time.

In this way, the relay H and the relays R0 to R are
If 2 is a magnetic latch relay, it is not necessary to continue driving the relays H and R by the relay drive control circuit RDC during the test, and the relay drive control circuit R commonly provided
DC is open and other control operations can be performed. In that case, the drive circuits and drive sequences of the relays H and R are partially different from those in FIG. 7 and the above figures.

Next, still another embodiment of the present invention will be described. In this embodiment (third embodiment), a matrix switch group is formed by arranging a plurality of matrix switches in the configuration according to the first embodiment or the second embodiment, and further, the matrix switch group is a two-stage switch configuration. Applied to. 13 and 14 show the configuration of this embodiment.
Here, an example based on the second embodiment is shown. FIG. 13 shows a relay contact portion and FIG. 14 shows a semiconductor relay operation holding portion.

FIG. 13 shows three semiconductor relay matrix switches of FIG. 8 (1) as primary switches (PS).
An example of a two-stage switch using the following switches PS0 to PS2) and three secondary switches (SS) (secondary switches SS0 to SS2) is shown. In this figure, the lines A and B are represented by a single line. In addition, each semiconductor relay PR
Illustration of the control unit is omitted. Further, in the case of the present embodiment, the configuration of the operation holding circuit of the semiconductor relay PR may be as shown in FIG. 14, which is a stack of the configurations of the above-mentioned FIG. In this manner, a plurality of semiconductor relay matrix switches may be used to form a matrix switch group, and the matrix switch group may be configured to have a two-stage switch configuration. Can be configured.

Further, in FIG. 14, it is possible to share the contacts of the same R-relay numbers (R0, R1, R2) of the same PS and SS numbers. In that case, when the path is restored, for example, the relay R0 of the primary switch PS2 is operated to restore one of the semiconductor relays PR0 to PR2, but the semiconductor relays PR0 to P2 of the secondary switch SS2 are restored.
If any of R2 is in operation (ON), it is also restored, so that the holding circuit shown in FIG. 15, for example, is required. The same applies when the path on the SS side is restored.

The configuration of FIG. 15 will be supplementarily described. The roles of the illustrated relay contacts H ⁰ and H ¹ are the same as those described above. The relay contact PS ⁰ is the primary switch PS
The secondary switches SS0 to 2 are held by being operated when the paths on the sides 0 to 2 are restored. On the other hand, relay contact SS
⁰ operates in the opposite case, and the primary switches PS0 to PS0
Hold the 2 side. In this embodiment, the elements of the contact H ^{0 in} FIG. 14 may be replaced with the structure shown in FIG.

Next, another embodiment of the present invention will be described. In the present embodiment (fourth embodiment), in addition to the first to third embodiments, the power supply of the circuit for holding the semiconductor relay in operation is switched to a standby power supply prepared separately when the main power supply of the device fails. Hold the operation of the semiconductor relay operation, or connect the power supply of the holding circuit for semiconductor relay operation to the standby power supply from the beginning and switch to the main power supply of the device when the standby power supply fails and hold the operation. , To ensure high reliability in the event of a power failure. 16 and 1
Reference numeral 7 shows the main part configuration of each example of the present embodiment.

In the case of FIG. 16, the configuration of the power source portion by the power source and the resistor as shown in the left part of the figure (eg, FIG. 4).
Etc.) instead of the one shown in the right part of the figure. In FIG. 16, E is the device main power supply, SE is the device auxiliary power supply, S1 is the device main power supply monitoring relay, PC is the instantaneous interruption prevention circuit capacitor at the time of power supply switching, PRR is the same instantaneous interruption prevention circuit resistance, and R is the resistance. , SR is an auxiliary power source resistor, D is a diode, and S is a monitoring relay contact, which are connected as shown in the figure.

In this example, the main power source E of the apparatus is always used to maintain the operation of the semiconductor relay PR, and when the main power source E is abnormal, it is switched to the standby power source SE (as shown in the figure, the monitoring relay contact S
Will switch to the (E) side). According to this, when the main power source E fails, the power source of the circuit for holding the operation of the semiconductor relay can be switched to the separately prepared standby power source to hold the operation, and the reliability of the switch device can be improved.

In the case of FIG. 17, the device auxiliary power supply monitoring relay S2 is used and connected as shown.
In this example, the auxiliary power source SE of the device is always connected to the semiconductor relay P.
It is used for R operation and holding, and is switched to the main power source E side when the auxiliary power source SE is abnormal. In this way, the power supply of the semiconductor relay operation holding circuit may be connected to the standby power supply from the beginning, and when the standby power supply fails, it may be switched to the main power supply of the device to hold the operation. High reliability can be secured. You may implement in such a mode.

[0037]

According to the present invention, a current holding type photo-MOS relay, which is a semiconductor relay that can be made extremely small, can be used as a difference element of a switch, and such a semiconductor relay is used to form a matrix switch. However, the improved holding method can realize the necessary connection and opening operations,
The entire system can be downsized. Therefore, for example, a semiconductor relay matrix switch suitable for a switch device for connecting and disconnecting arbitrary incoming and outgoing lines such as subscriber lines and relay lines of exchanges (long-term operation such as MDF and IDF) and wiring in the floor Can be provided.

Further, according to the present invention, a semiconductor relay matrix switch can be realized in which a relay prepared for each row is used and a switching contact is used to perform a line test of an arbitrary line accommodated in the row. Further, in this case, according to the present invention, it is possible to provide a semiconductor matrix switch that does not require a circuit for holding an operation of an already connected path during a line test, and can simplify the configuration in this respect. Also, if the relay to be prepared for each row, or the relay in the case of using the path operation holding relay, is a magnetic latch relay, it is not necessary to continue driving the relay by the relay drive control circuit during the line test, As a result, the relay drive control circuit provided in common is opened and other control operations can be performed, and a more effective system can be achieved in this respect.

Further, according to the present invention, a matrix switch group can be formed by arranging a plurality of matrix switches, and the matrix switch group can be applied to a two-stage switch structure, and a large switch system with many switch differences. Can be easily dealt with. Further, according to the present invention, the power of the circuit for holding the operation of the semiconductor relay is switched to the standby power prepared separately when the main power supply of the device fails to hold the operation, or the power of the holding circuit for the semiconductor relay operation is turned on. The reliability of the switch device can be improved by connecting to the standby power source from the beginning and switching to the main power source of the device to maintain the operation when the standby power source fails.

[Brief description of drawings]

FIG. 1 is a diagram showing a configuration of an example of a semiconductor relay applicable to the present invention.

FIG. 2 is a diagram showing a configuration of an embodiment of a semiconductor relay matrix switch using the semiconductor relay, and is a diagram showing an example of a configuration of a semiconductor relay control section thereof.

FIG. 3 is also a diagram showing an example of the configuration of the semiconductor relay contact portion.

FIG. 4 is a diagram similarly showing an example of the configuration of the semiconductor relay operation holding unit.

FIG. 5 is a diagram showing a control sequence of a semiconductor relay.

FIG. 6 is a diagram showing a sequence of semiconductor relay restoration.

FIG. 7 is a diagram showing an example of a configuration of a semiconductor relay matrix switch according to another embodiment of the present invention.

FIG. 8 is a diagram showing an example of a configuration of the line test switching unit.

FIG. 9 is a diagram similarly showing an example of the configuration of the semiconductor relay operation holding unit.

FIG. 10 is a diagram showing an operation sequence.

FIG. 11 is a diagram showing an operation sequence for explaining a modification of the example.

FIG. 12 is a main part configuration diagram for explaining another modified example.

FIG. 13 is a diagram showing an example of a configuration of a semiconductor relay matrix switch according to still another embodiment of the present invention.

FIG. 14 is a diagram showing an example of the configuration of the semiconductor relay operation holding circuit.

FIG. 15 is a main part configuration diagram for explaining a modified example of the same example.

FIG. 16 is a diagram which is used for describing a configuration of a main part in still another embodiment of the present invention.

FIG. 17 is also a diagram for explaining the configuration of the main part.

[Explanation of symbols]

PR, PR0 to PR8 Semiconductor relay (photo MOS relay) RDC Relay drive control circuit (XY relay drive control circuit) Y0 to Y2 Incoming line X0 to X2 Outgoing line R Resistance E power supply (device main power supply) R0 to R2 relay ( Electromagnetic relay) H relay (electromagnetic relay) D0 to D2 Diodes PS, PS0 to PS2 Primary switch SS, SS0 to SS2 Secondary switch SE Equipment auxiliary power supply, S1 Equipment main power supply monitoring relay For instantaneous power interruption prevention circuit when switching PC power supply Capacitor PRR Resistance for momentary power interruption circuit at power switching SR resistance D diode S2 Device auxiliary power monitoring relay

Claims (7)

[Claims] 1. A switch for forming a matrix switch by arranging a plurality of difference elements in vertical and horizontal rows, accommodating an incoming line and an outgoing line in the matrix switch, and connecting or disconnecting an arbitrary incoming line and outgoing line. In the device, when a semiconductor relay is used as a switch difference element and an arbitrary difference point of the matrix switch is closed, the relay drive control circuit provided in common drives the semiconductor relay of the corresponding difference point to close the difference point. The operation of the semiconductor relay is held by self-holding via the contact of the relay provided for each row, and when the semiconductor relay at the difference point is restored, the relay provided for each row is controlled by the relay drive control. A semiconductor relay matrix switch characterized by being configured to be operated and restored from a circuit. 2. The semiconductor relay of the matrix switch comprises:
The semiconductor relay matrix switch according to claim 1, wherein the semiconductor relay matrix switch is a current-holding type semiconductor relay having two control inputs and three contact outputs. 3. The configuration according to claim 1, wherein the switching contacts of the relays provided for each row are used to control an arbitrary line accommodated in the row to be connected to the test line. 2. The semiconductor relay matrix switch described in 2. 4. The semiconductor relay according to claim 3, wherein during the line test, the line test is controlled without using a circuit for holding an operation of an already-connected path. Matrix switch. 5. The semiconductor relay matrix switch according to claim 3, wherein the relay provided in each row or the relay used when a path operation holding relay is used is a magnetic latch relay. 6. The matrix switch group is formed by arranging a plurality of matrix switches, and the matrix switch group is applied to a two-stage switch structure. The semiconductor relay matrix switch according to claim 4 or claim 5. 7. A semiconductor relay operation holding circuit is switched to a standby power source when the main power source of the device fails to hold the operation, or a semiconductor relay operation holding circuit power source is previously set to a standby power source. The connection is made, and when the standby power supply fails, the main power supply of the device is switched to hold the operation, and the operation is maintained. Claim 1, Claim 2, Claim 3, Claim 5, or Claim Item 6. A semiconductor relay matrix switch according to Item 6.