JPH08237666A - Inter-frame band compression signal processing device - Google Patents

Abstract

(57) [Summary] [Object] It is an object of the present invention to provide an inter-frame band compression signal processing device capable of performing intra-frame coding processing on an entire screen within a fixed period even if bidirectional prediction is used. I am trying. A frame provided with a band compression means for adaptively repeating a signal processing method for creating an intra-frame coded signal and an inter-frame coded signal for a video signal in accordance with motion evaluation of an input signal. The inter-band compression signal processing device includes a band compression processing unit that uses a P picture that forms a predicted image from past frames and a B picture that forms a predicted image from future frames using an optimum prediction unit, Image is composed of P-pictures and B-pictures, and refresh is performed by forcibly performing intra-frame coding processing on a partial area within the P-picture, and the P-picture within the fixed period covers the entire area of one screen. It is configured to refresh.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an interframe band compression signal processing device for switching a band compression signal obtained by performing an interframe band compression process on a video signal and converting it into a digital signal.

[0002]

2. Description of the Related Art As is well known, when digitally transmitting a video signal, band compression is performed by combining a transmission method using a variable length coding method and a combination of intraframe coding processing and interframe coding processing. Transmission methods are being studied. Among them, a technique for performing band compression by combining intraframe coding processing and interframe coding processing and transmitting the data is described in, for example, the document IEEE Trans.on Broadcasting.
Vol.36 No.4 DEC 1990 Woo Paik: “Digita
Bandwidth compression technology as shown in "compatible HD-TV Broadcast system", and its characteristic parts are explained below.

In FIG. 17, the video signal input to the input terminal 11 is supplied to the subtraction circuit 12 and the motion evaluation circuit 13, respectively. In the subtraction circuit 12, a subtraction process described later is performed, and its output is input to a DCT (discrete cosine transform) circuit 14. The DCT circuit 14 takes in 8 pixels in the horizontal direction and 8 pixels in the vertical direction as a unit block (8 × 8 pixels = 64 pixels), and outputs a coefficient obtained by converting the pixel array from the time axis domain to the frequency domain.

Then, each coefficient is quantized by the quantization circuit 15. In this case, the quantization circuit 15 has 32 types of quantization tables, and each coefficient is quantized based on the selected quantization table. The quantizing circuit 15 is provided with a quantizing table so that the amount of information generated and the amount of information sent are within a certain range.

The coefficient data output from the quantization circuit 15 is zigzag-scanned from the low frequency band to the high frequency band for each unit block, and is extracted.
It is inputted to 6 and variable-length coded by combining the number of zero coefficients (run length) and the non-zero coefficient as one set. The variable length coding circuit 16 is an encoder such as a Huffman code which has a different code length depending on the frequency of occurrence.

The variable-length coded data is F
After being input to an IFO (first-in-first-out) circuit 17 and read at a prescribed speed, a multiplexer (control signal, voice data, sync data (SYNC) for the next stage not shown in the figure is output via an output terminal 18. , NMP, etc., which will be described later] are supplied to the transmission path. The FIFO circuit 17 serves as a buffer that absorbs the difference between the generated code amount and the transmitted code amount because the output of the variable length encoding circuit 16 has a variable rate and the transmission line rate is a fixed rate. There is.

The output of the quantization circuit 15 is input to the inverse quantization circuit 19 and inversely quantized. Further, the output of the inverse quantization circuit 19 is input to the inverse DCT circuit 20 and returned to the original signal. This signal is input to the frame delay circuit 22 via the adder circuit 21. The output of the frame delay circuit 22 is supplied to the motion compensation circuit 23 and the motion evaluation circuit 13, respectively.

The motion evaluation circuit 13 compares the input signal from the input terminal 11 and the output signal of the frame delay circuit 22, detects the overall motion of the image, and the motion compensation circuit 23.
Controls the phase position of the signal output from. In the case of a still image, the original image and the image one frame before are compensated so as to match each other. The output of the motion compensation circuit 23 is the switch 24.
It is also possible to feed the signal to the subtraction circuit 12 via the switch and feed it back to the frame delay circuit 22 from the adder circuit 21 via the switch 25.

Next, the basic operation of the above system will be described. The basic operation of this system includes intraframe coding processing and interframe coding processing. The intraframe coding process is performed as follows. When this process is performed, both switches 24 and 25 are off. The video signal of the input terminal 11 is converted from the time domain to the frequency domain by the DCT circuit 14, and the quantization circuit 15
Is quantized in. This quantized signal is subjected to variable length coding processing and then output to the transmission line via the FIFO circuit 17.

The quantized signal is returned to the original signal by the inverse quantization circuit 19 and the inverse DCT circuit 20, and delayed by the frame delay circuit 22. Therefore, in the intra-frame coding process, it is equivalent to that the information of the input video signal is variable length coded as it is. This intra-frame encoding processing is performed at a scene change of the input video signal or in a predetermined block unit at an appropriate cycle. This cyclic intra-frame encoding process will be described later.

Next, the interframe coding process will be described. When the interframe coding process is executed, both switches 24 and 25 are turned on. Therefore, the subtraction circuit 12 obtains a signal corresponding to the difference between the input video signal and the video signal one frame before. Then, the difference signal is input to the DCT circuit 14, converted from the time domain to the frequency domain, and then quantized by the quantization circuit 15. In addition, since the differential signal and the video signal are added to the frame delay circuit 22 by the adder circuit 21 and input, a predicted video signal that predicts the input video signal from which the differential signal was created is created. Will be entered.

FIG. 18 shows a line signal in a state in which a video signal of a high-definition television signal is subjected to the intra-frame coding process and the inter-frame coding process as described above and sent out on the transmission path. ing. This signal is a signal of a transmission line, and includes a control signal, a voice signal, and a synchronization signal (S
YNC), system control signals, NMNP, etc. are shown in a multiplexed state. FIG. 18A shows the signals of the first line, and FIG. 18B shows the signals of the second and subsequent lines.

If this video signal has been subjected to intra-frame coding processing, a normal video signal can be obtained by inverse conversion. However, in the case of a video signal that has been subjected to interframe coding processing, the difference signal is only reproduced even if this signal is inversely converted. Therefore, a normal video signal can be reproduced by adding the video signal (or the predicted video signal) reproduced one frame before to the difference signal.

According to the above system, all the information in the signal subjected to the intra-frame coding processing is variable length coded,
A signal that has been subjected to inter-frame coding processing in the next frame and thereafter will transmit difference information, which means that band compression is realized.

Next, the definition of a set of pixels processed by the band compression system will be described. That is, a block: an area of 64 pixels composed of 8 pixels in the horizontal direction and 8 pixels in the vertical direction.

Super block: luminance signal in horizontal direction 4
A block is an area composed of four blocks in the vertical direction. This area includes one block as the color signals U and V. The image motion vector obtained from the motion evaluation circuit 13 is included in units of super blocks.

Macroblock: 11 superblocks in the horizontal direction. In addition, when the code is transmitted, the DCT coefficient of the block is converted into a code determined by the number of consecutive zero coefficients and the amplitude of the non-zero coefficient, and these are transmitted as a set to transmit the code of the block. At the end, an EOB (End of Block) signal is added. Then, the motion vector of the motion correction performed in units of super blocks is added and transmitted in units of macro blocks.

With respect to the transmission signal shown in FIG.
Further explanations will be given on particularly relevant matters. First
The line synchronization (SYNC) signal indicates a frame synchronization signal in the decoder, and one timing synchronization signal is used for one frame to generate all timing signals of the decoder. The NMP signal on the first line indicates the number of video data from the end of this signal to the beginning of the macroblock of the next frame.

This is because the code is configured by adaptively switching between the intraframe coding process and the interframe coding process, so that the code amount of one frame differs for each frame, and the position of the code is different. Is different. Therefore, the position of the code corresponding to one frame is indicated by the NMP signal.

Further, the periodic intra-frame coding process is performed as a countermeasure when the user changes the channel. That is, in this band compression system, as described above, 11 super blocks in the horizontal direction are called macro blocks, and 44 super blocks exist in the horizontal direction of one screen. That is, in one frame, there are a total of 240 macroblocks of 4 macroblocks in the horizontal direction and 60 macroblocks in the vertical direction.

In this band compression system, FIG.
9 (a) to (h) and FIGS. 20 (a) to 20 (c), refresh is performed for each vertical row of super blocks in units of four macro blocks, and all the super blocks are refreshed every 11 frame periods. The block is refreshed. That is, as shown in FIG. 20D, the refreshed super block is accumulated for 11 frames, so that the intra-frame encoding process is performed in all the regions.

Therefore, during normal reproduction of, for example, a VTR (video tape recorder) or the like, the above-described intra-frame encoding processing is performed in a cycle of 11 frames, so that a reproduced image can be viewed without any problem. Note that head data is inserted at the beginning of the macro block. In this head data, the motion vector of each super block, the field / frame determination, the PCM / DPCM determination, the quantization level, etc. are collectively inserted.

By the way, the above-mentioned conventional band compression system is used as an encoder for band compression of a television signal, and the decoder is used on the receiving side. Here, recently, as an inter-frame coding process,
It is considered to use so-called bidirectional prediction, in which a difference signal is obtained from the past frame and the future frame by using an optimum prediction means instead of the difference from the frame one frame before (past).

In this case, which frame, past or future, is used as a prediction for prediction even if the above-mentioned refresh is used depends on the image. Therefore, the intraframe coding process is performed on the entire area of one screen within a certain period. There is a problem that it will not be applied. In addition, when performing band compression using bidirectional prediction, the order of images for bidirectional prediction is changed, so it is necessary to restore the order of images when performing decoding processing. There is also the inconvenience that it becomes slow.

[0025]

As described above, when bidirectional prediction is used in the conventional band compression system, the intraframe coding process is not applied to the entire area of one screen within a certain period, and the decoding process is performed. Since the order of the images is restored when performing, there is a problem that the image display becomes slow.

Therefore, the present invention has been made in consideration of the above circumstances, and it is possible to perform intraframe coding processing for the entire screen within a fixed period even if bidirectional prediction is used. An object is to provide a signal processing device. It is another object of the present invention to provide an extremely good interframe band compression signal processing device capable of promptly displaying an image when an input signal of a decoder is switched even if bidirectional prediction is used.

[0027]

SUMMARY OF THE INVENTION An interframe band compression signal processing device according to the present invention includes an intraframe processing signal obtained by performing intraframe coding processing on a video signal using information within the frame, and a frame processing signal. An inter-frame processed signal that has been subjected to inter-frame coding processing using difference information between the signals is created, and a signal having a band compression means that adaptively repeats this signal processing method according to the motion evaluation of the input signal is targeted. I am trying.

Then, a band compression processing means using a P picture which constitutes a predicted image from a past frame and a B picture which constitutes a predicted image from a future frame using an optimum prediction means is provided, and a series of images is formed. A P-picture and a B-picture are formed, and a part of the P-picture is refreshed by forcibly performing the intraframe coding process, and the P-picture within a certain period is refreshed in the entire area of one screen. It is configured as follows.

Further, the inter-frame band compression signal processing device according to the present invention, the intra-frame processed signal obtained by performing the intra-frame coding process on the video signal using the information in the frame, and the difference information between the frames. And an inter-frame processed signal which has been subjected to inter-frame coding processing by using, and a band compression means for adaptively repeating this signal processing method according to the motion evaluation of the input signal.

Then, a P picture in which the predicted image is composed of past frames, and a B picture in which the predicted image is composed of past and future frames using an optimum prediction means,
A band compression processing unit that uses an I-picture that has been subjected to intra-frame coding processing in the entire region of the frame is provided, and the transmission order of the I-picture, P-picture, and B-picture is different from the input-image order during transmission output from the encoder. It is rearranged in order and transmitted, and rearranged again in the decoder. When the input signal to the decoder is switched, when the signal in the intra-frame coded area input to the decoder is transmitted, It is so constructed that the encoded signal is displayed as the output of the decoder in advance.

[0031]

According to the above structure, first, a series of images is composed of P pictures and B pictures, and refresh is performed by forcibly performing the intraframe coding processing on a partial area within the P picture. Since the entire area of one screen is refreshed with P pictures within a certain period, it is possible to perform the intra-frame encoding process on the entire one screen within a certain period even if bidirectional prediction is used. Also, when switching the input signal to the decoder, the intra-frame coded signal is displayed in advance as the output of the decoder when the signal in the intra-frame coded area input to the decoder is transmitted. Therefore, even if bidirectional prediction is used, an image can be quickly displayed when the input signal of the decoder is switched.

[0032]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described in detail below with reference to the drawings. The new block is shown by a double frame in the block diagram.

1. Basic Configuration FIG. 1 shows the basic configuration of the present invention. A luminance signal Y and color signals U and V of a high definition TV (television) or the like are input to the video input terminals 26, 27 and 28. After subjecting these signals to necessary pre-processing, a block having a pixel configuration described later in Chapter 2 is configured by the blocking circuit 29 and input to the input terminal 30 or 11.

1.1 Case of Forward Prediction First, the video signal input to the input terminal 11 is supplied to the subtraction circuit 12 and the motion evaluation circuit 13, respectively. The subtraction circuit 12 performs a subtraction process, which will be described later, and the output thereof is input to a DCT (discrete cosine transform) circuit 14. The DCT circuit 14 has 8 pixels in the horizontal direction and 8 pixels in the vertical direction.
Pixels are taken in as a unit block (8 × 8 pixels = 64 pixels), and a coefficient obtained by converting the pixel array from the time axis domain to the frequency domain is output.

Then, each coefficient is quantized by the quantization circuit 15. In this case, the quantization circuit 15 has 32 types of quantization tables, and each coefficient is quantized based on the selected quantization table. The quantizing circuit 15 is provided with a quantizing table so that the amount of information generated and the amount of information sent are within a certain range.

The coefficient data output from the quantization circuit 15 is zigzag-scanned from the low frequency band to the high frequency band for each unit block and is taken out, and then the variable length coding circuit 1 is selected.
It is inputted to 6 and variable-length coded by combining the number of zero coefficients (run length) and the non-zero coefficient as one set. The variable length coding circuit 16 is an encoder such as a Huffman code which has a different code length depending on the frequency of occurrence.

The variable length coded data is F
After being input to the IFO circuit 17 and read out at a prescribed speed, the multiplexer of the next stage [control signal, audio data, synchronous data (SYNC), output signal of the overhead data generating circuit 31, an output signal from the output terminal 18 will be described later. NMP
Etc.] and is sent to the transmission path.
The FIFO circuit 17 serves as a buffer that absorbs the difference between the generated code amount and the transmitted code amount because the output of the variable length encoding circuit 16 has a variable rate and the transmission line rate is a fixed rate. There is.

The output of the quantization circuit 15 is input to the inverse quantization circuit 19 and inversely quantized. Further, the output of the inverse quantization circuit 19 is input to the inverse DCT circuit 20 and returned to the original signal. This signal is input to the frame delay circuit 22 via the adder circuit 21. The output of the frame delay circuit 22 is supplied to the motion compensation circuit 23 and the motion evaluation circuit 13, respectively.

The motion evaluation circuit 13 compares the input signal from the input terminal 11 with the output signal of the frame delay circuit 22, detects the motion of the image, and detects the phase position of the signal output from the motion compensation circuit 23. Control. In the case of a still image, the original image and the image one frame before are compensated so as to match each other. The output of the motion compensation circuit 23 can be supplied to the subtraction circuit 12 via the switch 24, and can also be fed back from the addition circuit 21 to the frame delay circuit 22 via the switch 25.

Since FIG. 1 has a configuration capable of realizing bidirectional prediction, other blocks are included, but in the case of forward prediction, the output of the motion compensation circuit 23 is input to the switches 24 and 25. Will be configured.

1.2 Case of Bidirectional Prediction MPEG (Moving Picture Image Coding Experts Grou)
For example, bidirectional prediction is used in p). When bidirectional prediction is used, the output of the blocking circuit 29 is first input to the frame rearrangement circuit 33 via the input terminal 30, and then input from the input terminal 11 to the subtraction circuit 12. The operations of the subtraction circuit 12, the DCT circuit 14, the quantization circuit 15, the inverse quantization circuit 19, the inverse DCT circuit 20, and the addition circuit 21 are the same as those described in Section 1.1 Forward prediction.

In the case of bidirectional prediction, the output of the adder circuit 21 is input to the frame memories 34 and 35 corresponding to the frame delay circuit 22 described above. Frame memory 34,
In 35, a signal of a frame necessary for performing bidirectional prediction is stored. That is, with respect to the input image of the input terminal 11, the image of the forward frame and the image of the backward frame are stored. The output of the frame memory 34 is
As in Section 1.1, it is input to the motion compensation circuit 23 and the motion evaluation circuit 13. Frame memory 3
The output of 5 is input to the motion compensation circuit 36, and
It is input to the motion evaluation circuit 13.

The motion evaluation circuit 13 obtains a motion vector (image motion amount) from the forward frame and a motion vector from the backward frame with respect to the input image at the input terminal 11, and outputs the motion vector from the output terminals 37 and 38. Are input to the motion compensation circuits 23 and 36, respectively.

The output signals of the motion compensation circuits 23 and 36 are supplied to the multiplication circuits 39 and 40, respectively, and the predetermined coefficients α,
β (generally α = β = 1/2) is multiplied. Further, the output signals of the multiplication circuits 39 and 40 are added by the addition circuit 41 and input to the selection circuit 42. The selection circuit 42 selects an optimum signal from the forward and backward motion compensation signals and their interpolated signals, and selects the optimum signal as the prediction signal from the switch 24,
Enter in 25.

Next, the basic operation of the above system will be described.

2. The signal input to the pixel configuration input terminal 11 forms a block, a super block, and a macro block by collecting a plurality of effective components in one screen. This configuration is based on DigiCipher
The example is based on MPEG, DSC-HDTV: Zenith + AT
It goes without saying that the block configuration used in the T method or the like may be used.

The definition of the block configuration will be described with reference to FIG.

Block: An area of 64 pixels composed of 8 pixels in the horizontal direction and 8 pixels in the vertical direction [FIG.
See (d)].

Super block: 4 in the horizontal direction of the luminance signal
A block is an area composed of two blocks in the vertical direction. This area includes one block as the color signals U and V. Further, the image motion vector obtained from the motion evaluation circuit 13 can be set in units of super blocks [see FIG. 2 (c)].

Macroblock: 11 superblocks in the horizontal direction. In addition, when the code is transmitted, the DCT coefficient of the block is converted into a code determined by the number of consecutive zero coefficients and the amplitude of the non-zero coefficient, and these are transmitted as a set to transmit the code of the block. Finally, an end of block signal is added. Then, the motion vector of the motion correction performed in units of super blocks is
It is added as overhead data in units of macroblocks and transmitted [see FIG. 2 (b)].

That is, in this band compression system, as described above, the 11 super blocks in the horizontal direction are called macro blocks, and 44 in the horizontal direction of one screen.
Super block exists. That is, in one frame, there are a total of 240 macroblocks of 4 macroblocks in the horizontal direction and 60 macroblocks in the vertical direction.

One screen: 1050 scanning lines, interlaced. The effective pixel is horizontal 14
It is composed of 08 pixels and 960 pixels in the vertical direction. Video signals for one screen are processed by four processors [Fig. 2
(See (a)].

FIG. 3 shows the relationship between one screen and a super block address (hereinafter referred to as SBA = Super Block Address). There are 44 super blocks in the horizontal direction and 60 super blocks in the vertical direction.
Therefore, there are 2640 super blocks in one screen. The address S. B. A. Assign. If the horizontal superblock address is x and the vertical superblock address is y, S.S.
B. A. = 60 · x + y.

3. Intra-frame / inter-frame coding First, the basic operations of this system are intra-frame coding processing and inter-frame coding processing. The intraframe coding process is performed as follows. When this process is performed, both switches 24 and 25 are off. The video signal of the input terminal 11 is converted from the time domain to the frequency domain by the DCT circuit 14 and quantized by the quantization circuit 15. This quantized signal is subjected to variable length coding processing and then output to the transmission line via the FIFO circuit 17.

The quantized signal is returned to the original signal by the inverse quantization circuit 19 and the inverse DCT circuit 20, and is delayed by the frame memory 34. Therefore, in the intra-frame coding process, it is equivalent to that the information of the input video signal is variable length coded as it is. This intra-frame coding process is performed in a proper cycle in units of predetermined blocks and scene changes of the input video signal. This cyclic intra-frame encoding process will be described later.

Next, the interframe coding process will be described. When the interframe coding process is executed, both switches 24 and 25 are turned on. Therefore, the subtraction circuit 12 obtains a signal corresponding to the difference between the input video signal and the video signal one frame before. This difference signal is
It is input to the DCT circuit 14, converted from the time domain to the frequency domain, and then quantized by the quantization circuit 15.

Further, since the differential signal and the video signal are added to the frame memory 34 by the adder circuit 21 and input, a predicted video signal for predicting the input video signal from which the differential signal is generated is created. Will be input.
In general, the generated code amount of an image subjected to intraframe coding processing is larger than the generated code amount of an image subjected to interframe coding processing.

4. Intra-frame / inter-frame switching process 4.1 Image adaptive intra-frame coding process Switching between the intra-frame coding process and the inter-frame coding process is controlled by the intra-frame / inter-frame determination circuit 43. There are two types of control methods. First, according to the first method, inter-frame coding processing is performed when there is correlation between frames depending on the contents of the input video signal, and intra-frame coding processing is performed for signals that have no correlation between frames. Is a method of applying. When a scene change or the like occurs, the intraframe coding process is performed. The intra-frame / inter-frame determination circuit 43 compares the prediction error energy between the current frame signal from the input terminal 11 and the prediction signal output from the motion compensation circuit 23 with the current signal energy.

In FIG. 4, input terminals 11, 44 and 45
And the output terminals 46 and 47 are the input terminals 1 shown in FIG.
1, 44, 45 and output terminals 46, 47 are the same.
The current signal is input to the input terminal 11. This current signal is input to the energy comparison circuit 48 and the subtraction circuit 4
Enter in 9. The prediction signal which is the output of the selection circuit 42 is input to the input terminal 45, and the subtraction circuit 49 calculates the prediction error which is the difference between the current signal and the prediction signal. The energy comparison circuit 48 calculates the energy of the current signal by the current signal energy calculation circuit 48a, calculates the energy of the prediction error by the prediction error energy calculation circuit 48b, and compares the two energies. Examples of formulas for calculating the energy of the current signal and the prediction error are as follows.

[0060]

[Equation 1]

FIG. 5 shows an example of the intra-frame / inter-frame discrimination method in the energy comparison circuit 48. In the figure, the horizontal axis represents the energy of the current signal, and the vertical axis represents the energy of the prediction error. Further, a solid line drawn diagonally from the origin 0 indicates a case where the energy of the prediction error and the energy of the current signal are equal. In the area below this solid line, the energy of the prediction error is smaller, so interframe coding processing is performed. Further, in the area above the solid line, the energy of the current signal is smaller, so that intraframe coding processing is performed. In this way, the energy comparison circuit 48
Outputs an intra-frame / inter-frame discrimination signal adapted to the input signal and is taken out from the output terminal 46 via the adder circuit 50.

4.2 Forced Intra-frame Encoding Processing (Refresh) The second method is a method of forcibly performing the intra-frame encoding processing regardless of the correlation of video signals. In this case, the intraframe coding process is periodically performed on a predetermined area of the screen. There are two purposes for performing this compulsory intra-frame coding process. If the user changes the channel,
It is necessary to be able to recognize the image within a certain period. This is so that special reproduction can be realized in a recording medium such as a VTR or a disc.

The forced execution of the intraframe coding process is called refresh. Also, the time required for refreshing a predetermined area is referred to as the refresh time. As shown in FIG. 4, the periodic refresh timing generating circuit 51 for generating this refresh timing inputs a synchronizing signal (SYNC) from an input terminal 44 and synchronizes with this synchronizing signal to select an intra-frame selection signal at a predetermined period. generate. This signal and the energy comparison circuit 4
By adding the intra-frame / inter-frame discrimination signals of 8 in the adder circuit 50, the intra-frame / inter-frame switching signal is generated and taken out from the output terminal 46.

5. Refresh Refresh of each of the following methods will be described in detail.

5.1 Partial Area Refresh In DigiCipher, as described above, 11 super blocks in the horizontal direction are called macro blocks, and 44 super blocks exist in the horizontal direction of one screen. That is, in one frame, there are a total of 240 macroblocks of 4 macroblocks in the horizontal direction and 60 macroblocks in the vertical direction. Then, in this band compression system, FIGS. 6A to 6H and FIGS.
As shown in (c), refreshing is performed in units of four macroblocks in each vertical column of superblocks, and all the superblocks are refreshed in 11 frame cycles.

That is, as shown in FIG. 7 (d), the refreshed superblocks are accumulated for 11 frames, so that the intraframe coding process is performed in all the regions. The advantage of this refresh is that the capacity of the rate buffer may be small because the refresh is performed uniformly for each frame.

The refreshing of this partial area is shown in FIG. 8 using the super block address shown in FIG. In the figure, the vertical axis represents the super block address, the horizontal axis represents the frame number, and the portion in which r is entered in the square represents the portion subjected to the intraframe coding process. In the figure, only the refresh block is shown. In the figure, refresh is performed in all super blocks of one screen in 11 frames of frame numbers F _{0 to} F ₁₀ . Here, the example used in DigiCipher will be described. Since four processors perform the same processing, the refresh operation per processor in FIG. 8 is used, and FIG. 9 is used in refreshing DigiCipher. explain.

That is, S. B. Address = 0 to 659
Will be described. In FIG. 9A, the portions subjected to the refresh and image adaptive intra-frame coding processing are indicated by squares. Here, r shown in the square represents a refreshed area, s represents a frame in which a scene change has occurred, and i represents an area subjected to intraframe coding processing according to the content of the image. For example, assuming that a scene change has occurred at F ₀ , the S. B. Intra-frame coding processing is performed on all the areas of addresses 0 to 659. Further, in F ₁₄ , S. B. Address 0-5
Intra-frame coding processing has been performed in the area of 9.

FIG. 9B shows the DigiCipher refresh time. Since a part of the area is refreshed per frame and the refresh is completed in the 11-frame period, the 11-frame becomes the refresh time.
Further, in this refresh, the refresh of one screen is completed in any 11 frame period. That is, F
₀ in 11 frame periods to F _10, refresh in 11 frame periods F ₁ to F ₁₁ is completed.

As shown in FIG. 9C, the minimum acquisition time is one frame period and is obtained when the initialization starts when a scene change occurs. Further, the maximum acquisition time in FIG. 9D is a case where the image adaptive intra-frame coding process does not occur at all, and is 11 frame periods. In the case of recording in the VTR and realizing high-speed reproduction using only the refresh block, at each refresh block address, as shown in FIG. Becomes

5.2 Whole Area Refresh First, refresh used in MPEG will be described with reference to FIG. In MPEG, refresh is performed in frame units. The frame that has been refreshed is called an I picture. The cycle of this I picture, that is, the refresh cycle is set in frame units, and 9, 12, 15, ... Frames are selected. This situation will be described with reference to FIG. Figure 10
The area indicated by r in (a) corresponds to an I picture. Note that, for simplicity of explanation, only the case where the scanning line is 1050 will be described, but it goes without saying that other block configurations may be used.

In FIG. 10A, the vertical axis represents the super block address. This super block address corresponds to the super block address defined in FIG. 3 and is indicated by (x, y). The horizontal axis represents the frame number. Also, the portion surrounded by a square indicates a portion that has been refreshed or subjected to intraframe coding processing. Here, frame numbers 0, 9, 18, 27, ...
The area indicated by r in ... Represents a refreshed image corresponding to an I picture, and the square i portion shown in frame number 10 represents a portion subjected to image adaptive intra-frame encoding processing.

In this example, the refresh period is as shown in FIG.
As shown in (b), there are 9 frames. In order to obtain an image on one screen when the user initializes by changing the channel, the intra-frame coding process must be performed on the entire area of one screen. Therefore, this time is defined as follows.

Acquisition time: The time required for the intra-frame coding process to be performed on the entire area of one screen.

This acquisition time also depends on the timing at which the user changes the channel. Figure 10
(C) shows the minimum acquisition time. The minimum acquisition time is when the start of initialization and the refresh or scene change occur at the same time, and one screen image can be obtained in one frame period. FIG. 10D shows the maximum acquisition time. The maximum acquisition time is when initialization is started immediately after the refresh is completed. In this case, one screen image is obtained in 9 frame periods.

Next, in this case, let us consider a case in which special reproduction on a recording medium such as a VTR is attempted to be realized by a refresh block which is a periodic intra-frame encoding process. Since the refresh is basically performed in a cycle of 9 frames, the recording interval of the refresh block of the VTR is 9 frames.

5.3 Constant Interval Partial Area Refresh Next, the refresh used in the present invention will be described with reference to FIG. In addition, in order to simplify the description, FIG.
Although only the case of 1050 scanning lines shown in FIG. 2 will be described, it goes without saying that other block configurations may be used.
In FIG. 11A, the vertical axis shows the super block address. This super block address corresponds to the super block address defined in FIG. 3, and is indicated by (x, y) here. The horizontal axis indicates the frame number.

Also, the portion surrounded by a square indicates a portion that has been subjected to intraframe coding processing such as refresh or image adaptive intraframe coding processing. Here, an area in which r is written in a square indicates a refreshed area, an area in which i is written in a square indicates an area subjected to image adaptive intra-frame coding processing, and an area in which s is written is an image. The area in which the adaptive intra-frame coding processing is performed at the scene change is shown.

In the present invention, the fixed frame interval M (= 3)
Then, a part of the area of one frame is refreshed.
Also, focusing on a part of the region, refresh is performed at a constant cycle L (= 9).

The prediction method will be described. Figure 11
(F) shows the prediction method of each frame. here,
The one denoted by B indicates both directions (Bidirectional), and prediction from the front direction and the rear direction is used. Specifically, the image of frame number 1 in FIG.
The forward prediction using the image of 3 and the backward prediction using the image of frame number 3 are used. In addition, forward prediction is used for images showing PR. That is, if the image is frame number 6, forward prediction using frame number 3 is used.

Here, the relationship of PR of frame number 6 will be described strictly. Super block address (0 to
44, 0 to 19), the image of frame number 0 is first refreshed. The image of frame number 3 is predicted using this, and the image of frame number 6 is predicted using the obtained results. In the area of the super block address (0 to 44, 20 to 39), the frame number 3
Image is refreshed, and the image of frame number 6 is predicted using this. In the area of the super block address (0 to 44, 40 to 59), the frame number 6
The image is constructed by refreshing the image itself.

In FIG. 11A, the refreshed image is the super block address (0-4).
4, 0 to 19), frame numbers 0, 9, 1
, 27, 36, ..., and the super block address (0 to 44, 20 to 39) is the image of frame number 3, 12, 21, 30, 39 ,. (0-44, 40-5
In 9), frame numbers -3, 6, 15, 24,
The image is 33, ...

In this example, the refresh intervals L are all 9 frames. Therefore, as shown in FIG. 11B, the refresh period is 9 frames. However,
The offset of the frame number of 9 frames depends on the super block address. Here, an image obtained by refreshing a partial area of a P picture using only unidirectional prediction is referred to as a PR (Predictive and Refresh) picture.

In order to obtain an image on one screen when the user initializes the screen by changing the channel, the intra-frame coding process must be performed on all the areas on the one screen. Therefore, this time is defined as follows.

Acquisition time: The time required for intra-frame coding processing to be performed on all areas of one screen.
This acquisition time depends on when the user changes channels. FIG. 11D shows the minimum and maximum acquisition times. The minimum acquisition time is when the start of initialization occurs in the PR picture in which the entire frame of one screen is subjected to the intraframe coding process.

As an example of this, when a scene change occurs in a PR picture like the image of frame number -3, a scene change occurs in the image of frame number 16 and an intra-frame occurs in the PR picture of frame number 18. This is the case, for example, when the image with the frame number 16 is predicted by performing the encoding process, the single frame M exists in the frame number 27, and the image with the frame number 30 is subjected to the refresh and the image adaptive intra-frame encoding process.

Further, the maximum acquisition time is the case where the initialization starts after the PR picture and the intraframe coding processing does not occur in the entire area of one screen due to a scene change or the like in this case.
One screen image can be obtained in 9 frames (that is, refresh time).

Next, in the case where the special reproduction is realized by the refresh which is the periodical intra-frame coding processing in the recording / reproducing apparatus such as the VTR, the refresh time is 9 frames as a base and is shown in FIG. 11 (e). High-speed reproduction is realized by arranging the refresh signal within a predetermined position on the recording medium of the recording / reproducing apparatus on the basis of the refresh periods which are deviated in time.

6. Bidirectional prediction In MPEG, bidirectional prediction is used. Bidirectional prediction used here will be described with reference to FIG. In FIG. 12A, the horizontal axis represents the frame number and the vertical axis represents the super block address. This super block address corresponds to the super block address defined in FIG. 3, and here (x,
y). The part surrounded by a square indicates the part subjected to the intraframe coding process. An area in which i is entered in a square is an area subjected to intraframe coding processing, and an area in which i'is entered is an area subjected to image adaptive intraframe coding processing at a scene change.

Next, the prediction method will be described. 12
(B) shows the prediction method of each frame. here,
The one denoted by I indicates that the intra-frame full-frame intra-frame coding process is performed (I picture). Further, what is shown as P indicates that forward prediction is performed (P picture), an image of frame number 3 is an I picture of frame number 0, and an image of frame number 6 is a P picture of frame number 3. Make predictions. Further, what is shown as B indicates bidirectional prediction, and the image of frame number 2 uses two predictions, that is, forward prediction using the image of frame number 0 and backward prediction using the image of frame number 3. .
In both P and B prediction, either I or P image is used for prediction.

In MPEG, as shown in FIG. 12, an I picture interval N [= 9: FIG. 12 (c)] and an I or P interval M [= 3: FIG. 12 (d)] are periodically repeated. It is common to arrange I and P, and the refresh interval is N [= 9:
FIG. 12 (e)] frame, and frame number -3
If a scene change occurs in the image of No., the image is subjected to the image adaptive intra-frame encoding processing, and if a scene change occurs in the image of frame number 13, the image of the frame number 15 is the image adaptive intra-frame encoding. The image of frame number 13 is predicted from this image.

FIG. 12 (f) shows the minimum and maximum acquisition times. The minimum acquisition time is when the start of initialization occurs in an I picture or in a P picture that has undergone intra-frame full-frame intra-frame coding processing. As an example of the latter, there is a case where a scene change occurs in the image of frame number 12, the P picture of frame number 15 is intra-frame coded, and the image of frame number 12 is predicted. The maximum acquisition time is when the initialization starts after the I picture and the scene change does not occur within the refresh period. In this case, one screen image can be obtained in 9 frames of the refresh period.

7. Case of Applying Partial Area Refresh to Bidirectional Prediction A case of applying partial area refresh to bidirectional prediction will be described with reference to FIG. In FIG. 13 (a),
The horizontal axis indicates the frame number, and the vertical axis indicates the super block address. This super block address corresponds to the super block address defined in FIG. 3, and is indicated by (x, y) here. A portion surrounded by a square is an area to be subjected to the intra-frame encoding processing, an area in which r is written indicates a partial area refresh, and an area in which i is written is an image adaptive intra-frame encoding processing.

The portion surrounded by an ellipse indicates a region to which the forward prediction is applied. The arrow indicates the relationship between the reference image and the predicted image, the right arrow indicates the forward prediction, and the left arrow indicates the backward prediction. In the area surrounded by a dotted line, s indicates the scene change area, and M indicates the isolated frame area.

FIG. 13B shows a prediction method for each frame. As described above, first, the P picture is periodically set to the forward prediction over the entire area of one screen (cycle M = 9),
Others are set to B pictures. Partial area refresh is performed only within this P picture. Not applied to B pictures.
In the partial area refresh, the intraframe coding process is performed on the entire area of one screen at a predetermined cycle N (= 9). In this way, the forward prediction image (PR) and the bidirectional prediction image (B) that have been subjected to the partial region refresh are set.

In FIG. 13, the refreshed image is a super block address (0 to 44,0).
19), frame numbers 0, 9, 18, 27, 36, ...
It is an image of ... and the super block address (0-4
4, 20 to 39), frame numbers 3, 12, 21, 3
The images are 0, 39, ..., and the super block address (0 to 44, 40 to 59) is frame number -3,
The images are 6, 15, 24, 33, .... In this example, the refresh intervals N are all 9 frames, and the refresh time is 9 frames [FIG. 13 (d)]. However, the offset of the frame number of 9 frames differs depending on the super block address.

FIG. 13E shows the minimum and maximum acquisition times. The minimum acquisition time is when the internalization occurs in the PR picture which is intra-frame coded in the entire area of one screen. An example of this is
When a scene change occurs in a PR picture like the image of frame number-3, a scene change occurs in the image of frame number 16, and the PR picture of frame number 18 is subjected to intraframe coding processing. For example, when the image of the frame number 16 is predicted, the isolated frame M exists in the frame number 27, and the image of the frame number 30 is subjected to the refresh and the image adaptive intra-frame encoding processing. The maximum acquisition time is when the initialization starts after the PR picture and intraframe coding processing does not occur in the entire area of one screen due to a scene change or the like. In this case, 9
A frame (ie, refresh time) provides a full screen image.

8. Relationship with Scene Change According to the present invention, when a scene change occurs,
By combining partial area refresh in the P picture and scene change, there is an advantage of reducing the generated code amount. This will be described with reference to FIG. In FIG. 14, I is the intra-frame coding process, P is the forward prediction, and B is the forward prediction.
Is an image to which bidirectional prediction is applied, and PR is an image to which partial area refresh is applied to the image of the forward prediction processing of the present invention. Here, the case where the I picture interval N = 9 and the I and P picture interval M = 3 will be described, but it goes without saying that other configurations may be used.

The generated code amount in each processing is assumed to be intraframe coding processing 80, unidirectional prediction 30, and bidirectional prediction 21. In this case, the generated code amount when the partial region refresh is performed on the image of the forward prediction process of the present invention is 3 in this case.
Since it refreshes the entire area of one screen at a time, 80x
(1/3) + 30 × (2/3) = 46.7.

In the conventional case, the generated code amount in one refresh period (9 frames) is 266 [FIG.
(A)]. Then, when a scene change occurs in the image of frame number 1, the P picture of frame number 3 is subjected to the image adaptive intra-frame coding process in the entire area of one screen (I), and the images of frame numbers 1 and 2 are displayed. Uses only backward prediction (P ') using the image of frame number 3, and the generated code amount in one refresh period is 334.
It becomes [FIG.14 (b)].

In the case of the present invention, the generated code amount in one refresh period is 266 as in the conventional case [FIG. 14 (c)].
Is. When a scene change occurs in the image of frame number 1, the same process as the conventional process is performed. For this reason,
Since the PR picture of the frame number 3 is subjected to the image adaptive intra-frame encoding process, the image of the frame number 3 is used for the one-screen whole area intra-frame encoding process (I) and the images of the frame numbers 1 and 2. Only backward prediction (P ') will be used. The generated code amount in one refresh period at this time is 317.4 [FIG. 14 (d)]. This also makes it possible to reduce the amount of generated code. further,
The amount of code generated at the peak can be reduced, and the capacity of the rate buffer can be reduced.

A case where a scene change occurs will be described with reference to FIG. When a scene change occurs in the image of frame number -3, this image is a PR picture, so the area that is not partially refreshed is subjected to the image adaptive intra-frame encoding process, and the intra-frame code is applied to the entire area of one screen. The chemical treatment is applied. When a scene change occurs in the image of frame number 16, frame number 1
The PR picture of the image of 8 is subjected to the image adaptive intra-frame coding process, and the entire area of one screen is subjected to the intra-frame coding process. Using this image, the images of frame numbers 16 and 17 use only backward prediction.

When an isolated frame exists in the frame number 23, this image is a B picture, and therefore, only this image is subjected to the image adaptive intra-frame coding process. If an isolated frame exists in frame number 27, this image is a PR picture, so not only is this image subjected to image adaptive intra-frame coding processing, but the image of frame number 30 also uses the isolated frame as a reference for prediction. The image of the frame numbers 28 and 29, which cannot be used and have been subjected to the image adaptive intra-frame encoding process, use only the backward prediction using the image of the frame number 30.

9. Decoder Processing for Bidirectional Prediction Partial Area Refresh A case of using bidirectional prediction will be described with reference to FIG. When the input image is processed by the prediction method as shown in FIG. 15A, in order to perform the bidirectional prediction of the B picture, it is necessary to process the image that comes after the image itself. For example, in order to perform bidirectional prediction of the B ₂ image, the I ₀ and P ₃ images are required as shown in FIG.
Therefore, the images to be transmitted to the decoder are exchanged as shown in FIG. In addition, the decoder output images must naturally be in the same order as the input images [Fig. 15 (d)]. Therefore, the acquisition time is as shown in FIG.

Next, the case of the present invention will be described with reference to FIG. In FIG. 16, the horizontal axis represents the frame number and the vertical axis represents the super block address. This super block address corresponds to the super block address defined in FIG. Here, an image having such a block configuration will be described, but it goes without saying that another configuration may be used.

When the input image is processed by the prediction method as shown in FIG. 16 (a), the images are replaced for the same reason as described above, and the order is as shown in FIG. 16 (b). When this is decoded, as shown in FIG. 16C, the super block address (0 to 44, 0-1) is added to the third frame.
R ₀ is output to the area of 9), and thereafter, this area is B ₁ , B
₂ and P ₃ and the images in the correct order are output. In the sixth frame, the super block address (0 to 44,
20 to 39), R ₃ is output to the area, and thereafter, in the area of the super block address (0 to 44, 0 to 39), B ₄ ,
The images in the correct order are output as B ₅ , P ₆ , .... Further, in the ninth frame, R ₆ is output to the area of the super block address (0 to 44, 40 to 59).
After that, the image is output in the entire screen area.

FIG. 16D shows the display method of the present invention. In the present invention, the refresh area is displayed first, and this area is held until the next necessary image arrives. Therefore, in the 0th frame, the super block address (0 to 4) is displayed.
R ₀ is displayed in the area of 4, ₀ to 19), and B ₁ is held for 4 frames sent. After 4 frames, the areas of the super block addresses (0 to 44, 0 to 19) are B ₁ , B ₂ , and B ₃ in the correct order, and the areas of the super block addresses (0 to 44, 20 to 39) are Hold R ₃ . R ₆ is displayed in the area of the super block address (0 to 44, 40 to 59) in the 6th frame. Here, the image is displayed in the entire area of one screen although it is not a complete image.

After the 7th frame, the super block address (0 to 44, 0 to 39) area displays images in the correct order of B ₄ , B ₅ and P _6, and the super block address (0 to 44, 40 to 59). Area ₆ ) retains R ₆ . 9
For the first time in the frame, the correct image is displayed in the entire area of one screen, and the correct image is displayed thereafter. It takes the same time as that shown in FIG. 16C to actually display the correct image in the entire area, but the present invention has an advantage that the image is displayed earlier.

FIG. 16 (e) shows the acquisition time. When the initialization starts at the time point a, in the conventional case, the entire surface area is displayed at the 9th frame, so the acquisition time becomes 10 frames.
In the present invention, since the entire area of one screen is displayed at the 6th frame, the acquisition time becomes 7 frames, which is 3 frames earlier than the conventional one. Similarly, when the initialization is started at b, it is 11 frames in the conventional case, 8 frames in the present invention, and when the initialization is started in c, it is 12 frames in the conventional case, and 9 frames are the acquisition time in the present invention. The present invention is 3
The frame gets faster.

The present invention is not limited to the above-described embodiments, but can be variously modified and implemented without departing from the scope of the invention.

[0111]

As described above, according to the configuration of the present invention, even when bidirectional prediction is used, refreshing a part of the area within a P picture enables the entire area of one screen within a certain period. Since the intra-frame coding process can be performed on, the periodic refresh can be realized. Further, this refresh can suppress an increase in the amount of generated code due to the image adaptive intra-frame coding processing caused by a scene change or the like.

Further, according to the present invention, when the signal subjected to the inter-frame band compression using the bidirectional prediction and the image exchange is performed is subjected to the decoding process, the input to the decoder is performed at the time of switching the input signal. The image in the area that has been subjected to the intra-frame coding process is decoded and displayed at that time, so that the image can be displayed quickly. This also speeds up acquisition time.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of an interframe band compression signal processing device according to the present invention.

FIG. 2 is a diagram for explaining an image area in the embodiment.

FIG. 3 is a diagram shown for explaining a super block address in the embodiment.

FIG. 4 is a block configuration diagram showing details of an intra-frame / inter-frame determination circuit in the embodiment.

FIG. 5 is a diagram for explaining intra-frame / inter-frame determination characteristics in the same embodiment.

FIG. 6 is a diagram shown for explaining refresh in the embodiment.

FIG. 7 is a diagram shown for explaining refresh in the embodiment.

FIG. 8 is a diagram for explaining partial area refresh in the embodiment.

FIG. 9 is a diagram for explaining partial area refresh per processor in the embodiment.

FIG. 10 is a diagram shown for explaining whole area refresh in the embodiment.

FIG. 11 is a diagram for explaining constant interval partial area refresh in the embodiment.

FIG. 12 is a diagram shown for explaining bidirectional prediction in the embodiment.

FIG. 13 is a diagram for explaining a case where the same partial area refresh is performed by bidirectional prediction.

FIG. 14 is a diagram for explaining a generated code amount.

FIG. 15 is a diagram for explaining the replacement of images.

FIG. 16 is a diagram shown for explaining the processing of the decoder of the present invention.

FIG. 17 is a block diagram showing a conventional band compression system.

FIG. 18 is a diagram showing a signal format transmitted from the conventional system.

FIG. 19 is a diagram showing refresh blocks that can be reproduced in frames 1 to 8 during normal reproduction in the conventional system.

FIG. 20 is a diagram showing refreshable blocks that can be reproduced in frames 9 to 11 during normal reproduction in the conventional system.

[Explanation of symbols]

11 ... Input terminal, 12 ... Subtraction circuit, 13 ... Motion evaluation circuit, 14 ... DCT circuit, 15 ... Quantization circuit, 16 ... Variable length coding circuit, 17 ... FIFO circuit, 18 ... Output terminal,
19 ... Inverse quantization circuit, 20 ... Inverse DCT circuit, 21 ... Addition circuit, 22 ... Frame delay circuit, 23 ... Motion compensation circuit,
24, 25 ... Switches, 26-28 ... Image input terminals, 2
9 ... Blocking circuit, 30 ... Input terminal, 31 ... Overhead data generating circuit, 32 ... Multiplexer, 33 ...
Frame order rearrangement circuit, 34, 35 ... Frame memory, 36 ... Motion compensation circuit, 37, 38 ... Output terminal, 3
9, 40 ... Multiplication circuit, 41 ... Addition circuit, 42 ... Selection circuit, 43 ... In-frame / interval determination circuit, 44, 45 ... Input terminal, 46, 47 ... Output terminal, 48 ... Energy comparison circuit, 49 ... Subtraction circuit , 50 ... Adder circuit, 51 ... Periodic refresh timing generation circuit.

Claims (2)

[Claims] 1. An intra-frame processed signal obtained by subjecting a video signal to intra-frame encoding processing using information within a frame and an inter-frame encoded signal subjected to inter-frame encoding processing using difference information between frames. In the inter-frame band compression signal processing device having a band compression means for creating a processed signal and adaptively repeating this signal processing method according to the motion evaluation of the input signal, a prediction image is composed of past frames.
A band compression processing unit that uses a picture and a B picture that forms a predicted image from a future frame by using an optimum prediction unit is provided, and a series of images is composed of a P picture and a B picture, and within the P picture. The inter-frame band is configured such that refresh is performed by forcibly performing the intra-frame coding processing on a part of the area of P and the entire area of one screen is refreshed by P pictures within a certain period. Compressed signal processing device. 2. An intra-frame processed signal obtained by subjecting a video signal to intra-frame encoding processing using information within a frame, and an inter-frame encoded signal subjected to inter-frame coding processing using difference information between frames. In the inter-frame band compression signal processing device having a band compression means for creating a processed signal and adaptively repeating this signal processing method according to the motion evaluation of the input signal, a prediction image is composed of past frames.
A band compression processing unit using a picture, a B picture that forms a predicted image from past and future frames using an optimal prediction unit, and an I picture that has been subjected to intraframe coding processing over the entire region of the frame, During transmission output from the encoder, the transmission order of I pictures, P pictures, and B pictures is rearranged and transmitted in an order different from the input image order, and rearranged again by the decoder. Switching of input signals to the decoder At the time, when the signal of the intra-frame coded area input to the decoder is transmitted, the intra-frame coded signal is displayed in advance as the output of the decoder. Inter-frame band compression signal processing device.