JPH08298636A - Television receiver with built-in video tape recorder - Google Patents

Television receiver with built-in video tape recorder

Info

Publication number
JPH08298636A
JPH08298636A JP7102768A JP10276895A JPH08298636A JP H08298636 A JPH08298636 A JP H08298636A JP 7102768 A JP7102768 A JP 7102768A JP 10276895 A JP10276895 A JP 10276895A JP H08298636 A JPH08298636 A JP H08298636A
Authority
JP
Japan
Prior art keywords
tuner
built
tape recorder
video tape
vtr
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7102768A
Other languages
Japanese (ja)
Inventor
Koji Seki
孝司 関
Kiyoshi Hayata
潔 早田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP7102768A priority Critical patent/JPH08298636A/en
Publication of JPH08298636A publication Critical patent/JPH08298636A/en
Pending legal-status Critical Current

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  • Television Receiver Circuits (AREA)

Abstract

(57)【要約】 【目的】 VTR内蔵テレビジョン受像機の消費電力の
低減を図る。 【構成】 VTR内蔵テレビジョン受像機の動作モード
をマイクロコンピュータ10で検知し、その動作モード
に必要でないチューナの電源をOFFにする電源スイッ
チ回路9を設けた。
(57) [Abstract] [Purpose] To reduce the power consumption of a television receiver with a built-in VTR. [Structure] A power switch circuit 9 is provided for detecting an operation mode of a television receiver with a built-in VTR by a microcomputer 10 and turning off a power supply of a tuner which is not required for the operation mode.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】この発明は、ビデオテープレコー
ダ(以下、「VTR」という)を内蔵したテレビジョン
(以下、「TV」という)受像機の省電力化に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to power saving of a television (hereinafter referred to as "TV") receiver incorporating a video tape recorder (hereinafter referred to as "VTR").

【0002】[0002]

【従来の技術】図6は従来のVTR内蔵TV受像機の映
像信号系とチューナ電源系を示すブロック回路図で、1
はTV受像機に内蔵されているTV用チューナ、2はV
TRに内蔵されているVTR用チューナ、3はTV用チ
ューナ1およびVTR用チューナ2に給電するチューナ
用電源、4はVTRで再生されたビデオ信号の入力端
子、5は外部入力信号の入力端子、6は切換回路で、T
V用チューナ1の受信信号,VTR用チューナ2の受信
信号,再生ビデオ信号および外部入力信号のいずれかを
視聴者の選択によって切り換える。7は切換回路6から
入力された信号を処理する映像信号処理回路、8は表示
装置である。
2. Description of the Related Art FIG. 6 is a block circuit diagram showing a video signal system and a tuner power supply system of a conventional TV receiver with a built-in VTR.
Is a tuner for TV built in the TV receiver, 2 is V
VTR tuner built in TR, 3 is a tuner power supply for supplying power to TV tuner 1 and VTR tuner 2, 4 is an input terminal for a video signal reproduced by the VTR, 5 is an input terminal for an external input signal, 6 is a switching circuit, T
Any of the reception signal of the V tuner 1, the reception signal of the VTR tuner 2, the reproduced video signal, and the external input signal is switched by the viewer's selection. Reference numeral 7 is a video signal processing circuit for processing the signal input from the switching circuit 6, and 8 is a display device.

【0003】[0003]

【発明が解決しようとする課題】従来のVTR内蔵TV
受像機では、TV受像機の電源がONになると、チュー
ナ電源3からTV用チューナ1およびVTR用チューナ
2に給電される状態となる。このため、TV放送を受信
しているときでもVTR用チューナ2は動作状態であ
り、また、VTRが再生状態のときでもTV用チューナ
1およびVTR用チューナ2は動作状態となるので、無
駄な電力が消費されていた。
[Problems to be Solved by the Invention] Conventional TV with built-in VTR
In the receiver, when the power of the TV receiver is turned on, the tuner power supply 3 supplies power to the TV tuner 1 and the VTR tuner 2. For this reason, the VTR tuner 2 is in the operating state even when receiving the TV broadcast, and the TV tuner 1 and the VTR tuner 2 are in the operating state even when the VTR is in the reproducing state. Was being consumed.

【0004】この発明は上記のような問題点の解消を目
的としてなされたもので、不必要なチューナの電源をO
FFすることにより省電力化を図ることを目的とする。
The present invention has been made for the purpose of solving the above-mentioned problems, and an unnecessary power source for a tuner is turned on.
The purpose is to save power by performing FF.

【0005】[0005]

【課題を解決するための手段】この発明は、TV放送の
受信時にはVTR用チューナへの給電を停止し、また、
VTRの再生時には、TV用チューナおよびVTR用チ
ューナへの給電を停止する手段を備えたものである。
The present invention stops power supply to a VTR tuner when receiving a TV broadcast, and
When the VTR is reproduced, a means for stopping the power supply to the TV tuner and the VTR tuner is provided.

【0006】[0006]

【作用】この発明によれば、VTR内蔵TV受像機の動
作モードに応じて、不要なチューナの電源を自動的にO
FFにすることができる。
According to the present invention, an unnecessary tuner power source is automatically turned on according to the operation mode of the TV receiver with a built-in VTR.
It can be FF.

【0007】[0007]

【実施例】【Example】

実施例1.図1はこの発明の一実施例のブロック回路図
で、図6と同一符号はそれぞれ同一または相当部分を示
しており、9は電源スイッチ回路で、スイッチ回路9a
〜9fで構成されている。10はTV受像機の動作モー
ドに応じて電源スイッチ回路9のON,OFFを制御す
るマイクロコンピュータで、図2に示すように、TV受
信時はHレベルの第1のスイッチング信号aをスイッチ
回路9a〜9cに出力し、VTR用チューナで受信した
信号を録画する時はHレベルの第2のスイッチング信号
bをスイッチ回路9a〜9fに出力し、その他の動作モ
ード時には、第1,第2のスイッチング信号a,bをL
レベルにする。
Example 1. FIG. 1 is a block circuit diagram of an embodiment of the present invention, in which the same reference numerals as those in FIG. 6 denote the same or corresponding parts, and 9 is a power switch circuit, which is a switch circuit 9a.
.About.9f. Reference numeral 10 denotes a microcomputer that controls ON / OFF of the power switch circuit 9 according to the operation mode of the TV receiver. As shown in FIG. 2, during TV reception, the first switching signal a of H level is sent to the switch circuit 9a. To 9c, and outputs the second switching signal b of H level to the switch circuits 9a to 9f when recording the signal received by the VTR tuner, and outputs the first and second switching signals in other operation modes. Signals a and b are L
To level.

【0008】図3はスイッチ回路9a〜9fの構成を示
す図で、スイッチ回路9a〜9fは同様に構成され、同
様に動作するので、ここではスイッチ回路9aを例に示
している。図3において、11はスイッチング信号の入
力端子、Q1,Q2はトランジスタ、R1〜R4は抵抗
器で、入力端子11にHレベルのスイッチング信号が入
力されたときはQ1がONとなり、ついでQ2がONと
なって電源出力端子12に電源電圧が印加される。他
方、入力端子11がLレベルのときはQ1がOFF,Q
2もOFFとなって、出力端子12には電源電圧が印加
されない。
FIG. 3 is a diagram showing the configuration of the switch circuits 9a to 9f. Since the switch circuits 9a to 9f have the same configuration and operate in the same manner, the switch circuit 9a is shown here as an example. In FIG. 3, 11 is a switching signal input terminal, Q1 and Q2 are transistors, and R1 to R4 are resistors. When an H level switching signal is input to the input terminal 11, Q1 is turned on, and then Q2 is turned on. Then, the power supply voltage is applied to the power supply output terminal 12. On the other hand, when the input terminal 11 is at L level, Q1 is OFF, Q
2 is also turned off, and the power supply voltage is not applied to the output terminal 12.

【0009】この結果、TV受信時にはTV用チューナ
1のみに電源電圧が供給されて作動し、受信したTV放
送信号を切換回路6に入力する。他方、VTR用チュー
ナ2には電源電圧が印加されないので、省電力化が図れ
るとともに、二つのチューナの動作時に生じる高周波電
波の相互干渉により表示画面上に表れるビート信号が生
じるのを防止できる副次的な結果も得られる。
As a result, at the time of receiving a TV, the power supply voltage is supplied only to the TV tuner 1 to operate, and the received TV broadcast signal is input to the switching circuit 6. On the other hand, since the power supply voltage is not applied to the VTR tuner 2, power saving can be achieved, and a beat signal appearing on the display screen due to mutual interference of high frequency radio waves generated when the two tuners operate can be prevented. Results can also be obtained.

【0010】実施例2.実施例1では、TV用チューナ
1とVTR用チューナ2を別に設けた例を説明したが、
一つのチューナをTV用とVTR用に共用したVTR内
蔵TV受像機の場合にも同様に適用できる。
Embodiment 2. In the first embodiment, an example in which the TV tuner 1 and the VTR tuner 2 are separately provided has been described.
The same can be applied to the case of a TV receiver with a built-in VTR in which one tuner is commonly used for TV and VTR.

【0011】図4は実施例2のブロック回路図で、図1
と同一符号はそれぞれ同一または相当部分を示してお
り、13はTV/VTR共用のチューナで、マイクロコ
ンピュータ10は、動作モードに応じて図5に示すよう
に、TV受信時、およびVTR録画時にHレベルのスイ
ッチング信号cを出力し、その他の動作モード時にはL
レベルにする。このため、TV/VTR共用チューナ1
3はTV受信時とVTR録画時だけ動作し、ビデオテー
プレコーダ再生動作時にはTV/VTR共用チューナ1
3への電源はOFFされているので、省電力化が図れ
る。
FIG. 4 is a block circuit diagram of the second embodiment.
The same reference numerals denote the same or corresponding parts, and 13 is a tuner commonly used for TV / VTR. As shown in FIG. 5, the microcomputer 10 has an H level when receiving a TV and recording a VTR. Outputs the level switching signal c, and L in other operation modes.
To level. Therefore, TV / VTR common tuner 1
3 operates only during TV reception and VTR recording, and TV / VTR common tuner 1 during video tape recorder playback operation
Since the power to 3 is turned off, power saving can be achieved.

【0012】[0012]

【発明の効果】以上のように、この発明によれば、TV
受像機に内蔵しているチューナが、作動する必要がある
場合にのみチューナ電源から給電されるので、省電力化
したVTR内蔵TV受像機が得られる効果がある。
As described above, according to the present invention, the TV
Since the tuner built in the receiver is supplied with power from the tuner power source only when it is necessary to operate, a TV receiver with a built-in VTR with reduced power consumption can be obtained.

【図面の簡単な説明】[Brief description of drawings]

【図1】 この発明の実施例1のブロック回路図であ
る。
FIG. 1 is a block circuit diagram of a first embodiment of the present invention.

【図2】 実施例1の動作モードとスイッチング信号の
関係を示す図である。
FIG. 2 is a diagram showing a relationship between an operation mode and a switching signal according to the first embodiment.

【図3】 実施例1のスイッチ回路を示す図である。FIG. 3 is a diagram illustrating a switch circuit according to a first exemplary embodiment.

【図4】 この発明の実施例2のブロック回路図であ
る。
FIG. 4 is a block circuit diagram of a second embodiment of the present invention.

【図5】 実施例2の動作モードとスイッチング信号の
関係を示す図である。
FIG. 5 is a diagram showing a relationship between an operation mode and a switching signal according to the second embodiment.

【図6】 従来のVTR内蔵TV受像機の映像信号系と
チューナ電源系を示すブロック回路図である。
FIG. 6 is a block circuit diagram showing a video signal system and a tuner power supply system of a conventional TV receiver with a built-in VTR.

【符号の説明】[Explanation of symbols]

1 TV用チューナ、2 VTR用チューナ、3 チュ
ーナ電源、4 再生ビデオ信号入力端子、5 外部信号
入力端子、6 切換回路、7 映像信号処理回路、8
表示装置、9 電源スイッチ回路、9a〜9f スイッ
チ回路、10 マイクロコンピュータ、13 TV/V
TR共用チューナ。
1 TV tuner, 2 VTR tuner, 3 tuner power supply, 4 playback video signal input terminal, 5 external signal input terminal, 6 switching circuit, 7 video signal processing circuit, 8
Display device, 9 power switch circuit, 9a-9f switch circuit, 10 microcomputer, 13 TV / V
TR shared tuner.

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】 複数の動作モードが選択可能なチューナ
を内蔵したビデオテープレコーダ内蔵テレビジョン受像
機において、選択された動作モードの動作に不要な内蔵
チューナへの電源をOFFにする手段を備えたビデオテ
ープレコーダ内蔵テレビジョン受像機。
1. A television receiver with a built-in video tape recorder having a tuner capable of selecting a plurality of operation modes, comprising means for turning off the power supply to the built-in tuner which is unnecessary for the operation in the selected operation mode. A television receiver with a built-in video tape recorder.
【請求項2】 テレビジョン用チューナとビデオテープ
レコーダ用チューナを内蔵したビデオテープレコーダ内
蔵テレビジョン受像機において、テレビジョン放送受信
動作時に上記ビデオテープレコーダ用チューナへの電源
をOFFにする手段を備えたことを特徴とするビデオテ
ープレコーダ内蔵テレビジョン受像機。
2. A television receiver with a built-in video tape recorder having a television tuner and a video tape recorder tuner, comprising means for turning off the power supply to the video tape recorder tuner during a television broadcast receiving operation. A television receiver with a built-in video tape recorder.
【請求項3】 テレビジョンおよびビデオテープレコー
ダ共用のチューナを備えたビデオテープレコーダ内蔵テ
レビジョン受像機において、ビデオテープレコーダの再
生動作時に上記チューナへの電源をOFFにする手段を
備えたことを特徴とするビデオテープレコーダ内蔵テレ
ビジョン受像機。
3. A television receiver with a built-in video tape recorder equipped with a tuner for both a television and a video tape recorder, comprising means for turning off the power to the tuner when the video tape recorder is in a reproducing operation. A television receiver with a built-in video tape recorder.
JP7102768A 1995-04-26 1995-04-26 Television receiver with built-in video tape recorder Pending JPH08298636A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7102768A JPH08298636A (en) 1995-04-26 1995-04-26 Television receiver with built-in video tape recorder

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7102768A JPH08298636A (en) 1995-04-26 1995-04-26 Television receiver with built-in video tape recorder

Publications (1)

Publication Number Publication Date
JPH08298636A true JPH08298636A (en) 1996-11-12

Family

ID=14336357

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7102768A Pending JPH08298636A (en) 1995-04-26 1995-04-26 Television receiver with built-in video tape recorder

Country Status (1)

Country Link
JP (1) JPH08298636A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1998037693A1 (en) * 1997-02-19 1998-08-27 Sanyo Electric Co., Ltd. Television receiver
JP2002209156A (en) * 2001-01-09 2002-07-26 Sharp Corp Display device and recording / playback system
JP2006025031A (en) * 2004-07-06 2006-01-26 Toshiba Corp Portable broadcast receiver
JP2007096846A (en) * 2005-09-29 2007-04-12 Sharp Corp TV receiver
US7437577B2 (en) 2004-07-21 2008-10-14 Kabushiki Kaisha Toshiba Information processing apparatus and power consumption control method
JP2010056831A (en) * 2008-08-28 2010-03-11 Sharp Corp Display system and video output device

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1998037693A1 (en) * 1997-02-19 1998-08-27 Sanyo Electric Co., Ltd. Television receiver
GB2337679A (en) * 1997-02-19 1999-11-24 Sanyo Electric Co Television receiver
GB2337679B (en) * 1997-02-19 2001-05-09 Sanyo Electric Co Television receiver
US6731346B1 (en) 1997-02-19 2004-05-04 Sanyo Electric Co., Ltd. Television receiver
JP2002209156A (en) * 2001-01-09 2002-07-26 Sharp Corp Display device and recording / playback system
JP2006025031A (en) * 2004-07-06 2006-01-26 Toshiba Corp Portable broadcast receiver
US7437577B2 (en) 2004-07-21 2008-10-14 Kabushiki Kaisha Toshiba Information processing apparatus and power consumption control method
JP2007096846A (en) * 2005-09-29 2007-04-12 Sharp Corp TV receiver
JP2010056831A (en) * 2008-08-28 2010-03-11 Sharp Corp Display system and video output device

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