JPH08330137A - Multilayer inductor - Google Patents

Multilayer inductor

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Publication number
JPH08330137A
JPH08330137A JP15694095A JP15694095A JPH08330137A JP H08330137 A JPH08330137 A JP H08330137A JP 15694095 A JP15694095 A JP 15694095A JP 15694095 A JP15694095 A JP 15694095A JP H08330137 A JPH08330137 A JP H08330137A
Authority
JP
Japan
Prior art keywords
laminated
conductor
pattern
winding
inductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15694095A
Other languages
Japanese (ja)
Inventor
Mitsugi Kawarai
貢 川原井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tokin Corp
Original Assignee
Tokin Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokin Corp filed Critical Tokin Corp
Priority to JP15694095A priority Critical patent/JPH08330137A/en
Publication of JPH08330137A publication Critical patent/JPH08330137A/en
Pending legal-status Critical Current

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Abstract

(57)【要約】 【目的】 小型で、体積が小さくとも、高いインダクタ
ンス値が得られ、信頼性の高い積層インダクタを提供す
ること。 【構成】 積層インダクタの巻線を、内径が異なり、重
複することのない導体2aからなる巻線パターンとセラ
ミックス部1aとを交互に形成することにより、導体間
の距離(絶縁性)を確保し、磁路長さの増加を抑えたま
ま、高い導体巻数を得る。
(57) [Abstract] [Purpose] To provide a highly reliable laminated inductor which is small in size, has a high inductance value even if the volume is small. [Structure] The windings of the laminated inductor are formed by alternately forming a winding pattern made of conductors 2a having different inner diameters and not overlapping with each other, and a ceramic portion 1a, thereby ensuring a distance (insulation) between the conductors. A high number of conductor turns can be obtained while suppressing an increase in magnetic path length.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、電子部品として使用さ
れる積層インダクタに関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a laminated inductor used as an electronic component.

【0002】[0002]

【従来の技術】近年、電子機器の小型化によりインダク
タンス素子に対しても、同一特性のままで小型化が要求
されている。インダクタンス素子の小型化のためには、
積層インダクタンス素子の設計上、磁路断面積の減少に
より、インダクタンス値が低下するため、その低下分を
巻数を増やすことで補う必要がある。
2. Description of the Related Art In recent years, due to the miniaturization of electronic equipment, miniaturization of an inductance element with the same characteristics is required. In order to miniaturize the inductance element,
In the design of the laminated inductance element, the inductance value decreases due to the decrease in the magnetic path cross-sectional area, so it is necessary to compensate for the decrease by increasing the number of turns.

【0003】一般に、積層インダクタでは、内径の等し
い巻線を積層形成しており、導体は、積層方向に対して
一列に並んでいる。
Generally, in a laminated inductor, windings having the same inner diameter are laminated and formed, and the conductors are arranged in a line in the laminating direction.

【0004】このようなインダクタにおいては、素子の
インダクタンスは、セラミックスの透磁率と巻線数、即
ち、導体とセラミックス層の積層数によって調整されて
おり、特に、巻線数によって細かく素子のインダクタン
スが決定されている。
In such an inductor, the inductance of the element is adjusted by the magnetic permeability of the ceramics and the number of windings, that is, the number of laminated layers of the conductor and the ceramics. In particular, the inductance of the element is finely adjusted by the number of windings. It has been decided.

【0005】この巻数、即ち、積層数は、高インダクタ
ンス素子では10ターンから50ターンに及ぶものがあ
る。
The number of turns, that is, the number of layers, may range from 10 to 50 turns in a high inductance element.

【0006】[0006]

【発明が解決しようとする課題】しかしながら、従来の
積層インダクタでは、積層数を多くして巻数を増やす
と、導体間の絶縁性確保、及び線間容量の低減のため、
導体巻線1ターンあたりの積層厚(導体間距離は約15
μm以上)は変えられないから、巻数増に伴って磁路長
さが増え、容易に高いインダクタンス値が得られないと
いう問題がある。
However, in the conventional laminated inductor, if the number of layers is increased and the number of turns is increased, insulation between conductors is ensured and line capacitance is reduced.
Layer thickness per turn of conductor winding (distance between conductors is about 15
.mu.m or more) cannot be changed, so that there is a problem that the magnetic path length increases as the number of turns increases, and a high inductance value cannot be easily obtained.

【0007】又、高いインダクタンス値を得るために
は、極めて高い積層数が必要となり、素子のコストが極
めて高くなるという問題点がある。
Further, in order to obtain a high inductance value, an extremely high number of layers is required, which causes a problem that the cost of the element becomes extremely high.

【0008】本発明の目的は、小型で体積が小さくと
も、高いインダクタンス値が得られ、信頼性の高い積層
インダクタを提供することにある。
An object of the present invention is to provide a highly reliable laminated inductor which can obtain a high inductance value even if it is small and has a small volume.

【0009】[0009]

【課題を解決するための手段】本発明では、内径が異な
り、重複することのない巻線パターンの導体巻線を交互
に形成することにより、導体間の距離(絶縁性)を確保
し、磁路長さの増加を抑えたまま、高い導体巻数を得、
小型でインダクタンス値の高い積層インダクタ素子を得
るものである。
According to the present invention, the conductor windings having different inner diameters and having non-overlapping winding patterns are alternately formed to secure a distance (insulating property) between the conductors. Obtaining a high number of conductor turns while suppressing the increase in path length,
It is intended to obtain a small-sized laminated inductor element having a high inductance value.

【0010】即ち、本発明は、絶縁性セラミックス粉
末、及び銀、あるいは導電性粉末をペースト化し、これ
を印刷法によって積層し、導電体の積層巻線を形成し、
これを同時焼成した積層インダクタにおいて、絶縁性セ
ラミックス層を挟んで、パターン間の接合部を除いて、
重複することのない巻線パターンを交互に形成し、積層
焼成することを特徴とする積層インダクタである。
That is, according to the present invention, insulating ceramic powder and silver or conductive powder are made into a paste, which is laminated by a printing method to form a laminated winding of a conductor.
In a multilayer inductor that was fired at the same time, sandwiching the insulating ceramic layer, excluding the joint between the patterns,
The laminated inductor is characterized in that winding patterns that do not overlap each other are alternately formed and laminated and fired.

【0011】[0011]

【作用】積層インダクタの巻線を、内径が異なり、重複
することのない巻線パターンを交互に形成することによ
り、導体間の距離(絶縁性)を確保し、磁路長さの増加
を抑えたまま、高い導体巻数を得ることができる。その
結果、小型でインダクタンス値の高い積層インダクタ素
子が得られる。
[Function] The windings of the laminated inductor are alternately formed with winding patterns having different inner diameters and not overlapping to secure a distance (insulation) between conductors and suppress an increase in magnetic path length. It is possible to obtain a high number of turns of the conductor. As a result, a multilayer inductor element having a small size and a high inductance value can be obtained.

【0012】[0012]

【実施例】本発明の実施例の積層インダクタについて、
図面を用いて説明する。
EXAMPLES Regarding the laminated inductor of the example of the present invention,
This will be described with reference to the drawings.

【0013】セラミックス粉末として、フェライト粉末
を用意した。粉末の平均粒径は、約1μmである。この
粉末をバインダー、溶剤と表1の比率で配合し、配合物
を3本ロールで混練して磁性部用ペーストを作製した。
Ferrite powder was prepared as the ceramic powder. The average particle size of the powder is about 1 μm. This powder was mixed with a binder and a solvent in the ratios shown in Table 1, and the mixture was kneaded with a three-roll mill to prepare a magnetic portion paste.

【0014】 [0014]

【0015】導電体層用粉末として、平均粒径0.5μ
mのAg粉末を用意した。この粉末を表2の比率でバイ
ンダー、溶剤と配合し、配合物を3本ロールで混練し
て、導電体層用ペーストを作製した。
The powder for the conductor layer has an average particle size of 0.5 μm.
m Ag powder was prepared. This powder was mixed with a binder and a solvent in the ratios shown in Table 2, and the mixture was kneaded with a three-roll mill to prepare a conductor layer paste.

【0016】 [0016]

【0018】次に、作製した磁性部用ペーストを、印刷
法により所定の厚さ(0.5mm)に積層した。
Next, the produced magnetic portion paste was laminated by a printing method to a predetermined thickness (0.5 mm).

【0019】その上に、図1(a)のパターンの導体2
a(約10μm厚)を形成し、更に、図1(b)のパタ
ーンで磁性部を10μm厚で形成した。次に、図1
(c)パターンの導体2a(約10μm厚)を形成し、
更に、図1(d)のパターンでセラミックス部1aを1
0μm厚で形成した。次に、図1(e)のパターンの導
体2aを形成し、更に、図1(b)のパターンでセラミ
ックス部1aを10μm厚で形成した。
On top of that, the conductor 2 of the pattern of FIG.
a (about 10 μm thick) was formed, and further, a magnetic portion was formed with a thickness of 10 μm in the pattern of FIG. Next, FIG.
(C) Form the conductor 2a (about 10 μm thick) of the pattern,
Further, the ceramic portion 1a is formed into a pattern with the pattern of FIG.
It was formed with a thickness of 0 μm. Next, the conductor 2a having the pattern shown in FIG. 1 (e) was formed, and further, the ceramic portion 1a was formed to have a thickness of 10 μm in the pattern shown in FIG. 1 (b).

【0020】この要領で、パターン図1(c)−図1
(d)−図1(e)−図1(b)で積層を繰り返し、積
層巻線を形成した。
In this manner, the pattern shown in FIG. 1 (c) -FIG.
(D) -FIG. 1 (e) -FIG. 1 (b) was repeatedly laminated to form a laminated winding.

【0021】重なり合う導体間(同一パターン)の距離
は、20μmとなる。
The distance between the overlapping conductors (same pattern) is 20 μm.

【0022】最終導体として、図1(d)パターンの後
に、図1(f)パターンの導体を形成し、その上に、セ
ラミックス部を、同じく印刷法により所定の厚さ(0.
5mm)に積層した。
As a final conductor, a conductor having the pattern shown in FIG. 1F is formed after the pattern shown in FIG. 1D, and a ceramic portion is formed on the conductor with a predetermined thickness (0.
5 mm).

【0023】この時、積層巻線のターン数を10ターン
から50ターンまで変えていった。
At this time, the number of turns of the laminated winding was changed from 10 to 50.

【0024】上記作製した積層体を所定の大きさ(2m
m×1.5mm)に切断した。
The above-prepared laminated body is made to have a predetermined size (2 m
m × 1.5 mm).

【0025】図2に、積層体の構成として、上記積層素
子の断面図を示す。1はセラミックス層、2は導体巻線
部からなる積層インダクタである。
FIG. 2 shows a cross-sectional view of the above-mentioned laminated element as the structure of the laminated body. Reference numeral 1 is a ceramic layer, and 2 is a laminated inductor including a conductor winding portion.

【0026】上記積層、切断した積層体を脱バインダー
後、900℃で同時焼成を行った。
After the above laminated and cut laminated body was debindered, it was co-fired at 900 ° C.

【0027】実施例では、900℃で焼成を行ったが、
焼成温度は、およそ850℃〜900℃の範囲であれば
良い。
Although firing was performed at 900 ° C. in the examples,
The firing temperature may be in the range of approximately 850 ° C to 900 ° C.

【0028】上記焼成した積層体に、導電体の積層巻線
のリードが露出している面に、Agを主成分とした導電
性ペーストを塗布し、約300℃で焼き付けを行い、外
部電極を形成した。
On the surface of the fired laminated body where the leads of the laminated winding of the conductor are exposed, a conductive paste containing Ag as a main component is applied and baked at about 300 ° C. to form an external electrode. Formed.

【0029】上記のように作製した積層インダクタの周
波数とインダクタンスとの関係を、YHP製インピーダ
ンスアナライザーHP4191Aを用いて評価した。
The relationship between the frequency and the inductance of the laminated inductor manufactured as described above was evaluated using an impedance analyzer HP4191A manufactured by YHP.

【0030】(比較例)粉末のペースト化までは、実施
例と同一方法で作製した。作製した磁性部用ペーストを
印刷法により所定の厚さ(0.5mm)に積層した。
(Comparative Example) The same method as in the example was prepared until the powder was made into a paste. The produced magnetic portion paste was laminated by a printing method to a predetermined thickness (0.5 mm).

【0031】その上に、図3(a)のパターンの導体2
a(約10μm厚)を形成し、更に、図3(b)のパタ
ーンでセラミックス部1aを10μm厚で形成した。次
に、図3(c)パターンの導体2a(約10μm厚)を
形成し、更に、図3(d)のパターンでセラミックス部
1aを10μm厚で形成した。次に、図3(e)のパタ
ーンの導体2aを形成し、更に、図3(b)のパターン
でセラミックス部1aを10μm厚で形成した。
On top of that, the conductor 2 of the pattern of FIG.
a (about 10 μm thick) was formed, and further, the ceramic portion 1a was formed with a thickness of 10 μm in the pattern of FIG. 3 (b). Next, a conductor 2a having a pattern of FIG. 3C (thickness of about 10 μm) was formed, and further, a ceramic portion 1a having a thickness of 10 μm was formed by the pattern of FIG. 3D. Next, the conductor 2a having the pattern of FIG. 3 (e) was formed, and further, the ceramic portion 1a was formed to have a thickness of 10 μm in the pattern of FIG. 3 (b).

【0032】この要領で、パターン図3(c)−図3
(d)−図3(e)−図3(b)で積層を繰り返し、積
層巻線を形成した。
In this way, the pattern of FIG. 3 (c) -FIG.
(D) -FIG. 3 (e) -FIG. 3 (b) was repeatedly laminated to form a laminated winding.

【0033】導体間の距離は、実施例と等しく、20μ
mである。
The distance between the conductors is the same as that of the embodiment and is 20 μm.
m.

【0034】最終導体として、図3(b)パターンの後
に、図3(f)パターンの導体を形成し、その上に、セ
ラミックス部を、同じく印刷法により所定の厚さ(0.
5mm)に積層した。
As a final conductor, a conductor of the pattern shown in FIG. 3 (f) is formed after the pattern of FIG. 3 (b), and a ceramic portion is formed on the conductor with a predetermined thickness (0.
5 mm).

【0035】この時、積層巻線のターン数を10ターン
から50ターンまで変えて行った。
At this time, the number of turns of the laminated winding was changed from 10 to 50.

【0036】ここでは、1/2ターンピッで積層巻線を
形成したが、3/4ターンピッチ等、他のピッチでの積
層方法でも積層巻線の内径が一定であれば、同一であ
る。
In this case, the laminated winding is formed with 1/2 turn pitch, but it is the same even if the inner diameter of the laminated winding is constant even in the laminating method with other pitches such as 3/4 turn pitch.

【0037】実施例と同様に、上記作製した積層体を所
定の大きさ(2mm×1.5mm)に切断した。
Similar to the example, the laminated body prepared above was cut into a predetermined size (2 mm × 1.5 mm).

【0038】図4に、積層体の構成として、上記積層素
子の断面図を示す。1はセラミックス部、2は導体であ
り、セラミック層と導体巻線部からなる積層インダクタ
である。
FIG. 4 shows a cross-sectional view of the above-described laminated element as the structure of the laminated body. Reference numeral 1 is a ceramic portion, 2 is a conductor, and is a laminated inductor including a ceramic layer and a conductor winding portion.

【0039】以下、実施例と同様に、作製した積層イン
ダクタの周波数とインダクタンスとの関係をYHP製イ
ンピーダンスアナライザーHP4191Aを用いて評価
した。
The relationship between the frequency and the inductance of the manufactured laminated inductor was evaluated using an impedance analyzer HP4191A manufactured by YHP, as in the examples.

【0040】図5は、実施例と比較例で作製した積層イ
ンダクタのターン数とインダクタンスの関係を示す図で
ある。Aは実施例であり、Bは比較例である。この図5
より、実施例で示したように、内径が異なり、重複する
ことのない巻線パターンを交互に形成することにより、
従来の同一内径のパターンの積層巻線を形成した場合に
比べて、同一巻数で50〜70%高いインダクタンスが
得られることがわかる。
FIG. 5 is a diagram showing the relationship between the number of turns and the inductance of the laminated inductors manufactured in the example and the comparative example. A is an example and B is a comparative example. This Figure 5
Therefore, as shown in the embodiment, by forming winding patterns having different inner diameters and not overlapping with each other,
It can be seen that an inductance higher by 50 to 70% can be obtained with the same number of turns as compared with the conventional case where a laminated winding having a pattern with the same inner diameter is formed.

【0041】又、同一のインダクタンスを得るために
は、例えば、30μHのインダクタンスを得るために
は、従来方法である比較例では50ターンの積層巻線で
あるのに対し、実施例では30ターンの積層巻線でよい
ことがわかる。これは、積層工程が製造コストの大部分
を占める積層型インダクタにおいては、飛躍的なコスト
ダウンをもたらすものである。
Further, in order to obtain the same inductance, for example, to obtain an inductance of 30 μH, in the comparative example which is the conventional method, the laminated winding has 50 turns, whereas in the embodiment, the winding has 30 turns. It turns out that laminated winding is sufficient. This brings about a dramatic cost reduction in a laminated inductor in which the lamination process occupies most of the manufacturing cost.

【0042】本実施例では、セラミックス粉末にフェラ
イト粉末を用いたが、これ以外のセラミックス粉末で
も、900℃以下で焼成可能なセラミックスであれば、
同様の効果が得られる。
In this example, ferrite powder was used as the ceramic powder, but other ceramic powders can be used as long as they can be fired at 900 ° C. or lower.
The same effect can be obtained.

【0043】又、本実施例では、表1及び表2の配合比
でペーストを作製したが、これ以外の成分、配合比でも
印刷可能なペーストが得られるものであれば良い。
Further, in this embodiment, the pastes were prepared with the compounding ratios shown in Tables 1 and 2, but any component and compounding ratio other than these may be used as long as a printable paste can be obtained.

【0044】又、本実施例では、配合物の混練に3本ロ
ールを用いたが、これ以外にもホモジナイザーやサンド
ミル等を用いても良い。
Further, in this embodiment, the three rolls were used for kneading the blend, but other than this, a homogenizer, a sand mill or the like may be used.

【0045】[0045]

【発明の効果】以上、説明したように、本発明は、内径
が異なり、重複することのない巻線パターンを交互に積
層して、積層巻線を形成することにより、同一積層数で
従来に比べ、小型で高いインダクタンスが得られ、信頼
性が高い積層インダクタが得られた。
As described above, according to the present invention, by forming the laminated winding by alternately laminating the winding patterns which have different inner diameters and do not overlap each other, it is possible to realize the same number of conventional windings. In comparison, a compact, high inductance, and highly reliable multilayer inductor was obtained.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の実施例の積層インダクタの積層工程に
おける導体及びセラミックスのパターンを示す平面図。
図1(a)は導体パターンを示す平面図。図1(b)は
セラミックスパターンを示す平面図。図1(c)は導体
パターンを示す平面図。図1(d)はセラミックスパタ
ーンを示す平面図。図1(e)は導体パターンを示す平
面図。図1(f)は導体パターンを示す平面図。
FIG. 1 is a plan view showing conductor and ceramic patterns in a lamination process of a laminated inductor according to an embodiment of the present invention.
FIG. 1A is a plan view showing a conductor pattern. FIG. 1B is a plan view showing a ceramic pattern. FIG. 1C is a plan view showing a conductor pattern. FIG. 1D is a plan view showing a ceramic pattern. FIG. 1E is a plan view showing a conductor pattern. FIG. 1F is a plan view showing a conductor pattern.

【図2】本発明の実施例で積層したインダクタ断面の導
体の積層状態を示す平面図。
FIG. 2 is a plan view showing a laminated state of conductors of an inductor cross section laminated in an example of the present invention.

【図3】比較例の積層インダクタの積層工程における導
体及びセラミックスのパターンを示す平面図。図3
(a)は導体パターンを示す平面図。図3(b)はセラ
ミックスパターンを示す平面図。図3(c)は導体パタ
ーンを示す平面図。図3(d)はセラミックスパターン
を示す平面図。図3(e)は導体パターンを示す平面
図。図3(f)は導体パターンを示す平面図。
FIG. 3 is a plan view showing patterns of conductors and ceramics in a lamination process of a laminated inductor of a comparative example. FIG.
(A) is a top view which shows a conductor pattern. FIG. 3B is a plan view showing a ceramic pattern. FIG. 3C is a plan view showing a conductor pattern. FIG. 3D is a plan view showing a ceramic pattern. FIG. 3E is a plan view showing a conductor pattern. FIG. 3F is a plan view showing the conductor pattern.

【図4】比較例で積層したインダクタ断面の導体の積層
状態を示す平面図。
FIG. 4 is a plan view showing a laminated state of conductors of an inductor cross section laminated in a comparative example.

【図5】実施例と比較例の積層巻線のターン数とインダ
クタンスの関係を示す図。
FIG. 5 is a diagram showing the relationship between the number of turns and the inductance of the laminated winding of the example and the comparative example.

【符号の説明】[Explanation of symbols]

1 セラミックス層 1a セラミックス部 2 導体巻線部 2a 導体 A 実施例 B 比較例 1 Ceramics Layer 1a Ceramics Part 2 Conductor Winding Part 2a Conductor A Example B Comparative Example

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 絶縁性セラミックス粉末及び銀、あるい
は銅の導電性粉末をペースト化し、これを印刷法によっ
て積層し、導電体の積層巻線を形成し、これを同時焼成
した積層インダクタにおいて、絶縁性セラミックス層を
挟んで、パターン間の接合部を除いて、重複することの
ない巻線パターンを交互に形成し、積層焼成することを
特徴とする積層インダクタ。
1. A laminated inductor in which an insulating ceramic powder and a conductive powder of silver or copper are made into a paste, which is laminated by a printing method to form a laminated winding of a conductor, and which is co-fired to obtain insulation. A laminated inductor characterized by alternately forming winding patterns which do not overlap each other except for a joint portion between the patterns, sandwiching a conductive ceramics layer, and performing laminated firing.
JP15694095A 1995-05-30 1995-05-30 Multilayer inductor Pending JPH08330137A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15694095A JPH08330137A (en) 1995-05-30 1995-05-30 Multilayer inductor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15694095A JPH08330137A (en) 1995-05-30 1995-05-30 Multilayer inductor

Publications (1)

Publication Number Publication Date
JPH08330137A true JPH08330137A (en) 1996-12-13

Family

ID=15638679

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15694095A Pending JPH08330137A (en) 1995-05-30 1995-05-30 Multilayer inductor

Country Status (1)

Country Link
JP (1) JPH08330137A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2005055254A1 (en) * 2003-12-05 2005-06-16 Fdk Corporation Multilayer inductor and its manufacturing method
WO2008016089A1 (en) * 2006-08-01 2008-02-07 Nec Corporation Inductor element, inductor element manufacturing method, and semiconductor device with inductor element mounted thereon
EP2017858A3 (en) * 2007-06-11 2009-08-05 Würth Elektronik Pforzheim GmbH & Co. KG Paste for establishing inductivity
JP2020047894A (en) * 2018-09-21 2020-03-26 Tdk株式会社 Laminated coil parts

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2005055254A1 (en) * 2003-12-05 2005-06-16 Fdk Corporation Multilayer inductor and its manufacturing method
WO2008016089A1 (en) * 2006-08-01 2008-02-07 Nec Corporation Inductor element, inductor element manufacturing method, and semiconductor device with inductor element mounted thereon
US8339230B2 (en) 2006-08-01 2012-12-25 Renesas Electronics Corporation Inductor element, inductor element manufacturing method, and semiconductor device with inductor element mounted thereon
JP5373397B2 (en) * 2006-08-01 2013-12-18 ルネサスエレクトロニクス株式会社 Inductor element, manufacturing method thereof, and semiconductor device mounted with inductor element
US9923045B2 (en) 2006-08-01 2018-03-20 Renesas Electronics Corporation Inductor element, inductor element manufacturing method, and semiconductor device with inductor element mounted thereon
US10192951B2 (en) 2006-08-01 2019-01-29 Renesas Electronics Corporation Inductor element, inductor element manufacturing method, and semiconductor device with inductor element mounted thereon
EP2017858A3 (en) * 2007-06-11 2009-08-05 Würth Elektronik Pforzheim GmbH & Co. KG Paste for establishing inductivity
JP2020047894A (en) * 2018-09-21 2020-03-26 Tdk株式会社 Laminated coil parts

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