JPH084066B2 - Semiconductor single crystal growth method - Google Patents

Semiconductor single crystal growth method

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Publication number
JPH084066B2
JPH084066B2 JP60074371A JP7437185A JPH084066B2 JP H084066 B2 JPH084066 B2 JP H084066B2 JP 60074371 A JP60074371 A JP 60074371A JP 7437185 A JP7437185 A JP 7437185A JP H084066 B2 JPH084066 B2 JP H084066B2
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Japan
Prior art keywords
plane
layer
heating source
single crystal
insulating layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Japanese (ja)
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JPS61234026A (en
Inventor
正 西村
Original Assignee
工業技術院長
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/29—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by the substrates
    • H10P14/2926—Crystal orientations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/38—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by treatments done after the formation of the materials
    • H10P14/3802—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
    • H10P14/382—Scanning of a beam
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/29—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by the substrates
    • H10P14/2901—Materials
    • H10P14/2902—Materials being Group IVA materials
    • H10P14/2905—Silicon, silicon germanium or germanium
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/32—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by intermediate layers between substrates and deposited layers
    • H10P14/3202—Materials thereof
    • H10P14/3238—Materials thereof being insulating materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/32—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by intermediate layers between substrates and deposited layers
    • H10P14/3242—Structure
    • H10P14/3244—Layer structure
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/34—Deposited materials, e.g. layers
    • H10P14/3402—Deposited materials, e.g. layers characterised by the chemical composition
    • H10P14/3404—Deposited materials, e.g. layers characterised by the chemical composition being Group IVA materials
    • H10P14/3411—Silicon, silicon germanium or germanium
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/34—Deposited materials, e.g. layers
    • H10P14/3451—Structure
    • H10P14/3452—Microstructure
    • H10P14/3458—Monocrystalline
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/34—Deposited materials, e.g. layers
    • H10P14/3466—Crystal orientation
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/38—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by treatments done after the formation of the materials
    • H10P14/3802—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
    • H10P14/3808—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth using laser beams
    • H10P14/3814—Continuous wave laser beam
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/38—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by treatments done after the formation of the materials
    • H10P14/3802—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
    • H10P14/3818—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth using particle beams

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  • Recrystallisation Techniques (AREA)

Description

【発明の詳細な説明】 〔産業上の利用分野〕 この発明は、単結晶シリコン基板上に形成された開口
部を有する絶縁層上に被着された多結晶シリコン層を、
基板シリコンの結晶領域を種としてエピタキシャル的に
単結晶化させる絶縁層上における半導体単結晶成長方法
の改良に関するものである。Description: TECHNICAL FIELD The present invention relates to a polycrystalline silicon layer deposited on an insulating layer having an opening formed on a single crystal silicon substrate,
The present invention relates to an improvement in a method for growing a semiconductor single crystal on an insulating layer which is epitaxially single-crystallized using a crystal region of substrate silicon as a seed.

〔従来の技術〕[Conventional technology]

従来から、レーザビームを用いて絶縁層上の多結晶シ
リコン層を再結晶化する方法は、新しい構造の半導体装
置の基礎技術として注目されてきた。中でも、T.I.のH.
W.LAM等（ECS Meeting,1980年 Extended abstract）
によって発表されたラテラルシーディング法は、第４図
に示すように、基板結晶を種として絶縁層上に結晶成長
を生ぜしめることから、結晶方位が完全に決定され、理
想的な結晶成長技術とされている。この手法は国内では
特公昭42−12087号公報に記載されているように、既に
公知となっている。しかし原理的に優れていると考えら
れたこの手法は実際には成功をおさめていない。これ
は、従来ラテラルシーディング法には主として、（00
1）面のシリコン結晶が基板として用いられたこと、及
び横方向、即ち熱源の走査方向と直角方向の熱分布制御
を行なっていないことの２つの原因によるものである。Conventionally, a method of recrystallizing a polycrystalline silicon layer on an insulating layer by using a laser beam has received attention as a basic technique for a semiconductor device having a new structure. Among them, TI H.
W.LAM, etc. (ECS Meeting, 1980 Extended abstract)
As shown in FIG. 4, the lateral seeding method, which was published by K.K., causes crystal growth on the insulating layer using the substrate crystal as a seed, so that the crystal orientation is completely determined, and an ideal crystal growth technique Has been done. This method is already known in Japan as described in Japanese Patent Publication No. 42-12087. However, this method, which was considered to be superior in principle, has not been successful in practice. This is mainly in the conventional lateral seeding method (00
This is due to the two reasons that the silicon crystal of the 1) plane is used as the substrate and that the heat distribution is not controlled in the lateral direction, that is, in the direction perpendicular to the scanning direction of the heat source.

先ず、基板方位の問題について説明する。第５図，第
６図は各々エネルギービームの走査方向が＜110＞軸方
向，＜100＞軸方向の場合のラテラルシーディング法に
おける試料を示し、また各図（ａ），（ｂ）は各々（00
1）面を一主面とする試料の平面図、及び断面図を示し
ている。図において、10は（001）面を一主面とする単
結晶シリコン基板,11は熱酸化膜12の開口部、13は再結
晶化されるべき多結晶シリコン層で、図では既にエネル
ギービーム（ここではレーザ光）14が走査されて再結晶
化が終えられている。First, the problem of substrate orientation will be described. FIGS. 5 and 6 show the sample in the lateral seeding method when the scanning direction of the energy beam is the <110> axis direction and the <100> axis direction, and FIGS. (00
1) Shows a plan view and a cross-sectional view of a sample having one surface as the main surface. In the figure, 10 is a single crystal silicon substrate having a (001) plane as a principal plane, 11 is an opening of a thermal oxide film 12, and 13 is a polycrystalline silicon layer to be recrystallized. Here, the laser beam 14 is scanned to complete the recrystallization.

さて、ラテラルシーディング法においては、図中左方
よりレーザ光の照射によって多結晶シリコン層が溶融−
再結晶化して行き、開口部11で基板シリコン10の軸方向
の情報をひろって（001）面の結晶成長が絶縁層上にも
及ぶとするものである。しかし実際にはこのエピタキシ
ャル結晶成長は開口部11端から100〜200μｍ程度しか及
ばない。これはシリコンの場合（111）面方位の結晶成
長速度が他の面方位に比べて遅いために、図に示される
ように、結晶成長層13内に第1,第２ファセット13a,13
b、即ち結晶成長面ができてしまうことによって、その
後の単結晶成長が妨げられることに起因している。Now, in the lateral seeding method, the polycrystalline silicon layer is melted by laser irradiation from the left side in the figure.
It is recrystallized and the information in the axial direction of the substrate silicon 10 is picked up in the opening 11 so that the crystal growth of the (001) plane extends to the insulating layer. However, in reality, this epitaxial crystal growth extends only about 100 to 200 μm from the end of the opening 11. This is because in the case of silicon, the crystal growth rate of the (111) plane orientation is slower than that of other plane orientations, and as shown in the figure, the first and second facets 13a, 13 are formed in the crystal growth layer 13.
This is because b, that is, a crystal growth surface is formed, which hinders subsequent single crystal growth.

例えば第５図の場合は、第１ファセット13a（これの
左側が固相，右側が液相）で結晶成長が続いている間は
単結晶成長が継続するが、第２ファセット13b（これの
左側が固相，右側が液相とする）がなんらかの理由でで
きてしまえば絶縁層12との界面近傍で固化の際、不純物
がたまりはじめ、ついにはこれによる結晶歪みを解放す
るため結晶粒界の発生をまねいて単結晶成長が停止す
る。また、第６図の場合は、同図（ａ）に示すように、
より明らかな折れ線状のファセットができてしまい、成
長面が互いに向きあっている領域ではそのコーナーで歪
が生じ、粒界を発生してしまうのである。For example, in the case of FIG. 5, single crystal growth continues while crystal growth continues in the first facet 13a (the left side of which is the solid phase and the right side of which is the liquid phase), but the second facet 13b (the left side of this). If the solid phase and the liquid phase on the right side are formed for some reason, impurities will start to accumulate during solidification near the interface with the insulating layer 12, and eventually the crystal strain of this will be released in order to release the crystal strain. Single crystal growth is stopped by simulating generation. In the case of FIG. 6, as shown in FIG.
More obvious polygonal facets are formed, and distortion occurs at the corners of the regions where the growth surfaces face each other, and grain boundaries are generated.

次に、より大きな原因である膜の横方向熱分布制御に
ついて説明する。第７図（ｂ）は絶縁層上に設けられた
多結晶シリコン層を通常のレーザービームで走査，照射
して再結晶化した後、結晶粒界の様子を化学的エッチン
グによってきわだたせたもので、同図から、レーザビー
ムスポット内のパワー分布が正規分布である（同図
（ａ）参照）のため、温度の高い溶融領域中央は固化が
遅れ、周辺から多数の結晶粒が成長して行き、中央でぶ
つかって単結晶とはなり得ないことがわかる。Next, the lateral heat distribution control of the film, which is a major cause, will be described. FIG. 7 (b) shows a polycrystalline silicon layer provided on the insulating layer, which is scanned and irradiated with a normal laser beam to be recrystallized, and then the state of grain boundaries is marked out by chemical etching. From the figure, since the power distribution in the laser beam spot is a normal distribution (see (a) in the figure), solidification is delayed at the center of the high-melting region, and many crystal grains grow from the periphery. It turns out that they cannot hit the center and become a single crystal.

〔発明が解決しようとする問題点〕[Problems to be solved by the invention]

以上のように２つの大きな要因があるため、なんらか
の手法により後者を解決したとしても、前者のため、ラ
テラルシーディング法において（001）面を有する大面
積の単結晶層を得ることは非常に困難であるといわざる
を得ない。また（111）面の単結晶シリコン基板を使用
した場合も詳しくは述べないが、大面積にわたって単結
晶を得ることはできない。Since there are two major factors as described above, it is very difficult to obtain a large-area single crystal layer having a (001) plane in the lateral seeding method because of the former, even if the latter is solved by some method. I have to say that. Further, although a detailed description will not be made even when a (111) plane single crystal silicon substrate is used, a single crystal cannot be obtained over a large area.

この発明は上記のような問題点を解消するためになさ
れたもので、単一の結晶軸方向を有する単結晶成長層を
大面積にわたって得ることのできる半導体単結晶成長法
を提供することを目的としている。The present invention has been made to solve the above problems, and an object thereof is to provide a semiconductor single crystal growth method capable of obtaining a single crystal growth layer having a single crystal axis direction over a large area. I am trying.

〔問題点を解決するための手段〕[Means for solving problems]

本発明に係る半導体単結晶成長方法は（110）面又は
その等価な面とし、加熱源の走査方向を（110）面にあ
っては（110）面と等価な面であってかつ（110）面と直
交する面の面方向、また（110）面の等価な面にあって
は（110）面に対する前記面方向と同等の関係の面方向
とするとともに、多結晶又は非結晶のシリコン層上に、
加熱源の照射幅より狭い所望の幅と間隔で加熱源の走査
方向と並行する方向に絶縁層を被着して反射防止膜また
は反射膜とし、該反射防止膜または反射膜によって上記
熱源の走査面上の走査方向を＜10＞軸又は＜001＞軸
方向とし、該走査方向と直角方向の熱分布を制御するよ
うにしたものである。In the semiconductor single crystal growth method according to the present invention, the (110) plane or its equivalent plane is used, and when the scanning direction of the heating source is the (110) plane, the plane is equivalent to the (110) plane and (110) plane. The plane direction of the plane orthogonal to the plane, or the plane equivalent to the (110) plane, has the same relation as the plane direction to the (110) plane, and on the polycrystalline or amorphous silicon layer. To
An insulating layer is applied in a direction parallel to the scanning direction of the heating source with a desired width and interval narrower than the irradiation width of the heating source to form an antireflection film or a reflection film, and the antireflection film or reflection film scans the heat source. The scanning direction on the surface is the <10> axis or <001> axis direction, and the heat distribution in the direction perpendicular to the scanning direction is controlled.

〔作用〕[Action]

この発明における半導体単結晶成長方法では、ファセ
ットは、再結晶化シリコン層の膜厚方向では常に基板と
垂直方向となり、固化の際に歪みを生じることがなく、
また平面方向では所望部分のみに歪が生じることとな
る。In the semiconductor single crystal growth method according to the present invention, the facet is always in the direction perpendicular to the substrate in the film thickness direction of the recrystallized silicon layer, and distortion does not occur during solidification,
Further, in the plane direction, distortion occurs only in the desired portion.

〔発明の実施例〕Example of Invention

以下、本発明の実施例を図について説明する。 Embodiments of the present invention will be described below with reference to the drawings.

第１図は本発明の一実施例による半導体単結晶成長方
法を説明するための図で、第１図（ａ）は（110）面を
一主面とする単結晶シリコン基板上に形成された開口部
を有する絶縁層12上に多結晶シリコン層を被着し、＜
10＞方向にレーザ光を走査し、多結晶層13の一部を開口
部方向から再結晶化してきたところを示し、同図（ｂ）
は｛111）面のうち（110）面と直交する面がつくる結晶
成長面でのファセット（θ≒35.3゜）の平面図、同図
（ｃ）は｛111）面のうち（110）面と直交する面がつく
るファセットの断面図である。図中第５図及び第６図と
同一符号は同一部分を示し、20は（110）面を一主面と
する単結晶シリコン基板、24は連続発振のアルゴレンレ
ーザ光で、スポットサイズは約100μm,走査速度は12cm/
sec、パワーは15W程度である。また２酸化シリコン膜12
は1.0μm,多結晶シリコン層13は0.5μm,開口部11の幅は
10μｍである。第１図（ａ）に示されるように、（11
0′）面を一主面とする単結晶シリコ基板20上に形成さ
れた開口部を有する絶縁層12上に多結晶シリコン層13を
被着し、＜10＞方向にレーザ光24を走査し、多結晶層
13の一部を開口部方向から再結晶化する場合、＜10＞
方向、つまり（110）面の等価な面のう（110）面と直交
する面の面方向にレーザ光24を走査した場合、（110）
面に直交する｛111｝面が、ファセット13cに示されるよ
うに、結晶成長面と一致し、再結晶化シリコン層の膜厚
方向では常に基板と垂直となる。そして、ファセット13
cは膜内深さ方向では種々の結晶成長時の熱的ゆらぎに
対しても常に基板に対して垂直になり、膜内深さ方向で
は歪の蓄えられる領域は出現せず、その結果安定な結晶
成長が得られることになる。FIG. 1 is a view for explaining a semiconductor single crystal growth method according to an embodiment of the present invention. FIG. 1 (a) is formed on a single crystal silicon substrate having a (110) plane as one principal surface. A polycrystalline silicon layer is deposited on the insulating layer 12 having an opening,
A laser beam is scanned in the 10> direction, and a part of the polycrystalline layer 13 is recrystallized from the opening direction.
Is a plan view of the facets (θ ≈ 35.3 °) on the crystal growth plane formed by the plane orthogonal to the (110) plane of the (111) plane. The figure (c) shows the (110) plane of the {111) plane. It is sectional drawing of the facet which an orthogonal surface makes. In the figures, the same reference numerals as those in FIGS. 5 and 6 designate the same parts, 20 is a single crystal silicon substrate having a (110) plane as one principal plane, 24 is a continuous wave Algolen laser beam, and the spot size is about 100 μm, scanning speed 12 cm /
sec, power is about 15W. In addition, silicon dioxide film 12
Is 1.0 μm, the polycrystalline silicon layer 13 is 0.5 μm, and the width of the opening 11 is
It is 10 μm. As shown in FIG. 1 (a), (11
A polycrystalline silicon layer 13 is deposited on an insulating layer 12 having an opening formed on a single crystal silicon substrate 20 whose main surface is the 0 ') plane, and a laser beam 24 is scanned in the <10> direction. , Polycrystalline layer
When recrystallizing a part of 13 from the opening direction, <10>
Direction, that is, when the laser beam 24 is scanned in the plane direction of the plane equivalent to the (110) plane and orthogonal to the (110) plane, (110)
The {111} plane orthogonal to the plane coincides with the crystal growth plane as shown by facet 13c, and is always perpendicular to the substrate in the film thickness direction of the recrystallized silicon layer. And facet 13
In the in-film depth direction, c is always perpendicular to the substrate even with respect to thermal fluctuations during various crystal growths, no region where strain is stored appears in the in-film depth direction, and as a result, it is stable. Crystal growth will be obtained.

しかしながら第１図（ｂ）に示すように、平面方向で
はファセット13cが折れ線状に形成されており、前述の
ごとく成長面が出合う方向のコーナー13dなどでは歪が
たまることになる。そこでこの横方向に対しては第２図
に示すようなパターニングしたシリコン窒化膜16による
反射防止膜を用いる。ここではシリコン窒化膜16の膜厚
は550Å，パターンの幅，間隔はそれぞれ５μm,10μｍ
であり、開口部11の上部は他の部分と異なり基板20まで
溶融せしめるために、パターン15により全面をおおうよ
うにしている。However, as shown in FIG. 1 (b), the facets 13c are formed in a polygonal line shape in the plane direction, and distortion is accumulated at the corners 13d in the direction where the growth surfaces meet as described above. For this lateral direction, therefore, an antireflection film made of a patterned silicon nitride film 16 as shown in FIG. 2 is used. Here, the film thickness of the silicon nitride film 16 is 550 Å, and the pattern width and interval are 5 μm and 10 μm, respectively.
Unlike the other portions, the upper portion of the opening 11 is covered with the pattern 15 in order to melt the substrate 20.

さて、このような反射防止膜を用いると、レーザ光の
膜内の多重反射の影響により反射率が極端に減少し、該
反射防止膜を設けた領域ではほぼレーザ光の100％が多
結晶シリコン層12に到達，吸収されることになる。一方
反射防止膜のない部分ではシリコンの反射率が38％であ
るため、レーザ光は62％しか吸収されない。従ってレー
ザ光が走査しながら照射された場合、反射防止膜のある
領域では多結晶シリコン層13の温度が高く、その他の領
域ではそれより低いという横方向、即ち走査方向と直角
方向の温度分布制御がなされることになる。つまり、反
射防止膜のパターンを形成した部分の固化が常に遅いの
で、第１図（ｂ）に示されたファセット13cのコーナー1
3dは常に反射防止膜の下に生じ、結晶粒界が現われると
すればこの位置になる。Now, when such an antireflection film is used, the reflectance is extremely reduced due to the effect of multiple reflection in the film of laser light, and almost 100% of the laser light is polycrystalline silicon in the region where the antireflection film is provided. It will reach layer 12 and be absorbed. On the other hand, since the reflectance of silicon is 38% in the portion without the antireflection film, only 62% of the laser light is absorbed. Therefore, when the laser light is irradiated while scanning, the temperature of the polycrystalline silicon layer 13 is high in a region where the antireflection film is present and lower in other regions, that is, the temperature distribution control in the lateral direction, that is, the direction perpendicular to the scanning direction. Will be done. That is, the solidification of the pattern-formed portion of the antireflection film is always slow, so that the corner 1 of the facet 13c shown in FIG.
3d is always formed under the antireflection film, and if a grain boundary appears, it is located at this position.

このように本実施例では、結晶粒界は制御された位置
に現われるので、この結晶粒界部分をその後のマスク合
せ技術によって半導体装置の形成領域から避けることが
でき、その結果、本実施例では等価的に結晶軸が制御さ
れた大面積の単結晶層が得られることになる。As described above, in this embodiment, since the crystal grain boundaries appear at the controlled positions, this crystal grain boundary portion can be avoided from the formation region of the semiconductor device by the subsequent mask alignment technique. As a result, in the present embodiment, A large-area single crystal layer whose crystal axes are equivalently controlled can be obtained.

なお上記実施例では、レーザ光をエネルギービームと
して用いる場合について説明したが、加熱源はレーザ光
に限られるものではなく、電子ビームでもよい。電子ビ
ームを用いる場合には、第２図における反射防止膜16を
3000〜5000Åの２酸化シリコン膜とし、かつ剥離防止の
ため薄いシリコン窒化膜を全面に形成すれば、レーザ光
の場合とは逆にパターン化された２酸化シリコン膜の下
では電子ビームが多結晶シリコン層には到達せず、該部
分が低温となって横方向の温度分布が制御される。In the above embodiment, the case where the laser beam is used as the energy beam has been described, but the heating source is not limited to the laser beam and may be an electron beam. When the electron beam is used, the antireflection film 16 in FIG.
If a silicon dioxide film of 3000 to 5000 Å is formed and a thin silicon nitride film is formed on the entire surface to prevent peeling, the electron beam will be polycrystalline under the patterned silicon dioxide film, which is the opposite of the case of laser light. The temperature does not reach the silicon layer, and the temperature of the portion becomes low, so that the temperature distribution in the lateral direction is controlled.

また、熱源として管状ランプ等を用いて再結晶化を行
こともでき、この場合は第３図に示すように、層間絶縁
膜19を介して、パターン化された多結晶シリコン層又は
モリブデン、タングステン等の高融点金属層あるいはそ
のシリサイド層17を形成し、その上に保護用の厚い絶縁
層18を形成すれば、上記実施例と同じ効果が得られる。Recrystallization can also be performed by using a tubular lamp or the like as a heat source. In this case, as shown in FIG. 3, a patterned polycrystalline silicon layer or molybdenum or tungsten is provided through the interlayer insulating film 19. If a refractory metal layer such as the above or a silicide layer 17 thereof is formed and a thick insulating layer 18 for protection is formed thereon, the same effect as that of the above embodiment can be obtained.

〔発明の効果〕〔The invention's effect〕

以上のようにこの発明に係る半導体単結晶成長方法に
よれば、単結晶シリコン基板の一主面を（110）面又は
その等価な面とし、加熱源の走査方向を（110）面にあ
っては（110）面と等価な面であってかつ（110）面と直
交する面の面方向、また（110）面の等価な面にあって
は（110）に対する前記面方向と同等の関係の面方向と
するとともに、多結晶又は非結晶のシリコン層上に、加
熱源の照射幅より狭い所望の幅と間隔で加熱源の走査方
向と並行する方向に絶縁層を被着して反射防止膜または
反射膜とし、該反射防止膜または反射膜によって上記熱
源の走査面上の走査方向と直角方向の熱分布を制御する
ようにしたので、単一の結晶軸方向を有する単結晶成長
層が大面積にわたって制御性よく得られる効果がある。As described above, according to the semiconductor single crystal growth method of the present invention, one main surface of the single crystal silicon substrate is the (110) plane or its equivalent plane, and the scanning direction of the heating source is the (110) plane. Is the plane direction of a plane which is equivalent to the (110) plane and is orthogonal to the (110) plane, and in the plane equivalent to the (110) plane, has the same relation as the above-mentioned plane direction with respect to (110). An antireflection film is formed by depositing an insulating layer on the polycrystalline or amorphous silicon layer in a direction parallel to the scanning direction of the heating source with a desired width and interval narrower than the irradiation width of the heating source, in addition to the plane direction. Alternatively, since a reflection film is used, and the heat distribution in the direction perpendicular to the scanning direction on the scanning surface of the heat source is controlled by the antireflection film or the reflection film, a single crystal growth layer having a single crystal axis direction is large. There is an effect that controllability can be obtained over the area.

【図面の簡単な説明】[Brief description of drawings]

第１図及び第２図は本発明の一実施例による半導体単結
晶成長方法を説明するためのもので、第１図（ａ）はそ
のレーザビームの走査状態を示す断面図、第１図（ｂ）
はその試料の平面図、第１図（ｃ）はその断面図、第２
図（ａ），（ｂ），（ｃ）はそれぞれ反射防止膜の平面
図，断面側面図，断面正面図、第３図（ａ），（ｂ），
（ｃ）はそれぞれこの発明の他の実施例の断面平面図，
断面側面図，断面正面図、第４図はラテラルシーディン
グ法の概念図、第５図（ａ），（ｂ）はそれぞれ従来の
（001）面の単結晶基板を使用した場合の結晶成長の様
子を示す平面図，断面図、第６図（ａ），（ｂ）はそれ
ぞれ他の従来例の平面図，断面図、第７図は横方向熱分
布を制御しない場合のレーザ再結晶化層における結晶成
長の様子を示すもので、第７図（ａ）はレーザビームの
パワー分布図，第７図（ｂ）はその結晶粒界の様子を示
す図である。 図において、11は開口部、13は多結晶シリコン層、15は
開口部上に設けられた絶縁物層、16はパターニングされ
た絶縁物層、17は多結晶シリコン層、18は保護用の厚い
絶縁層、19は層間の絶縁層、20は（110）面を一主面と
する単結晶シリコン基板である。 なお図中同一符号は同一又は相当部分を示す。1 and 2 are for explaining a method for growing a semiconductor single crystal according to an embodiment of the present invention. FIG. 1 (a) is a sectional view showing a scanning state of the laser beam, and FIG. b)
Is a plan view of the sample, FIG. 1 (c) is a sectional view thereof, and FIG.
Figures (a), (b) and (c) are respectively a plan view, a cross-sectional side view, a cross-sectional front view, and Figures 3 (a), (b), of the antireflection film.
(C) is a sectional plan view of another embodiment of the present invention,
Cross-sectional side view, cross-sectional front view, FIG. 4 is a conceptual diagram of the lateral seeding method, and FIGS. 5 (a) and 5 (b) are crystal growths when a conventional (001) single crystal substrate is used. 6A and 6B are plan views and sectional views of another conventional example, respectively, and FIG. 7 is a laser recrystallized layer when the lateral heat distribution is not controlled. 7 (a) is a power distribution diagram of the laser beam, and FIG. 7 (b) is a diagram showing the state of the crystal grain boundaries. In the figure, 11 is an opening, 13 is a polycrystalline silicon layer, 15 is an insulating layer provided on the opening, 16 is a patterned insulating layer, 17 is a polycrystalline silicon layer, and 18 is a thick protective layer. An insulating layer, 19 is an insulating layer between layers, and 20 is a single crystal silicon substrate having a (110) plane as one main surface. The same reference numerals in the drawings indicate the same or corresponding parts.

Claims (4)

【特許請求の範囲】[Claims] 【請求項１】単結晶シリコン基板の一主面上を開口部を
有する絶縁層でおおい、該絶縁層の上面に多結晶又は非
結晶のシリコン層を被着し、該シリコン層を加熱源で走
査しながら照射して溶融−再結晶化を生ぜしめ、上記単
結晶シリコン基板の結晶軸方位と同一の結晶軸を有する
単結晶層を上記絶縁層上にも形成するようにした半導体
結晶成長方法において、上記単結晶シリコン基板の一主
面の面方位を（110）面又はその等価な面とし、上記加
熱源の走査方向を（110）面にあっては（110）面と等価
な面であってかつ（110）面と直交する面の面方向、ま
た（110）面の等価な面にあっては（110）面に対する前
記面方向と同等の関係の面方向とするとともに、上記多
結晶又は非結晶のシリコン層上に、上記加熱源の照射幅
より狭い所望の幅と間隔で上記加熱源の走査方向と並行
する方向に絶縁層を被着して反射防止膜または反射膜と
し、該反射防止膜または反射膜によって上記熱源の走査
面上の走査方向と直角方向の熱分布を制御するようにし
たことを特徴とする半導体結晶成長方法。1. A single crystal silicon substrate is covered with an insulating layer having an opening on one main surface, a polycrystalline or amorphous silicon layer is deposited on the upper surface of the insulating layer, and the silicon layer is used as a heating source. Semiconductor crystal growth method in which irradiation is performed while scanning to cause melting-recrystallization, and a single crystal layer having the same crystal axis as the crystal axis direction of the single crystal silicon substrate is also formed on the insulating layer. In (1), the plane orientation of one main surface of the single crystal silicon substrate is the (110) plane or its equivalent plane, and the scanning direction of the heating source is the (110) plane, which is equivalent to the (110) plane. And the plane direction of the plane perpendicular to the (110) plane, and the plane equivalent to the (110) plane have a plane direction having the same relation as the plane direction with respect to the (110) plane. Or, on the amorphous silicon layer, with a desired width and interval narrower than the irradiation width of the heating source. An insulating layer is applied in a direction parallel to the scanning direction of the heating source to form an antireflection film or a reflection film, and the antireflection film or the reflection film provides a heat distribution in a direction perpendicular to the scanning direction on the scanning surface of the heat source. A method for growing a semiconductor crystal, characterized by being controlled. 【請求項２】上記加熱源が連続発振のアルゴンレーザ光
であり、上記多結晶又は非結晶のシリコン層上に被着さ
れた上記絶縁層がシリコン窒化膜であることを特徴とす
る特許請求の範囲第１項記載の半導体結晶成長方法。2. The heating source is continuous wave argon laser light, and the insulating layer deposited on the polycrystalline or amorphous silicon layer is a silicon nitride film. A method for growing a semiconductor crystal according to claim 1. 【請求項３】上記加熱源が連続的な電子ビームであり、
上記多結晶又は非結晶のシリコン層上に被着された上記
絶縁層が２酸化シリコン膜であることを特徴とする特許
請求の範囲第１項記の載半導体結晶成長方法。3. The heating source is a continuous electron beam,
2. The mounted semiconductor crystal growth method according to claim 1, wherein the insulating layer deposited on the polycrystalline or amorphous silicon layer is a silicon dioxide film. 【請求項４】上記加熱源が管状ランプ光を集光照射する
ものであり、上記多結晶又は非結晶のシリコン層上に層
間絶縁膜を設けるとともに、該層間絶縁膜上に上記加熱
源の照射幅より狭い所望の幅と間隔で上記加熱源の走査
方向と並行する方向に、第２の多結晶シリコン層又はモ
リブデン、タングステン等の高融点金属層あるいはその
シリサイド層を被着し、さらにその上に保護用の絶縁層
を形成したことを特徴とする特許請求の範囲第１項記載
の半導体結晶成長方法。4. The heating source condenses and irradiates a tubular lamp light, and an interlayer insulating film is provided on the polycrystalline or amorphous silicon layer, and the heating source is irradiated on the interlayer insulating film. A second polycrystalline silicon layer or a refractory metal layer such as molybdenum or tungsten, or a silicide layer thereof is deposited at a desired width and interval narrower than the width in a direction parallel to the scanning direction of the heating source, and further thereon. The method for growing a semiconductor crystal according to claim 1, wherein a protective insulating layer is formed on the substrate.
JP60074371A 1985-04-10 1985-04-10 Semiconductor single crystal growth method Expired - Lifetime JPH084066B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60074371A JPH084066B2 (en) 1985-04-10 1985-04-10 Semiconductor single crystal growth method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60074371A JPH084066B2 (en) 1985-04-10 1985-04-10 Semiconductor single crystal growth method

Publications (2)

Publication Number Publication Date
JPS61234026A JPS61234026A (en) 1986-10-18
JPH084066B2 true JPH084066B2 (en) 1996-01-17

Family

ID=13545235

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60074371A Expired - Lifetime JPH084066B2 (en) 1985-04-10 1985-04-10 Semiconductor single crystal growth method

Country Status (1)

Country Link
JP (1) JPH084066B2 (en)

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58180019A (en) * 1982-04-15 1983-10-21 Matsushita Electric Ind Co Ltd Semiconductor base body and its manufacture

Also Published As

Publication number Publication date
JPS61234026A (en) 1986-10-18

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