JPH0855835A - Plasma etching apparatus and plasma etching method - Google Patents

Abstract

(57) [Abstract] [Purpose] To continuously perform plasma etching on a multilayer film including a silicon layer and a silicon oxide layer in the same etching apparatus without switching the etching gas. [Structure] A high-density plasma etching apparatus in which a distance between plasma and a substrate stage is variable is used, and a CF / H ₂ mixed gas or a CHF-based gas is used as an etching gas. When etching the silicon oxide layers 4, 5 and 6, this distance is widened, and when etching the silicon layer, for example, the polycrystalline silicon wirings 7 and 8, the distance is narrowed and etched. [Effect] When the distance between the plasma and the substrate stage is short, the dissociation product HF of the etching gas is re-dissociated to increase the F radical concentration near the substrate to be etched. Therefore, the silicon layer can be etched by the above gas system. Since the multilayer laminated film can be etched only by raising and lowering the substrate stage without changing other etching conditions, the throughput of sidewall contact processing or the like is improved.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a plasma etching apparatus and a plasma etching method applied in the field of manufacturing semiconductor devices and the like, and more specifically, in the case of continuously etching a laminated film of a silicon layer and a silicon oxide layer. The present invention relates to a plasma etching apparatus and a plasma etching method suitable for use in.

[0002]

2. Description of the Related Art With the progress of higher integration and higher performance of semiconductor devices such as LSI, the minimum design rule is being changed from half micron to quarter micron. There is a demand for high-precision processing technology that enables this.

In more recent memory devices, SR
With the movement of using TFT instead of high resistance load in AM, and with the complexity of cell structure in DRAM, polycrystalline silicon wiring has three layers, four layers through interlayer insulating films.
Multilayer wiring structures stacked in layers have been widely used. As a method of significantly reducing the number of connection holes between such multilayer wirings, a connection structure called so-called sidewall contact (plug-in wiring) has been proposed.
This is because at the time of opening a via hole in the lowermost first layer polycrystalline silicon wiring, etc., a connection hole is formed by penetrating the second layer polycrystalline silicon wiring and the upper third layer polycrystalline silicon wiring. By embedding a conductive material (plug) in, the multi-layer wiring is connected at the side wall of the connection hole. By adopting the sidewall contact, the step of forming individual via holes in the polycrystalline silicon wiring of each layer can be omitted, which has an advantage that the device structure and the process are greatly simplified. As a report example of sidewall contact, IEEE 1990
International Electron De
Vice Meetings (IEDM 90) Proceedings, p59-62 and IEDM 91 Proceedings, p59-62
In 477 to 480, examples using all of them for high integration of SRAM are posted.

[0004]

By the way, the constituent material of the interlayer insulating film is generally silicon oxide, and SiO ₂ or silicate glass such as PSG, BSG and BPSG in which impurities are added to this is widely adopted. CHF ₃ , CF ₄ / H ₂ , and CF ₄ are used for plasma etching for opening connection holes in these silicon oxide type interlayer insulating films.
An etching gas mainly composed of a CF compound or a CHF compound such as a mixed gas of / O ₂ or CF ₄ / CHF ₃ is used. This is because the C atom in the CF-based compound or the CHF-based compound has reducibility, the O atom is extracted from the SiO ₂ layer, and the bond energy between the atoms is larger than the Si—O bond to generate a C—O bond. This is because it has the effect of weakening or breaking this Si—O bond. Further, CF ₃ ⁺ , which is the main etchant of SiO ₂ , is generated, and the C / F ratio, which represents the ratio of C atoms to F atoms in the plasma, is controlled to be high to optimize the deposition amount of the carbon-based polymer, It is based on various reasons such as formation of a side wall protective film and high selectivity with respect to a resist mask and a base material layer.

In this case, the underlying material layer is an impurity diffusion layer of a silicon substrate or a wiring layer made of polycide or polycrystalline silicon, and the above-mentioned plasma etching mainly using CF type gas is performed on the layer mainly containing silicon. A high selectivity etching of the silicon oxide layer can be achieved. However, in the above-mentioned sidewall contact structure, it is necessary to sequentially etch a multilayer film in which a silicon oxide layer and a silicon layer such as polycrystalline silicon are stacked. When plasma etching using an etching gas mainly containing a CF-based compound is applied to such a structure, the etching naturally stops when the surface of the polycrystalline silicon layer is exposed by opening the silicon oxide layer. .

Successive patterning of the polycrystalline silicon layer
In order to change the etching gas composition,
Or even transferred to an etching device dedicated to polycrystalline silicon
Then, etching may be performed here. Silicon Etch
In C., the reduction reaction with C is unnecessary, rather
The carbon-based polymer is deposited on the surface of the silicon layer and
Inhibit progress. So the main etchant for silicon
F radical (F ^*) Supply a lot, so etch
Control the C / F ratio to be small by changing the composition of the ing gas.
Is performed. However, in the processing of multilayer structures, this
These etching conditions are changed many times,
Unless problems such as complications of
Widely used in actual process
Is difficult to do.

Therefore, an object of the present invention is to provide an apparatus for continuously etching a laminated film of a silicon layer and a silicon oxide layer in the same etching apparatus without changing the etching gas composition or carrying between etching apparatuses. Is to provide a method.

Another object of the present invention is to achieve the above object with a high throughput while ensuring a high selection ratio for the finally exposed lowermost silicon layer.

Still another object of the present invention is to incorporate a sidewall contact structure into an actual device with high productivity,
It is to achieve high integration of semiconductor devices. Other objects of the present invention will be made clear by the description of the present specification and the accompanying drawings.

[0010]

The plasma etching apparatus of the present invention is proposed to solve the above-mentioned problems and has a plasma density of 1 × 10 ¹¹ / cm ³ or more and less than 1 × 10 ¹⁴ / cm ^3. And a means for varying the distance between the plasma in the plasma source and the substrate to be etched.

Plasma in this plasma source,
As means for varying the distance between the substrates to be etched,
The substrate stage is moved toward the plasma source, the plasma in the plasma source is moved toward the substrate stage, or the substrate stage is moved toward the plasma source, and the plasma at the plasma source is moved toward the substrate stage. It may be either moving in the direction of. That is, the central axis of the plasma in the plasma generation source and the central axis of the substrate stage (that is, the central axis of the substrate to be etched) are arranged on the same axis. Then, either one or both of the plasma and the substrate stage in the plasma generation source may be relatively moved on this axis.

1 × 10 ¹¹ / cm ³ or more used in the present invention 1
As a plasma etching apparatus having a plasma generation source capable of obtaining a plasma density of less than × 10 ¹⁴ / cm ³ , E
CR (Electron Cyclotron Res
once) plasma etching device, ICP (In
(Ductively Coupled Plasma)
Etching device, TCP (Transformer)
Coupled Plasma Etching Equipment, Helicon Wave Plasma
a) An etching device and the like can be exemplified. A technical description of each of these high-density plasma etching apparatuses is omitted because they are described in detail in the individual technical reports and the like, but as a review, monthly Semiconductor World magazine 1992 10
It is published on page 59 of the monthly issue.

Further, the plasma etching method of the present invention is
While using the plasma etching apparatus described above,
In continuously plasma-etching a laminated film of a silicon layer and a silicon oxide layer using a gas containing F-based gas and H ₂ , the distance between the plasma in the plasma generation source and the substrate to be etched is determined by etching the silicon layer. The time is smaller than that during etching of the silicon oxide layer.

Further, the plasma etching method of the present invention uses the above-mentioned plasma etching apparatus and a plasma containing a CHF-based gas to continuously plasma-etch a laminated film of a silicon layer and a silicon oxide layer. The distance between the plasma in the generation source and the substrate to be etched is smaller when the silicon layer is etched than when the silicon oxide layer is etched.

Adopted in the plasma etching method of the present invention
CF-based gas is CF_Four, C ₂F₆, C₂F_Four,
C₂F₆, C₃F₈And C_FourF₈Such as C in one molecule
Saturated or unsaturated compounds containing atoms and F atoms alone
Or use in combination. As CHF-based gas,
CHF₃, CH₂F₂, C₂H₂F_FourAnd C₂H₂F
₂Etc., etc., containing C, H and F atoms in one molecule
Use unnatural or unsaturated compounds alone or in combination
It

In the plasma etching method of the present invention, CF-based gas and H ₂ gas, or CHF-based gas may be mixed with other gas such as O ₂ or N ₂ or a rare gas as an etching gas. . In etching each layer of the silicon layer and the silicon oxide layer, the etching conditions may be the same except for the distance between the plasma and the substrate to be etched in the plasma generation source. That is, it is not necessary to switch etching conditions such as etching gas composition, pressure, applied power, and substrate bias power.

[0017]

The first point of the present invention is that HF, which is one of the dissociation products of the etching gas, is made variable by varying the distance between the plasma and the substrate stage in the plasma generation source.
F ^{* in the} vicinity of the substrate to be etched by controlling the re-dissociation of
The point is to increase or decrease the concentration of. This makes the apparent C
The / F ratio is set to an optimum value for each layer to be etched. That is, the switching of the C / F ratio in the etching gas is not performed by changing the etching gas, but the etching device side can respond mechanically or electrically and quickly.

Regarding the re-dissociation of HF which is one of the dissociation products of the etching gas described here, a recent high-density plasma etching apparatus, specifically 1 × 10 ¹¹ / cm ^{3 is used.}
The above-mentioned reaction occurs remarkably in the etching of the silicon oxide-based material layer using an etching apparatus having a plasma generation source capable of obtaining a plasma density of less than 1 × 10 ¹⁴ / cm ³ and the following reactions in high-density plasma: Is believed to be happening. The following chemical reaction formula is the behavior of dissociation products when a mixed gas of CF-based gas and H ₂ gas is turned into plasma using a high-density plasma generation source, and depending on the distance between the plasma and the substrate to be etched,
This shows that the dissociation products and re-dissociation products of the etching gas are different.・ When the distance between the plasma and the substrate to be etched is large: CF _x + H ₂ → CF _x-2 + 2HF (removed from the exhaust system) ・ When the distance between the plasma and the substrate to be etched is small: CF _x + H ₂ → CF _x-2 + 2HF (partially removed from the exhaust system) HF → H + F ^* (redissociation formation) In the above formula, CF _x and CF _x-2 are the main etchants of the silicon oxide type material, and F ^* Is a main etchant for silicon materials.

As is clear from the above equation, CF type gas and H
_When etching the silicon oxide layer while controlling the C / F ratio using ₂ gases, the distance between the plasma and the substrate to be etched is usually large to some extent, so the dissociation product HF is quickly exhausted from the vacuum pump. It is removed and thus the etching selectivity of the silicon layer is not reduced.

However, even with the same etching gas system, if the distance between the plasma and the substrate to be etched becomes narrow, a part of HF, which is a dissociation product, is discharged in the high density plasma before being exhausted and removed from the vacuum pump. Re-dissociation produces F ^* which is the main etchant of the silicon-based material. As a result, the apparent C / F ratio decreases, the etching environment becomes suitable for the silicon-based material layer, and the selection ratio between the silicon oxide layer / silicon layer decreases. This phenomenon is not limited to a mixed gas of CF-based gas and H ₂ gas, but CHF ₃ such as CHF ₃
It is also observed in the etching of the silicon oxide based material layer with a base gas. In summary, if an etching device that can control the distance between the plasma and the substrate to be etched is adopted, individual etching environments suitable for etching the silicon oxide layer and the silicon layer can be achieved with the same etching device and etching conditions. You can do it.

[0021] Incidentally, a parallel plate plasma etching apparatus that is generally used than conventionally, 1 × 10 ⁹ / cm ³ units as plasma density, a magnetron RIE apparatus 1 even in the × 10 ¹⁰ to use a magnetic field / Since the plasma density is on the order of cm ³ , there are some problems in the plasma density, the etching rate, and particularly the uniformity of etching on a large-diameter substrate. On the other hand, the upper limit of the plasma density is closely related to the etching gas pressure, and is 1 × 10 at a gas pressure of the order of 10 ⁻¹ Pa which is the main operating pressure of the high density plasma etching apparatus used in the present invention.
The plasma density of ¹⁴ / cm ³ is a value close to complete dissociation. Therefore, the plasma density of the plasma generation source in the plasma etching apparatus of the present invention should be 1 × 10 ¹¹ / c.
It is limited to m ³ or more and less than 1 × 10 ¹⁴ / cm ³ .

The second point of the present invention is to continuously etch a laminated film of a silicon layer and a silicon oxide layer using a gas containing a CF-based gas and an H ₂ gas or a CHF-based gas by the above-mentioned etching apparatus. In doing so, the distance between the plasma in the plasma generation source and the substrate stage is made variable so that an etching environment suitable for each layer to be etched is formed to perform etching.

That is, at the time of etching the silicon oxide layer, the distance between the plasma and the substrate stage is set wide, and F ^{* is set.}
The silicon oxide layer is processed under the etching conditions of a reducing atmosphere suitable for the silicon oxide layer by lowering the concentration and relatively increasing the CF _x -based etchant concentration.

When the surface of the silicon layer is exposed due to the progress of etching of the silicon oxide layer, the distance between the plasma and the substrate stage is narrowed to promote re-solution of HF by the high density plasma. As a result, the concentration of F ^{* in} the plasma is increased and the apparent C / F ratio is lowered, so that the etching conditions suitable for the silicon layer are achieved, and the silicon layer can be processed under this condition.

When the etching of the silicon layer progresses and the surface of the lower silicon oxide layer is exposed, the distance between the plasma and the substrate stage may be widened again to set etching conditions suitable for the silicon oxide layer. Hereinafter, by repeating this, it is possible to continuously etch the multilayer film of the silicon layer and the silicon oxide layer without changing the etching conditions other than the distance between the plasma and the substrate stage and without transporting between etching devices. It is possible to realize a process with extremely high throughput.

[0026]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Specific embodiments of the present invention will be described below with reference to the accompanying drawings.

Example 1 In this example, etching of a side wall contact structure of a highly integrated SRAM was performed using a substrate bias application type ECR.
This is an example in which the distance between the plasma in the plasma generation source and the substrate stage is measured by moving the substrate stage using a plasma etching apparatus, which is shown in FIG.
This will be described with reference to (b) and FIG.

First, the plasma etching apparatus used in this embodiment will be described. FIG. 2 is a diagram showing a schematic configuration example of the substrate bias application type ECR plasma etching apparatus used in this embodiment. In the figure, a 2.45 GHz microwave generated by the magnetron 15 is introduced through a microwave waveguide 16 into a bell jar 17 made of quartz or the like, and a solenoid coil arranged around the bell jar 17 is arranged. 0.0875T excited by 18
Due to the interaction with the magnetic field, the plasma 19 due to the ECR of the etching gas is generated in the bell jar 17. The substrate 11 to be etched is placed on the substrate stage 12 in close contact with the clamper 13. The substrate 11 to be etched may be supported by an electrostatic chuck (not shown) incorporated in the substrate stage 12. 14 is a substrate bias power supply. The characteristic part of this apparatus is that the substrate stage can be moved in the direction of the plasma 19 while the central axis of the substrate stage 12, that is, the central axis of the substrate to be etched and the central axis of the plasma 19 are aligned. The moving means of the substrate stage 12 is not particularly limited, and although not shown, any means such as a hydraulic pressure, a pneumatic cylinder, and a motor drive can be used.

Next, the dry etching method of the present invention will be described with reference to FIGS. As described above, this embodiment is an example applied to the formation of the side wall contact of the SRAM, and the etching sample is shown in FIG.
, A polycide wiring 3 on an element isolation film 2 formed by selectively oxidizing a semiconductor substrate 1 made of Si or the like, a first silicon oxide layer 4 sequentially formed thereon, 50 nm thick
The second polycrystalline silicon wiring 7 having a thickness, the second silicon oxide layer 5, the third polycrystalline silicon wiring 8 having a thickness of 30 nm, and the uppermost third silicon oxide layer 6 are sequentially formed. The polycide wiring 3 may be formed of polycrystalline silicon. A resist mask 9 for forming a sidewall contact opening facing the polycide wiring 3 is formed on the uppermost third silicon oxide layer 6 with a novolac-based resist i.
It is formed by line lithography. The opening width of the resist mask 9 is 0.35 μm, for example. This etching sample is used as the substrate to be etched.

The substrate 11 to be etched is placed on the substrate stage 12 of the substrate bias application type ECR plasma etching apparatus shown in FIG. 2, and the third silicon oxide layer is formed under the first etching conditions shown below as an example. The exposed part of 6 was etched. The substrate stage height is
2 shows the position when the substrate stage 12 is moved in the direction of the plasma 19, and the substrate bias application type E shown in FIG.
In the CR plasma etching apparatus, a position 200 mm downward from the lowermost end of the solenoid coil 18 is set as a reference point, and the height of the substrate stage is 0 mm. For example, the substrate stage height of 150 mm indicates that the surface of the substrate stage 12 is set 150 mm above the reference point, that is, 50 mm below the lowermost end of the solenoid coil 18. The substrate stage height is an important parameter for controlling the effective amount of F ^* and the C / F ratio on the substrate to be etched as described above. CHF ₃ 50 sccm Gas pressure 0.27 Pa Microwave power 1200 W (2.45 GHz) RF bias power 200 W (800 kHz) Etching substrate temperature 20 ° C ECR point height 90 mm Substrate stage height 0 mm Under the above etching conditions , ECR point height represents the center position of the plasma 19 in the plasma generation source. In this case, the lowest point of the solenoid coil 18 is set as a reference point, and the ECR point height is set to 0 mm. That is, the ECR point height of 90 mm means the solenoid coil 1
It is shown that the center position of the plasma 19 is set 90 mm above the lowermost end of No. 8.

In the above etching step, since the distance between the plasma 19 and the substrate stage 12 is 290 mm, most of the dissociation products HF of the etching gas due to the ECR plasma are removed from the exhaust system and the C / F.
The patterning of the third silicon oxide layer 6 proceeds under the optimum etching condition with a large ratio.

When the etching of the third silicon oxide layer 6 is completed and the third polycrystalline silicon layer 8 is exposed, the second etching condition is switched to the following second etching condition. The end of the patterning of the third silicon oxide layer 6 is set at the time when the emission spectrum intensity of CO, which is a reaction product of silicon oxide, begins to decrease. The intrinsic emission spectrum of CO is, for example, 483.5 nm. CHF ₃ 50 sccm Gas pressure 0.27 Pa Microwave power 1200 W (2.45 GHz) RF bias power 200 W (800 kHz) Etching substrate temperature 20 ° C. ECR point height 90 mm Substrate stage height 150 mm The above etching conditions are , Substrate stage height 150mm
Other than the above, the etching conditions for the silicon oxide layer are the same as the above. In the second etching step, since the distance between the plasma 19 and the substrate stage 12 is as close as 140 mm, HF, which is a dissociation product of CHF ₃ , is re-dissociated in the high-density plasma, and near the substrate to be etched. F ^*
The concentration increases. F ^* produced in large quantities by re-dissociation is
Most of them contribute as an etching seed of polycrystalline silicon, and high-speed etching proceeds. At this time, although there is concern that the resist mask 9 may be thinned or set back due to F ^* , since the third polycrystalline silicon layer 8 has a thin film thickness of 50 nm and the etching is performed in a short time, the influence on the resist mask 9 is affected. Was not observed.

When the etching of the third polycrystalline silicon wiring 8 is completed in a short time and the surface of the second silicon oxide layer 5 is exposed, the substrate stage 12 is moved to be separated from the plasma 19 and again the previous first. The etching condition is changed to 1. The end of etching of the third polycrystalline silicon wiring 8 may be determined at the time when the emission spectrum of SiF _x , which is a reaction product, begins to decrease. The intrinsic emission spectra of SiF _x are, for example, 440 nm and 777 nm.
Is.

Hereinafter, the first etching condition and the second etching condition are switched only by moving the substrate stage 12, and the second silicon oxide layer 5, the second polycrystalline silicon wiring 7 and the first silicon oxide layer are switched. 4 is sequentially etched, and the etching is finished when the surface of the polycide wiring 3 is exposed. Depending on the etching conditions for the first silicon oxide layer 4, the mechanism of stopping the etching when the upper WSi _x layer of the polycide wiring 3 is exposed is the same as the mechanism of stopping the etching on the surface of the polycrystalline silicon layer.
The state of the formed sidewall contact opening 10 is shown in FIG.

According to this embodiment, it is possible to move the substrate stage 12 only to change the distance from the plasma 19 and to change the etching conditions other than that, and to mechanically and rapidly change the silicon layer. It is possible to continuously etch a multi-layered laminated film of a silicon oxide layer and a silicon oxide layer in the same etching chamber.

Embodiment 2 In this embodiment, etching of the side wall contact structure of a highly integrated SRAM is performed by applying a substrate bias application type E as well.
This is an example in which a CR plasma etching apparatus is used and the distance between the plasma in the plasma generation source and the substrate stage is moved by moving both the substrate stage and the plasma position. This is again shown in FIGS. And it demonstrates with reference to FIG.

FIG. 3 is a diagram showing an example of a schematic structure of a substrate bias application type ECR plasma etching apparatus used in this embodiment. The basic structure is the same as the apparatus of FIG. 2 used in the previous embodiment. Therefore, redundant description will be omitted. A characteristic part of this device is that a moving means for the plasma 19 is provided in addition to the device configuration shown in FIG. This moving means moves the ECR point that controls the balance of the current applied to the solenoid coil 18 and generates a magnetic field of 0.0875T.

Next, the dry etching method of the present invention will be described with reference to FIGS. 1 (a) and 1 (b). As described above, this embodiment is also an example applied to the formation of the sidewall contact of SRAM. Since the etching sample shown in FIG. 1A is the same as that of the first embodiment, duplicated description will be omitted. This etching sample is used as the substrate to be etched.

The substrate 11 to be etched is placed on the substrate stage 12 of the substrate bias application type ECR plasma etching apparatus shown in FIG. 3, and the first substrate shown below is used as an example.
The exposed portion of the third silicon oxide layer 6 was etched under the above etching conditions. CHF ₃ 50 sccm Gas pressure 0.27 Pa Microwave power 1200 W (2.45 GHz) RF bias power 200 W (800 kHz) Etching substrate temperature 20 ° C. ECR point height 90 mm Substrate stage height 0 mm In the above etching process The etching mechanism of the silicon oxide layer is the same as that in the first embodiment.

When the etching of the third silicon oxide layer 6 is completed and the third polycrystalline silicon layer 8 is exposed, the second etching condition is switched to the following second etching condition. Monitoring of the end of etching is the same as in Example 1. CHF ₃ 50 sccm Gas pressure 0.27 Pa Microwave power 1200 W (2.45 GHz) RF bias power 200 W (800 kHz) Etching substrate temperature 20 ° C ECR point height 25 mm Substrate stage height 150 mm , The ECR point was set to 25 mm, and the substrate stage height was set to 150 mm, the same as the above etching conditions for the silicon oxide layer. In the second etching step, the plasma 19 and the substrate stage 12
Since the distance is closer to 75 mm, HF which is a dissociation product of CHF ₃ is strongly re-dissociated in the high-density plasma, and the F ^* concentration near the substrate to be etched is extremely increased. The large amount of F ^* generated by the re-dissociation contributes as an etching seed of polycrystalline silicon, and high-speed etching proceeds.

When the etching of the third polycrystalline silicon wiring 8 is completed in a short time and the surface of the second silicon oxide layer 5 is exposed, the plasma 19 and the substrate stage 12 are moved to remove the plasma 19 and the substrate stage 12. The distance is increased, and the first etching condition is switched again. The monitoring of the completion of etching of the third polycrystalline silicon wiring 8 is the same as in the first embodiment.

Hereinafter, the first etching condition and the second etching condition are switched only by moving the plasma 19 and the substrate stage 12, and the second silicon oxide layer 5, the second polycrystalline silicon wiring 7 and the first etching condition are set. The silicon oxide layer 4 is sequentially etched, and the etching is finished when the surface of the polycide wiring 3 is exposed. First silicon oxide layer 4
Depending on the etching conditions, the W of the upper layer of the polycide wiring 3
The mechanism of stopping the etching when the Si _x layer is exposed is the same as the mechanism of stopping the etching on the surface of the polycrystalline silicon layer. The state of the formed sidewall contact opening 10 is shown in FIG.

According to this embodiment, only the distance between the plasma 19 and the substrate stage 12 is moved to change the distance between them, and it is not necessary to switch the etching conditions other than that. By the method, it is possible to continuously etch a multilayer laminated film of a silicon layer and a silicon oxide layer in the same etching chamber.

Embodiment 3 In this embodiment, etching of the side wall contact structure of a highly integrated SRAM is performed by using the substrate bias application type I.
This is an example in which the distance between the plasma in the plasma generation source and the substrate stage is measured by moving the substrate stage using a CP etching apparatus. This is again shown in FIG.
(B) and FIG. 4 will be described.

FIG. 4 is a diagram showing a schematic configuration example of the substrate bias application type ICP etching apparatus used in this embodiment. In FIG. 4, parts having the same functions as those in FIG. 2 are designated by the same reference numerals, and the description thereof will be partially omitted. In the figure, the power of the ICP power source 20 is supplied into the etching chamber 22 by an inductive coupling coil 21 that is wound around the side surface of the etching chamber 22 made of a dielectric material such as quartz.
Generate 24 is an upper electrode 23 made of Si-based material or the like
Is a heater for heating the. The characteristic part of this apparatus is that the substrate stage can be moved in the direction of the plasma 19 while the central axis of the substrate stage 12, that is, the central axis of the substrate 11 to be etched and the central axis of the plasma 19 are aligned. The means for moving the substrate stage 12 is not particularly limited here as well.
Although not shown, any means such as hydraulic pressure, pneumatic cylinder, motor drive, etc. may be used. Note that details of the etching gas introduction hole, the vacuum exhaust system, and the like are omitted. The feature of the ICP etching apparatus is that it has a large multi-turn inductive coupling coil 21.
Accordingly, it is possible to plasma excitation at high power, 10 ¹²
That is, it is possible to perform etching with high-density plasma of the order of / cm ³ .

Next, the dry etching method of this embodiment will be described. The substrate to be etched used in this example is the same as that in Example 1, and will be described with reference to FIGS. 1A and 1B, and duplicate description will be omitted. The substrate 11 to be etched shown in FIG. 1A is placed on the substrate stage 12 of the above-described substrate bias application type ICP etching apparatus, and as an example, the exposed portion of the third silicon oxide layer 8 is etched under the following conditions. went. CHF ₃ 25 sccm CH ₂ F ₂ 25 sccm Gas pressure 0.27 Pa ICP power supply power 2000 W (2.0 MHz) RF bias power 100 W (1.8 MHz) Etching substrate temperature 20 ° C. Upper electrode temperature 270 ° C. Substrate stage height 0 mm Under the above etching conditions, the substrate stage height is
The position of the substrate stage 12 is shown, and this is set to 0 mm based on the position 300 mm away from the upper electrode 23. The substrate stage height is an important parameter for controlling the effective amount of F ^* generated on the substrate to be etched.

In the above etching process, since the distance between the plasma 19 and the substrate stage 12 is large, I
Dissociation product HF of etching gas by CP plasma
Most of them are removed from the exhaust system, and the patterning of the third silicon oxide layer 6 proceeds under the optimum etching condition with a large C / F ratio.

When the etching of the third silicon oxide layer 6 is completed and the third polycrystalline silicon layer 8 is exposed, the second etching condition is switched to the following second etching condition. The monitoring of the end of the patterning of the third silicon oxide layer 6 is the same as in the first embodiment. CHF ₃ 25 sccm CH ₂ F ₂ 25 sccm Gas pressure 0.27 Pa ICP power supply power 2000 W (2.0 MHz) RF bias power 1000 W (1.8 MHz) Etching substrate temperature 20 ° C. Upper electrode temperature 270 ° C. Substrate stage height 150 mm The above etching condition is that the substrate stage height is 150 mm.
Other than the above, the conditions are the same as the first etching conditions for the silicon oxide layer. In the second etching step, since the distance between the plasma 19 and the substrate stage 12 is close to each other, HF which is a dissociation product of the etching gas is re-dissociated in the high density plasma, and F near the substrate to be etched is removed.
^* Concentration increases. Large amount of F produced by re-dissociation
Most of ^* contributes as an etching seed of polycrystalline silicon, and high-speed etching proceeds. Also in this case, although there is concern that the resist mask 9 may be thinned or set back due to F ^* , the thickness of the third polycrystalline silicon layer 8 is 50 nm.
Since it is thin and etching is performed for a short time, no influence on the resist mask 9 was observed.

When the etching of the third polycrystalline silicon wiring 8 is completed in a short time and the surface of the second silicon oxide layer 5 is exposed, the substrate stage 12 is moved to be separated from the plasma 19, and the first silicon oxide layer 5 is removed again. The etching condition is changed to 1. The monitoring of the completion of the etching of the third polycrystalline silicon wiring 8 is the same as that of the first embodiment.

After that, the second silicon oxide layer 5, the second polycrystalline silicon wiring 7 and the first silicon oxide layer 4 were sequentially etched only by moving the substrate stage 12 to expose the surface of the polycide wiring 3. Etching is completed at this point. Depending on the etching conditions for the first silicon oxide layer 4, the mechanism of stopping the etching when the upper WSi _x layer of the polycide wiring 3 is exposed is the same as the mechanism of stopping the etching on the surface of the polycrystalline silicon layer. The state of the formed sidewall contact opening 10 is shown in FIG.

According to this embodiment, it is possible to move the substrate stage 12 only to change the distance from the plasma 19 and to change the etching condition other than that, and to mechanically and rapidly change the silicon layer. It is possible to continuously etch a multi-layered laminated film of a silicon oxide layer and a silicon oxide layer in the same etching chamber. Further, since it is possible to perform high density and large diameter plasma processing of the order of 10 ¹¹ / cm ³ which is about one digit higher than those of Examples 1 and 2, for example, even for a large diameter etched substrate of 8 inches or more, Sidewall contact processing with high throughput and excellent uniformity can be performed.

Embodiment 4 In this embodiment, similarly, the etching of the side wall contact structure of the highly integrated SRAM is performed by using the helicon wave plasma etching apparatus of the substrate bias application, and the distance between the plasma in the plasma generation source and the substrate stage is changed. This is an example performed by moving the substrate stage, which will be described again with reference to FIGS. 1A to 1B and FIG.

FIG. 5 is a diagram showing a schematic configuration example of a substrate bias application type helicon wave plasma etching apparatus used in this embodiment. In FIG. 4, parts having the same functions as those in FIG. 2 are designated by the same reference numerals, and the description thereof will be partially omitted. In the figure, the helicon wave power source 25
By the interaction between the electric field generated by supplying power to the helicon wave antenna 26 by the magnetic field and the magnetic field generated by the solenoid coil assembly 27, a Heusler wave (helicon wave) is generated in the bell jar 17 and the etching chamber 2
High density plasma of etching gas in 2 (not shown)
Generate The high density plasma is efficiently confined in the etching chamber 22 by the multi-pole magnet 28 around the etching chamber 22. The characteristic part of this apparatus is that the substrate stage 12 can be moved in the plasma direction while the central axis of the substrate stage 12, that is, the central axis of the substrate 11 to be etched and the central axis of the plasma are aligned. Also in the present embodiment, the moving means of the substrate stage 12 is not particularly limited, and although not shown, any means such as a cylinder using various pressure mediums or a motor drive can be used. Note that details of the etching gas introduction hole, the vacuum exhaust system, and the like are omitted. The features of the helicon wave plasma etching system are:
Due to the structural characteristics of the helicon wave antenna 26, it is possible to perform etching with high density plasma of the order of 10 ¹³ / cm ^{3 which is} higher than that of the plasma generation source of the previous embodiment.

Next, the dry etching method of this embodiment will be described. The substrate to be etched used in this example is the same as that in Example 1, and will be described again with reference to FIG. 1, and duplicate description will be omitted. The substrate 11 to be etched shown in FIG. 1A is placed on the substrate stage 12 of a helicon wave plasma etching apparatus applying a substrate bias, and as an example, the third silicon oxide layer 6 is exposed under the following first etching conditions. The part was etched. C ₄ F ₈ 25 sccm H ₂ 25 sccm Gas pressure 0.1 Pa Helicon wave power source power 2500 W (13.56 MH
z) Substrate bias power 300 W (800 kHz) Substrate temperature to be etched 20 ° C. Substrate stage height 0 mm Of the above etching conditions, the substrate stage height refers to the moving position of the substrate stage 12, and moves downward from the lower end of the bell jar 17. The position separated by 250 mm is used as a reference point, and this is set to 0 mm. In this etching step, most of HF, which is a dissociation product generated in the plasma by the helicon wave plasma, is removed from the exhaust system, and the optimum etching condition with a large C / F ratio causes
Patterning of the third silicon oxide layer 6 proceeds.

The etching of the third silicon oxide layer 6 is completed.
And when the third polycrystalline silicon layer 8 is exposed,
Switch to the second etching conditions. Here again
The ringing conditions are the same as in Example 1. C_FourF₈ 25 sccm H₂ 25 sccm gas pressure 0.1 Pa helicon wave power source power 2500 W (13.56 MH
z) Substrate bias power 300 W (800 kHz) Substrate temperature to be etched 20 ° C. Substrate stage height 200 mm Under the above etching conditions, the substrate stage height is 200 m.
m, that is, 50 mm from the lower end of the bell jar 17.
Oxidized silicon, except that it moved and shortened the distance from the plasma.
The etching conditions are the same as those for the con layer. Book etching
The dissociation product HF of the etching gas is
Re-dissociation by con-wave plasma and a large amount of F ^*Produces
Almost all of them are polycrystalline silicon etching seeds
And contribute to high-speed etching.

When the etching of the third polycrystalline silicon wiring 8 is completed in a short time and the surface of the second silicon oxide layer 5 is exposed, the substrate stage is separated from the plasma and the first etching condition is set again. Switch. The monitoring conditions for the completion of etching the second polycrystalline silicon wiring 8 are the same as those in the first embodiment.

Hereinafter, the first etching condition and the second etching condition are switched only by moving the substrate stage 12, and the second silicon oxide layer 5, the second polycrystalline silicon wiring 7 and the first silicon oxide layer are switched. 4 is sequentially etched, and the etching is finished when the surface of the polycide wiring 3 is exposed. Depending on the etching conditions for the first silicon oxide layer 4, the mechanism of stopping the etching when the upper WSi _x layer of the polycide wiring 3 is exposed is the same as the mechanism of stopping the etching on the surface of the polycrystalline silicon layer.
The state of the formed sidewall contact opening 10 is shown in FIG.

According to the present embodiment, it is not necessary to switch the etching conditions other than the movement of the substrate stage, and the multi-layer laminated film of the silicon layer and the silicon oxide layer is formed in the same etching chamber by a mechanical and rapid method. It is possible to perform continuous etching with a high density plasma of about 10 ¹³ / cm ³ and a process with extremely high throughput is possible.

The present invention has been described above with reference to four examples, but the present invention is not limited to these examples.

For example, as a plasma etching apparatus,
A substrate bias application type ECR plasma etching apparatus,
The ICP etching device and the helicon wave plasma etching device have been exemplified, but the TCP etching device is also 10 ^12.
It can be preferably used because it generates high-density plasma of the order of 1 / cm ³ . This apparatus introduces the power of the TCP power supply into the etching chamber by a spiral coil arranged on the top plate of the etching chamber made of a dielectric material such as quartz, and generates high density plasma there. .
A moving means may be added to the substrate stage of this apparatus.

Although the opening of the sidewall contact has been described as an example of the etching sample, the present invention can be widely used in the case of continuously patterning a multilayer structure in which silicon layers and silicon oxide layers are alternately laminated. . In addition to polycrystalline silicon, the silicon layer may be single crystal silicon, amorphous silicon, metal silicide, SiC, or the like. In addition to SiO ₂ , the silicon oxide layer may be silicate glass such as PSG, BSG, BPSG, SiON, or the like.

CHF ₃ , CHF as etching gas
_{The 3} / CH ₂ F ₂ mixed gas and the C ₄ F ₈ / H ₂ mixed gas are exemplified, but a mixed gas of a CF-based gas such as CF ₄ and H ₂ or an F atom of the CF-based gas is replaced with an H atom. It may be a gas that is generated. In addition, Ar is used as the etching gas.
A rare gas such as He or He, or O ₂ or N ₂ may be further added.

[0063]

As is apparent from the above description, according to the present invention, a multilayer film in which a silicon layer and a silicon oxide layer are laminated is the same without switching the etching gas composition or transporting between etching apparatuses. It became possible to perform continuous etching in the etching device.

Further, in the present invention, it is possible to etch the above-mentioned multilayer film while ensuring a high selection ratio for the lowermost silicon layer. Further, since it is possible to form the optimum etching conditions for each layer to be etched by a simple operation of only moving the substrate stage or moving plasma, it is possible to achieve etching of the multilayer film with high throughput.

With the above-described effects, it becomes possible to put into practical use a semiconductor device based on a fine design rule utilizing, for example, a sidewall contact, with high reliability and productivity, and the present invention provides a highly integrated semiconductor device or the like. Makes a great contribution to the manufacturing process.

[Brief description of drawings]

FIG. 1 is a schematic cross-sectional view for explaining Examples 1, 2, 3 and 4 to which the plasma etching method of the present invention is applied, in the order of steps, and (a) shows a resist mask for forming a sidewall contact opening. The state (b) is a state in which the sidewall contact is opened.

FIG. 2 is a schematic cross-sectional view of a substrate bias application type ECR plasma etching apparatus used in Example 1 of the plasma etching apparatus of the present invention.

FIG. 3 is a schematic cross-sectional view of a substrate bias application type ECR plasma etching apparatus used in Example 2 of the plasma etching apparatus of the present invention.

FIG. 4 is a schematic cross-sectional view of a substrate bias application type ICP etching apparatus used in Example 2 of the plasma etching apparatus of the present invention.

FIG. 5 is a schematic cross-sectional view of a substrate bias application type helicon wave plasma etching apparatus used in Example 3 of the plasma etching apparatus of the present invention.

[Explanation of symbols]

 1 semiconductor substrate 2 element isolation layer 3 polycide wiring 4 first silicon oxide layer 5 second silicon oxide layer 6 third silicon oxide layer 7 second polycrystalline silicon wiring 8 third polycrystalline silicon wiring 9 resist Mask 11 Substrate to be etched 12 Substrate stage 13 Clamper 14 Substrate bias power supply 15 Magnetron 16 Microwave waveguide 17 Belger 18 Solenoid coil 19 Plasma 20 ICP power supply 21 Inductive coupling coil 22 Etching chamber 23 Upper ground electrode 24 Heater 25 Helicon wave power supply 26 Helicon wave antenna 27 Solenoid coil assembly 28 Multi-pole magnet

Claims (6)

[Claims] 1. 1 × 10 ¹¹ / cm ³ or more 1 × 10 ¹⁴ / c
A plasma etching apparatus for etching a substrate to be etched on a substrate stage with a plasma generation source capable of obtaining a plasma density of less than m ³ , wherein a distance between plasma in the plasma generation source and the substrate to be etched is variable. A plasma etching apparatus comprising means. 2. The means for varying the distance between the plasma in the plasma generation source and the substrate to be etched moves the substrate stage in the direction of the plasma generation source. Plasma etching equipment. 3. The means for varying the distance between the plasma in the plasma generation source and the substrate to be etched is for moving the plasma in the plasma generation source in the direction of the substrate stage. 1. The plasma etching apparatus according to 1. 4. The means for varying the distance between the plasma in the plasma generation source and the substrate to be etched moves the substrate stage in the direction of the plasma generation source, and
The plasma in a plasma generation source is moved in the direction of the substrate stage.
The plasma etching apparatus described. 5. When the plasma etching apparatus according to claim 1 is used and a CF-based gas and a gas containing H ₂ are used to continuously plasma-etch a laminated film of a silicon layer and a silicon oxide layer, a plasma is generated. The plasma etching method, wherein the distance between the plasma in the source and the substrate to be etched is smaller when etching the silicon layer than when etching the silicon oxide layer. 6. The plasma etching apparatus according to claim 1 is used, and a gas containing a CHF-based gas is used.
When performing continuous plasma etching of a laminated film of a silicon layer and a silicon oxide layer, the distance between the plasma in the plasma generation source and the substrate to be etched is larger when the silicon layer is etched and when the silicon oxide layer is etched. Plasma etching method characterized by being smaller than.