JPH0870139A - Crystal growth method for n-type gallium nitride-based compound semiconductor - Google Patents
Crystal growth method for n-type gallium nitride-based compound semiconductorInfo
- Publication number
- JPH0870139A JPH0870139A JP22767994A JP22767994A JPH0870139A JP H0870139 A JPH0870139 A JP H0870139A JP 22767994 A JP22767994 A JP 22767994A JP 22767994 A JP22767994 A JP 22767994A JP H0870139 A JPH0870139 A JP H0870139A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- nitride semiconductor
- type
- grown
- buffer layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Semiconductor Lasers (AREA)
- Led Devices (AREA)
Abstract
(57)【要約】
【目的】 MOVPE、MBE法等の気相成長法によ
り、格子整合していない基板の表面にn型窒化物半導体
を成長させる際に、n型窒化物半導体層の格子欠陥を少
なくして成長させる方法を提供することにより、n型窒
化物半導体層の表面に成長させる他の窒化物半導体の結
晶性を向上させて、発光素子、受光素子等の効率を向上
させる。
【構成】 n型窒化物半導体層3'成長中に、そのn型
窒化物半導体層3'と組成の異なる第二のn型窒化物半
導体層33(InaAlbGa1-a-bN、0≦a、0≦b、a
+b≦1)を少なくとも一層以上成長させるか、または
n型窒化物半導体層3'を少なくとも5μm以上の膜厚
で成長させる。
(57) [Summary] [Objective] When an n-type nitride semiconductor is grown on the surface of a substrate that is not lattice-matched by a vapor phase growth method such as MOVPE or MBE, lattice defects in the n-type nitride semiconductor layer. By providing a method of growing the nitride semiconductor layer with a reduced amount, the crystallinity of the other nitride semiconductor grown on the surface of the n-type nitride semiconductor layer is improved, and the efficiency of the light emitting element, the light receiving element and the like is improved. A second n-type nitride semiconductor layer 33 (In a Al b Ga 1-ab N, 0) having a composition different from that of the n-type nitride semiconductor layer 3 ′ is grown during growth of the n-type nitride semiconductor layer 3 ′. ≤ a, 0 ≤ b, a
+ B ≦ 1) is grown in at least one layer or the n-type nitride semiconductor layer 3 ′ is grown in a film thickness of at least 5 μm.
Description
【0001】[0001]
【産業上の利用分野】本発明は発光ダイオード、レーザ
ダイオード等の電子デバイスに使用されるn型窒化ガリ
ウム系化合物半導体(InXAlYGa1-X-YN、0≦X、
0≦Y、X+Y≦1、以下窒化ガリウム系化合物半導体を
窒化物半導体という。)の結晶成長方法に係り、特に、
基板上に直接またはバッファ層を介してn型窒化物半導
体の結晶を成長させる方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an n-type gallium nitride compound semiconductor (In X Al Y Ga 1-XY N, 0≤X , used for electronic devices such as light emitting diodes and laser diodes.
0 ≦ Y, X + Y ≦ 1, and hereinafter the gallium nitride-based compound semiconductor is referred to as a nitride semiconductor. ) Crystal growth method,
The present invention relates to a method for growing an n-type nitride semiconductor crystal directly on a substrate or via a buffer layer.
【0002】[0002]
【従来の技術】青色、紫外に発光するレーザダイオー
ド、発光ダイオードの材料として窒化物半導体(InX'
AlY'Ga1-X'-Y'N、0≦X'、0≦Y'、X'+Y'≦1)
が注目されており、最近この材料で光度1cdの青色発
光ダイオードが実用化されたばかりである。この青色発
光ダイオードは図1に示すように、サファイアよりなる
基板1の表面に、GaNよりなるバッファ層2と、Ga
Nよりなるn型層3と、AlGaNよりなるn型クラッ
ド層4と、InGaNよりなる活性層5と、AlGaN
よりなるp型クラッド層6と、GaNよりなるp型コン
タクト層7とが順に積層された構造を有している。2. Description of the Related Art Nitride semiconductors (In X ') are used as materials for laser diodes and light emitting diodes that emit blue and ultraviolet light.
Al Y 'Ga 1-X'- Y' N, 0 ≦ X ', 0 ≦ Y', X '+ Y' ≦ 1)
, And a blue light emitting diode with a luminous intensity of 1 cd has recently been put into practical use with this material. As shown in FIG. 1, this blue light emitting diode has a substrate 1 made of sapphire, a buffer layer 2 made of GaN, and a Ga layer.
N-type layer 3 made of N, n-type cladding layer 4 made of AlGaN, active layer 5 made of InGaN, and AlGaN
The p-type clad layer 6 made of GaN and the p-type contact layer 7 made of GaN are sequentially stacked.
【0003】窒化物半導体素子は、一般にMOVPE
(有機金属気相エピタキシャル)法、MBE(分子線エ
ピタキシャル)法、HDVPE(ハイドライド気相エピ
タキシャル)法等の気相成長法を用い、基板表面に窒化
物半導体層を積層させることにより得られる。基板には
サファイア、ZnO、SiC、GaAs、MgO等の材
料が使用される。基板の表面にはバッファ層を介してn
型の窒化物半導体(In XAlYGa1-X-YN、0≦X、0
≦Y、X+Y≦1、その中でも特にn型GaN、n型Al
GaNが多い。)が成長される。また、SiC、ZnO
のように窒化物半導体と格子定数の近い基板を用いる場
合には、バッファ層を形成せず、基板に直接n型窒化物
半導体が成長されることもある。基本的には、基板の表
面にまずn型窒化物半導体層を成長させることにより、
発光素子、受光素子等の窒化物半導体素子が作製され
る。[0003] Nitride semiconductor devices are generally MOVPE
(Metal organic vapor phase epitaxy) method, MBE
HDVPE (Hydride vapor phase epitaxy) method
Nitriding on the substrate surface using vapor phase growth method such as
It is obtained by stacking the semiconductor layers. On the board
Materials such as sapphire, ZnO, SiC, GaAs, MgO
Fees are used. N on the surface of the substrate via a buffer layer
Type nitride semiconductor (In XAlYGa1-XYN, 0 ≦ X, 0
≦ Y, X + Y ≦ 1, especially n-type GaN and n-type Al
There are many GaN. ) Is grown. In addition, SiC, ZnO
When using a substrate with a lattice constant close to that of a nitride semiconductor, such as
In this case, the n-type nitride is directly formed on the substrate without forming the buffer layer.
Sometimes semiconductors are grown. Basically, the board table
By first growing an n-type nitride semiconductor layer on the surface,
Nitride semiconductor devices such as light emitting devices and light receiving devices are manufactured.
It
【0004】例えばMOVPE法によると、窒化物半導
体は、原料ガスにGa源、Al源、In源となる有機金
属化合物ガスと、N源となるアンモニアガスとが用いら
れる。これらの原料ガスを加熱した基板表面に接触させ
ることにより原料ガスを分解して、基板上に窒化物半導
体がエピタキシャル成長される。バッファ層には通常G
aN、AlN、GaAlN等が選択され、300℃〜9
00℃の温度で10オングストローム〜0.1μmの厚
さで成長される。バッファ層の上に成長するn型窒化物
半導体層は900℃以上の温度で、通常1μm以上、4
μm以下の膜厚で成長される。According to the MOVPE method, for example, a nitride semiconductor uses, as a source gas, an organometallic compound gas serving as a Ga source, an Al source, an In source, and an ammonia gas serving as an N source. The raw material gas is decomposed by bringing these raw material gases into contact with the heated substrate surface, and a nitride semiconductor is epitaxially grown on the substrate. Normally G for the buffer layer
aN, AlN, GaAlN, etc. are selected and 300 ° C to 9
It is grown to a thickness of 10 Å to 0.1 μm at a temperature of 00 ° C. The n-type nitride semiconductor layer grown on the buffer layer has a temperature of 900.degree.
It is grown to a thickness of less than μm.
【0005】[0005]
【発明が解決しようとする課題】窒化物半導体は、完全
に格子整合する基板がないため、非常にエピタキシャル
成長させにくい結晶であることが知られている。従っ
て、従来ではSiC基板のように、成長させようする窒
化物半導体の格子定数に近い基板を利用するか、または
格子不整合を緩和するバッファ層を介して無理矢理エピ
タキシャル成長されてきた。It is known that a nitride semiconductor is a crystal that is very difficult to grow epitaxially because there is no substrate that is completely lattice-matched. Therefore, conventionally, epitaxial growth has been performed by using a substrate having a lattice constant close to that of the nitride semiconductor to be grown, such as a SiC substrate, or by interposing a buffer layer that relaxes the lattice mismatch.
【0006】格子整合しない基板の表面に成長したn型
窒化物半導体の結晶の模式断面図を一例として図2に示
す。これはジャーナル オブ クリスタル グロウス
{Jounal of Crystal Growth, 115, (1991) P628−63
3}より引用したものであり、サファイア基板の表面に
AlNよりなるバッファ層を介してn型GaNをエピタ
キシャル成長させ、その断面をTEM(transmission e
lectron microscopy)で測定して、そのTEM像から結
晶の構造を模式的に示したものである。この図による
と、基板上に配向性が整っていないバッファ層が柱状に
成長されており、そのバッファ層の上にGaNをエピタ
キシャル成長させると、そのバッファ層の一部が種結晶
のような役割を果たして、徐々にGaNの配向性が整う
ことにより、結晶性がよくなったGaN層が成長される
ことを示している。FIG. 2 shows an example of a schematic cross-sectional view of an n-type nitride semiconductor crystal grown on the surface of a substrate that is not lattice-matched. This is the Journal of Crystal Growth {Jounal of Crystal Growth, 115, (1991) P628−63.
3}, n-type GaN is epitaxially grown on the surface of the sapphire substrate via a buffer layer made of AlN, and its cross section is TEM (transmission e).
TEM image, and schematically shows the crystal structure from the TEM image. According to this figure, a buffer layer having a non-oriented orientation is grown in a columnar shape on the substrate, and when GaN is epitaxially grown on the buffer layer, a part of the buffer layer acts as a seed crystal. As a result, it is shown that the GaN layer with improved crystallinity is grown by gradually adjusting the orientation of GaN.
【0007】しかしながら、完全に結晶欠陥の無いGa
Nを成長させることは難しく、図2の破線に示すような
多数の結晶欠陥が、バッファ層とGaN層との界面か
ら、GaN層表面に達するまで伸びている。この欠陥は
結晶の内部で止まるものもあるが、GaN層表面にまで
達するものは、表面で例えば107〜109個/cm2あ
る。同様に図1の発光ダイオード素子においても、n型
層3の結晶中では同様の現象が発生している。However, Ga completely free of crystal defects
It is difficult to grow N, and many crystal defects as shown by the broken line in FIG. 2 extend from the interface between the buffer layer and the GaN layer to reach the surface of the GaN layer. Some of these defects stop inside the crystal, but the number of defects reaching the GaN layer surface is, for example, 10 7 to 10 9 / cm 2 . Similarly, also in the light emitting diode element of FIG. 1, the same phenomenon occurs in the crystal of the n-type layer 3.
【0008】基板の表面に成長したn型窒化物半導体層
の表面に多数の結晶欠陥があると、その欠陥がn型層の
表面に成長するクラッド層、活性層等、全ての半導体層
に受け継がれ、素子構造全体に悪影響を及ぼすという問
題がある。結晶欠陥の多い素子は、例えば上記のような
発光ダイオードとした場合に、発光出力、寿命等の素子
性能に悪影響を及ぼすという欠点がある。When a large number of crystal defects are present on the surface of the n-type nitride semiconductor layer grown on the surface of the substrate, the defects are inherited to all the semiconductor layers such as the clad layer and active layer growing on the surface of the n-type layer. Therefore, there is a problem that the entire device structure is adversely affected. An element having many crystal defects has a drawback that it adversely affects element performance such as light emission output and life when it is used as a light emitting diode as described above.
【0009】基板の表面にまずn型窒化物半導体層を成
長させるにあたり、結晶欠陥の少ないn型結晶を成長さ
せることが非常に重要であり、それを実現できれば、そ
のn型結晶の上に成長させるクラッド層、活性層等の結
晶欠陥が少なくなるので、窒化物半導体より成るあらゆ
る素子の性能を向上させることができる。従って、本発
明はこのような事情を鑑みなされたものであり、MOV
PE、MBE法等の気相成長法により、完全に格子整合
していない基板の表面にn型窒化物半導体層を成長させ
る際に、そのn型窒化物半導体層の格子欠陥を少なくし
て成長させる方法を提供することを目的とする。When growing an n-type nitride semiconductor layer on the surface of a substrate, it is very important to grow an n-type crystal with few crystal defects. If it can be realized, it grows on the n-type crystal. Since the number of crystal defects in the clad layer, the active layer and the like to be reduced is reduced, it is possible to improve the performance of any device made of a nitride semiconductor. Therefore, the present invention has been made in view of such circumstances, and MOV
When growing an n-type nitride semiconductor layer on the surface of a substrate that is not completely lattice-matched by a vapor phase growth method such as PE or MBE, the n-type nitride semiconductor layer is grown with fewer lattice defects. The purpose is to provide a method of doing.
【0010】[0010]
【課題を解決するための手段】本発明の方法の第一の態
様は、気相成長法により基板表面に直接、またはバッフ
ァ層を介してn型窒化物半導体(InXAlYGa1-X-Y
N、0≦X、0≦Y、X+Y≦1)の結晶を成長させる方法
において、前記n型窒化物半導体層成長中に、そのn型
窒化物半導体層と組成の異なる第二の窒化物半導体層
(InaAlbGa 1-a-bN、0≦a、0≦b、a+b≦1)
を少なくとも一層以上成長させることを特徴とする。The first aspect of the method of the present invention
Directly on the substrate surface by vapor phase epitaxy or
N-type nitride semiconductor (InXAlYGa1-XY
Method of growing crystal of N, 0 ≦ X, 0 ≦ Y, X + Y ≦ 1)
In the step of growing the n-type nitride semiconductor layer,
Second nitride semiconductor layer having a composition different from that of the nitride semiconductor layer
(InaAlbGa 1-abN, 0 ≦ a, 0 ≦ b, a + b ≦ 1)
Is grown at least one layer or more.
【0011】また本発明の方法の第二の態様は、気相成
長法により基板表面に直接、またはバッファ層を介して
n型窒化ガリウム系化合物半導体(InXAlYGa
1-X-YN、0≦X、0≦Y、X+Y≦1)の結晶を成長させ
る方法において、前記n型窒化ガリウム系化合物半導体
層を少なくとも5μm以上の膜厚で成長させることを特
徴とする。The second aspect of the method of the present invention is that the n-type gallium nitride-based compound semiconductor (In X Al Y Ga) is directly applied to the substrate surface by vapor phase epitaxy or via a buffer layer.
In the method of growing a crystal of 1-XY N, 0 ≦ X, 0 ≦ Y, X + Y ≦ 1), the n-type gallium nitride based compound semiconductor layer is grown to a film thickness of at least 5 μm or more.
【0012】[0012]
【作用】第一の態様において、n型窒化物半導体層の中
に、組成の異なる第二の窒化物半導体層を形成すると、
第二の窒化物半導体が緩衝層、即ちバッファ層として作
用するので、バッファ層で結晶欠陥を緩和できると考え
られる(以下本明細書において、第二の窒化物半導体層
を第二のバッファ層という)。詳しく述べると、n型窒
化物半導体層が基板上に成長される場合、基板と窒化物
半導体とのミスマッチが大きいため、成長中に図2の破
線に示すような結晶欠陥が結晶中に発生する。ところ
が、成長させようとするn型窒化物半導体層と組成の異
なる第二のバッファ層を中間層として介在させることに
より、n型窒化物半導体層の連続した結晶欠陥が、組成
が異なる第二のバッファ層で一時的に止まる。次に、第
二のバッファ層の表面にn型窒化物半導体を成長させる
際は、その第二のバッファ層がミスマッチの少ない基板
のような作用をするため、第二のバッファ層の上に成長
させるn型窒化物半導体の結晶性がよくなると推察され
る。In the first aspect, when a second nitride semiconductor layer having a different composition is formed in the n-type nitride semiconductor layer,
Since the second nitride semiconductor acts as a buffer layer, that is, a buffer layer, it is considered that crystal defects can be relaxed in the buffer layer (hereinafter, the second nitride semiconductor layer is referred to as a second buffer layer). ). More specifically, when the n-type nitride semiconductor layer is grown on the substrate, a large mismatch between the substrate and the nitride semiconductor causes a crystal defect as shown by a broken line in FIG. 2 in the crystal during the growth. . However, by interposing the second buffer layer having a different composition from that of the n-type nitride semiconductor layer to be grown as an intermediate layer, continuous crystal defects in the n-type nitride semiconductor layer have a different composition. It temporarily stops at the buffer layer. Next, when the n-type nitride semiconductor is grown on the surface of the second buffer layer, the second buffer layer acts like a substrate with a small number of mismatches, so that it grows on the second buffer layer. It is assumed that the crystallinity of the n-type nitride semiconductor to be improved is improved.
【0013】第二のバッファ層は一層以上形成すればよ
く、その一層あたりの膜厚は10オングストローム
(0.001μm)以上、1μm以下、さらに好ましく
は0.001μm以上、0.1μm以下の範囲に調整す
ることが望ましい。0.001μmよりも薄いと、結晶
欠陥を第二のバッファ層で結晶欠陥を止めることが困難
となる傾向にある。また1μmよりも厚いと第二のバッ
ファ層から新たな結晶欠陥が発生しやすくなる傾向にあ
るからである。この第二のバッファ層はまた、一層の膜
厚が数十オングストロームで、それを2層以上積層した
多層膜とすることもできる。The second buffer layer may be formed in one or more layers, and the thickness of each layer is 10 angstrom (0.001 μm) or more and 1 μm or less, and more preferably 0.001 μm or more and 0.1 μm or less. It is desirable to adjust. If the thickness is less than 0.001 μm, it tends to be difficult to stop the crystal defects in the second buffer layer. On the other hand, if the thickness is more than 1 μm, new crystal defects tend to be generated from the second buffer layer. The second buffer layer may also be a multilayer film in which one layer has a thickness of several tens of angstroms and two or more layers are laminated.
【0014】第二のバッファ層はInaGa1-aN(0<
a≦1)、もしくはAlbGa1-bN(0<b≦1)、また
は組成の異なるAlbGa1-bN(0≦b≦1)の薄膜を
積層した多層膜であることが望ましい。さらに好ましく
はa値が0.5以下のInaGa1-aNか、またはb値が
0.5以下のAlbGa1-bNを成長させる。なぜなら、
窒化物半導体では四元混晶の半導体層よりも、前記のよ
うな三元混晶の方が結晶性がよい。その中でも三元混晶
のInaGa1-aN、AlbGa1-bNにおいて、a値、お
よびb値を前記範囲に調整したバッファ層が、さらに結
晶性のよいものが得られるため、第二のバッファ層の結
晶欠陥が少なくなり、第二のバッファ層の上に成長する
n型窒化物半導体層の結晶欠陥が少なくなる。さらに、
第二のバッファ層を多層膜とすると結晶欠陥を非常によ
く止めることができる。最も好ましい組み合わせは、n
型窒化物半導体層がn型GaN(GaNが最も格子欠陥
が少ない。)、第二のバッファ層がn型InaGa1-aN
(0<a≦0.5)か、若しくはn型AlbGa1-bN
(0<b≦0.5)か、または組成の異なるAlbGa
1-bN(0≦b≦1)の薄膜を積層した多層膜(超格子)
である。The second buffer layer is In a Ga 1-a N (0 <
a ≦ 1), or Al b Ga 1-b N (0 <b ≦ 1), or Al b Ga 1-b N (0 ≦ b ≦ 1) having different compositions. desirable. More preferably, In a Ga 1-a N having an a value of 0.5 or less or Al b Ga 1-b N having a b value of 0.5 or less is grown. Because
In a nitride semiconductor, the ternary mixed crystal has better crystallinity than the quaternary mixed crystal semiconductor layer. Among them, in In a Ga 1-a N and Al b Ga 1-b N of the ternary mixed crystal, the buffer layer having the a value and the b value adjusted to the above range can have a better crystallinity. The crystal defects of the second buffer layer are reduced, and the crystal defects of the n-type nitride semiconductor layer grown on the second buffer layer are reduced. further,
When the second buffer layer is a multilayer film, crystal defects can be stopped very well. The most preferred combination is n
-Type nitride semiconductor layer is n-type GaN (GaN has the least lattice defects), and the second buffer layer is n-type In a Ga 1 -a N
(0 <a ≦ 0.5) or n-type Al b Ga 1-b N
(0 <b ≦ 0.5) or Al b Ga with different composition
Multilayer film (superlattice) in which 1-b N (0 ≦ b ≦ 1) thin films are stacked
Is.
【0015】さらに、第二のバッファ層の電子キャリア
濃度は先に形成したn型窒化物半導体層とほぼ同一か、
またはそれより大きく調整することが望ましい。図3お
よび図4は本発明の方法により得られたn型窒化物半導
体層3”の上に、nクラッド層4'、活性層5'、pクラ
ッド層6'、pコンタクト層7'を積層して実際の発光素
子として、その発光素子の構造を断面図でもって示した
図である。図3は、第二のバッファ層33が、負電極形
成用のn型層のエッチング面よりも活性層5'側にある
のに対し、図4は第二のバッファ層33がエッチング面
よりも基板1'側に形成された点で異なっている。例え
ば、図3に示すような発光素子を実現した場合、つまり
第二のバッファ層33の位置が、負電極を形成すべきエ
ッチング面よりも活性層側に近い位置にあるような素子
を実現した場合、第二のバッファ層33の電子キャリア
濃度がn型層3'よりも小さいと、第二のバッファ層で
nからpへ供給される電子が阻止されて、n型層からp
層に電流が流れにくくなり、素子の性能が悪くなる。逆
に、第二のバッファ層33の電子キャリア濃度がn型層
3よりも大きいと、電子は第二のバッファ層33に均一
に広がりやすくなるので、均一な発光を得ることができ
る。一方、図4のような素子であると、第二のバッファ
層33の電子キャリア濃度は小さくても、電流は電子キ
ャリア濃度の大きいn型層3”の方を流れるので、発光
素子の特性にはほとんど影響がないが、逆に第二のバッ
ファ層33の電子キャリア濃度が大きい場合は、電流は
第二のバッファ層33の方に流れやすくなって、均一な
発光が得られる。従って、第二のバッファ層33の電子
キャリア濃度は先に形成したn型窒化物半導体層とほぼ
同一か、またはそれより大きく調整することが好まし
い。Further, the electron carrier concentration of the second buffer layer is almost the same as that of the n-type nitride semiconductor layer formed previously,
Or it is desirable to adjust it larger. 3 and 4 show an n-type clad layer 4 ', an active layer 5', a p-clad layer 6 ', and a p-contact layer 7'laminated on the n-type nitride semiconductor layer 3 "obtained by the method of the present invention. 3 is a view showing a structure of the light emitting element as a cross-sectional view as an actual light emitting element, in which the second buffer layer 33 is more active than the etching surface of the n-type layer for forming the negative electrode. 4 is different from that on the layer 5 ′ side in that the second buffer layer 33 is formed on the substrate 1 ′ side with respect to the etching surface, for example, to realize a light emitting device as shown in FIG. In that case, that is, in the case of realizing an element in which the position of the second buffer layer 33 is closer to the active layer side than the etching surface on which the negative electrode is to be formed, the electron carrier concentration of the second buffer layer 33 is Is smaller than the n-type layer 3 ′, the second buffer layer supplies n to p. Electrons are blocked and p from the n-type layer is blocked.
It becomes difficult for current to flow through the layers, and the device performance deteriorates. On the contrary, when the electron carrier concentration of the second buffer layer 33 is higher than that of the n-type layer 3, the electrons are likely to spread uniformly in the second buffer layer 33, and uniform light emission can be obtained. On the other hand, in the case of the device as shown in FIG. 4, even if the electron carrier concentration of the second buffer layer 33 is small, the current flows through the n-type layer 3 ″ having a high electron carrier concentration, so that the characteristics of the light emitting device are improved. Has almost no effect, on the contrary, when the electron carrier concentration of the second buffer layer 33 is high, the current easily flows to the second buffer layer 33, and uniform light emission is obtained. The electron carrier concentration of the second buffer layer 33 is preferably adjusted to be substantially the same as or larger than that of the n-type nitride semiconductor layer formed previously.
【0016】次に、本発明の第二の態様では、n型窒化
物半導体層を5μmよりも厚く成長させることにより、
表面に到達する結晶欠陥を少なくできる。図2におい
て、破線がn型層の中間で止まっているのは、結晶欠陥
が途中で止まっていることを示している。この途中で止
まっている結晶欠陥について、さらによく研究してみる
と、n型窒化物半導体層が基板からおよそ4μmぐらい
で止まるものが多いことを新たに見いだした。そこで、
同一材料を連続して成長中であれば、結晶欠陥を成長中
に次第に止めることが可能であるので、5μm以上でn
層を成長させることにより、n層の表面にまで到達する
結晶欠陥を少なくすることができる。第二の態様におい
て、さらに好ましいn型窒化物半導体層の厚さは7μm
以上である。Next, in the second aspect of the present invention, by growing the n-type nitride semiconductor layer to a thickness of more than 5 μm,
Crystal defects reaching the surface can be reduced. In FIG. 2, the broken line stopping in the middle of the n-type layer indicates that the crystal defect stops halfway. A closer study of the crystal defects that stopped in the middle of the process revealed that many of the n-type nitride semiconductor layers stopped about 4 μm from the substrate. Therefore,
If the same material is continuously grown, it is possible to gradually stop crystal defects during the growth.
By growing the layer, crystal defects reaching the surface of the n layer can be reduced. In the second aspect, the more preferable thickness of the n-type nitride semiconductor layer is 7 μm.
That is all.
【0017】本発明の第一の態様および第二の態様にお
いて、基板上に成長させるn型窒化物半導体(InXA
lYGa1-X-YN、0≦X、0≦Y、X+Y≦1)は、Y値が
0≦Y≦0.5の範囲のAlYGa1-YN、さらに好まし
くは0.3以下のAlYGa1-YN、最も好ましくはY=
0のGaNを成長させる。なぜなら、前記のように四元
混晶の窒化物半導体より、三元混晶の窒化物半導体の方
が結晶欠陥が少ないからである。さらに、発光素子、受
光素子等の電子デバイスとしてn型窒化物半導体を利用
する際には、まず基板上に成長させるn型窒化物半導体
は、バンドギャップの小さいInGaNよりもバンドギ
ャップの大きいAlGaN、GaNの方がシングルへテ
ロ、ダブルへテロ等種々の構造を実現する上で好都合で
あるからである。その中でも、特にAlGaNはAlを
含有させるほど結晶欠陥が多くなる傾向にあり、GaN
が最も結晶欠陥の少ないn型窒化物半導体層を成長でき
る傾向にある。In the first and second aspects of the present invention, an n-type nitride semiconductor (In x A) grown on a substrate is used.
L Y Ga 1-XY N, 0 ≦ X, 0 ≦ Y, X + Y ≦ 1) is Al Y Ga 1-Y N having a Y value in the range of 0 ≦ Y ≦ 0.5, and more preferably 0.3 or less. Al Y Ga 1-Y N, most preferably Y =
0 GaN is grown. This is because the ternary mixed crystal nitride semiconductor has fewer crystal defects than the quaternary mixed crystal nitride semiconductor as described above. Further, when using an n-type nitride semiconductor as an electronic device such as a light emitting element or a light receiving element, first, an n-type nitride semiconductor grown on a substrate is AlGaN having a larger band gap than InGaN having a smaller band gap. This is because GaN is more convenient for realizing various structures such as single hetero and double hetero. Among them, especially AlGaN tends to have more crystal defects as the content of Al increases.
Has a tendency to grow an n-type nitride semiconductor layer having the least crystal defects.
【0018】さらにまた、本発明の方法の第一の態様お
よび第二の態様において、基板にはサファイア、GaA
s、Si、ZnO、SiC等の材料が使用できるが、一
般的にはサファイアを用いる。サファイアを基板とする
場合には、基板にはバッファ層を成長させることが好ま
しいが、サファイア基板の面方位によってはバッファ層
無しでも成長可能である。好ましくバッファ層を成長さ
せることにより、格子欠陥を計測できるような平滑で鏡
面状のn型窒化物半導体の結晶を得ることができる。ま
た、窒化物半導体をn型にするにはノンドープの状態
で、またはSi、Ge、C等のドナー不純物を結晶成長
中にドープすることにより実現可能である。Furthermore, in the first and second aspects of the method of the present invention, the substrate is sapphire or GaA.
Materials such as s, Si, ZnO, and SiC can be used, but sapphire is generally used. When sapphire is used as the substrate, it is preferable to grow the buffer layer on the substrate, but it is possible to grow without the buffer layer depending on the plane orientation of the sapphire substrate. By preferably growing the buffer layer, it is possible to obtain a smooth and mirror-like n-type nitride semiconductor crystal capable of measuring lattice defects. Further, the n-type of the nitride semiconductor can be realized in a non-doped state or by doping a donor impurity such as Si, Ge, or C during crystal growth.
【0019】[0019]
【実施例】以下、MOVPE法による本発明の方法を詳
説する。 [実施例1] まず、よく洗浄したサファイア基板を反応容器内の
サセプターの上に設置する。容器内を真空排気した後、
水素ガスを容器内に流しながら、基板を1050℃で約
20分間加熱し表面の酸化物を除去して、基板のクリー
ニングを行う。その後サセプターの温度を500℃に調
整し、500℃においてGa源としてTMG(トリメチ
ルガリウムガス)、N源としてアンモニアガスを基板の
表面に流しながら、GaNよりなるバッファ層を0.0
2μmの膜厚で成長させる。The method of the present invention by the MOVPE method will be described in detail below. Example 1 First, a well-cleaned sapphire substrate is placed on the susceptor in the reaction vessel. After evacuating the inside of the container,
While flowing hydrogen gas into the container, the substrate is heated at 1050 ° C. for about 20 minutes to remove the oxide on the surface, and the substrate is cleaned. After that, the temperature of the susceptor was adjusted to 500 ° C., and TMG (trimethylgallium gas) as a Ga source and ammonia gas as an N source were flown on the surface of the substrate at 500 ° C., and the buffer layer made of GaN was 0.0
Grow with a film thickness of 2 μm.
【0020】 次に、TMGガスを止め、温度を10
50℃まで上昇させた後、TMGガス、SiH4ガスを
流し、Siドープn型GaN層を2μmの膜厚で成長さ
せる。Next, the TMG gas was stopped and the temperature was raised to 10
After the temperature is raised to 50 ° C., TMG gas and SiH 4 gas are caused to flow to grow a Si-doped n-type GaN layer with a film thickness of 2 μm.
【0021】 次に、TMGガス、SiH4ガスを止
め温度を800℃にする。800℃になったらキャリア
ガスを窒素に切り替え、TMGガス、TMI(トリメチ
ルインジウム)、SiH4ガスを流し、第二のバッファ
層としてSiドープn型In0.1Ga0.9N層を0.01
μmの膜厚で成長させる。Next, the TMG gas and SiH 4 gas are stopped and the temperature is raised to 800 ° C. When the temperature reaches 800 ° C., the carrier gas is switched to nitrogen, TMG gas, TMI (trimethylindium), and SiH 4 gas are caused to flow, and a Si-doped n-type In0.1Ga0.9N layer is added as a second buffer layer to 0.01.
Grow with a film thickness of μm.
【0022】 In0.1Ga0.9N層成長後、再度温度
を1050℃まで上昇させ、キャリアガスを水素に戻し
てTMGガスおよびSiH4ガスを流し、同様にしてS
iドープn型GaN層を2μmの膜厚で成長させる。な
お第二のバッファ層のキャリア濃度とこのn型GaN層
のキャリア濃度はほぼ同一とした。After the growth of the In0.1Ga0.9N layer, the temperature is raised again to 1050 ° C., the carrier gas is returned to hydrogen, TMG gas and SiH 4 gas are caused to flow, and S is similarly added.
An i-doped n-type GaN layer is grown to a film thickness of 2 μm. The carrier concentration of the second buffer layer and the carrier concentration of this n-type GaN layer were set to be substantially the same.
【0023】成長後、基板を反応容器から取り出し、最
上層のn型GaN層の表面をTEMで測定し、そのTE
M像より、単位面積あたりの結晶欠陥の数を計測したと
ころ、およそ1×104個/cm2であった。After the growth, the substrate was taken out of the reaction vessel, the surface of the uppermost n-type GaN layer was measured by TEM, and its TE was measured.
When the number of crystal defects per unit area was measured from the M image, it was about 1 × 10 4 / cm 2 .
【0024】[実施例2]およびのn型窒化物半導
体層の工程において、TMG、TMA(トリメチルアル
ミニウム)、SiH4ガスを用い、Siドープn型Al
0.3Ga0.7N層をそれぞれ2μmの膜厚でで成長させて
第二のバッファ層を挟む構造とする他は、実施例1と同
様に行う。その結果、同様にして計測したところ、Si
ドープn型Al0.3Ga0.7N層表面に達している結晶欠
陥の数はおよそ5×105個/cm2であった。なお、Si
ドープn型Al0.3Ga0.7N層の電子キャリア濃度は第
二のバッファ層とほぼ同一とした。In the process of [Example 2] and the n-type nitride semiconductor layer, TMG, TMA (trimethylaluminum), and SiH 4 gas were used, and Si-doped n-type Al was used.
The same procedure as in Example 1 is performed, except that a 0.3 Ga0.7 N layer is grown to a thickness of 2 μm to sandwich the second buffer layer. As a result, when measured in the same manner, Si
The number of crystal defects reaching the surface of the doped n-type Al0.3Ga0.7N layer was about 5 × 10 5 / cm 2 . Note that Si
The electron carrier concentration of the doped n-type Al0.3Ga0.7N layer was almost the same as that of the second buffer layer.
【0025】[実施例3]のn型窒化物半導体層の工
程と同様にしてSiドープn型GaN層を1μmの膜厚
で成長させる。次にの第二のバッファ層の工程と同様
にして、第二のバッファ層としてSiドープn型In0.
1Ga0.9N層を50オングストロームの膜厚で成長させ
る。さらに、のn型窒化物半導体層の工程と同様にし
て同じくSiドープn型GaN層を1μmの膜厚で順に
成長させる。A Si-doped n-type GaN layer is grown to a film thickness of 1 μm in the same manner as the n-type nitride semiconductor layer process of [Example 3]. Similar to the next step for the second buffer layer, Si-doped n-type In0.
A 1 Ga 0.9 N layer is grown to a thickness of 50 Å. Further, similarly to the step of forming the n-type nitride semiconductor layer, similarly, a Si-doped n-type GaN layer is sequentially grown to a film thickness of 1 μm.
【0026】さらに、Siドープn型GaN層の上に
の工程と同様にして、第三のバッファ層としてSiドー
プn型In0.1Ga0.9N層を50オングストロームの膜
厚でもう一度成長させた後、最後にの工程と同様にし
てSiドープGaN層を2μmの膜厚で成長させる。つ
まり実施例3では、サファイア基板の表面にGaNバッ
ファ層200オングストローム、n型GaN層1μm、
Siドープn型In0.1Ga0.9N第二バッファ層50オ
ングストローム、n型GaN層1μm、Siドープn型
In0.1Ga0.9N第三バッファ層50オングストロー
ム、n型GaN層2μmを順に積層した。Further, in the same manner as the step on the Si-doped n-type GaN layer, a Si-doped n-type In0.1Ga0.9N layer as a third buffer layer was grown again to a film thickness of 50 angstroms, and then, Similar to the last step, a Si-doped GaN layer is grown to a film thickness of 2 μm. That is, in Example 3, the GaN buffer layer 200 angstrom, the n-type GaN layer 1 μm,
A Si-doped n-type In0.1Ga0.9N second buffer layer 50 angstrom, an n-type GaN layer 1 μm, a Si-doped n-type In0.1Ga0.9N third buffer layer 50 angstrom, and an n-type GaN layer 2 μm were sequentially stacked.
【0027】その結果、最終層のSiドープn型GaN
層の表面に達している結晶欠陥の数はおよそ1×104
個/cm2であった。なお第二のバッファ層と第三のバッ
ファ層とSiドープn型GaN層との電子キャリア濃度
はほぼ同一とした。As a result, the final layer of Si-doped n-type GaN
The number of crystal defects reaching the surface of the layer is about 1 × 10 4
The number was pieces / cm 2 . The electron carrier concentrations of the second buffer layer, the third buffer layer, and the Si-doped n-type GaN layer were substantially the same.
【0028】[実施例4]の第二のバッファ層の工程
において、成長温度を変化させずTMG、TMA(トリ
メチルアルミニウム)、SiH4ガスを用い、Siドー
プn型Al0.3Ga0.7N層を0.01μmの膜厚で成長
させて第二のバッファ層を形成する他は、実施例1と同
様に行う。その結果、同様にして計測したところ、Si
ドープn型GaN層表面に達している結晶欠陥の数はお
よそ1×104個/cm2であった。なお、第二のバッファ
層の電子キャリア濃度はSiドープn型GaN層とほぼ
同一とした。In the step of forming the second buffer layer of [Example 4], TMG, TMA (trimethylaluminum), and SiH 4 gas were used without changing the growth temperature, and the Si-doped n-type Al0.3Ga0.7N layer was reduced to 0. The same procedure as in Example 1 is performed except that the second buffer layer is formed by growing the film with a thickness of 0.01 μm. As a result, when measured in the same manner, Si
The number of crystal defects reaching the surface of the doped n-type GaN layer was about 1 × 10 4 / cm 2 . The electron carrier concentration of the second buffer layer was almost the same as that of the Si-doped n-type GaN layer.
【0029】[実施例5]の第二のバッファ層の工程
において、成長温度を変化させずTMG、TMA、Si
H4ガスを用い、まずSiドープn型Al0.02Ga0.98
N層を30オングストロームの膜厚で成長させる。次に
TMAガスを止め、Siドープn型GaN層を30オン
グストロームの膜厚で成長させる。そして、この操作を
それぞれ5回繰り返し、30オングストロームのSiド
ープn型Al0.02Ga0.98N層と、30オングストロー
ムのn型GaN層とをそれぞれ交互に5層づつ積層した
多層膜を形成する。以上のようにして第二のバッファ層
を形成する他は、実施例1と同様に行う。その結果、格
子欠陥を同様にして計測したところ、Siドープn型G
aN層表面に達している結晶欠陥の数はおよそ5×10
3個/cm2であった。なお、第二のバッファ層である多層
膜の電子キャリア濃度は、Siドープn型GaN層とほ
ぼ同一とした。In the step of forming the second buffer layer in [Example 5], TMG, TMA, and Si were used without changing the growth temperature.
First, using H 4 gas, Si-doped n-type Al0.02Ga0.98
The N layer is grown to a film thickness of 30 Å. Next, the TMA gas is stopped and a Si-doped n-type GaN layer is grown to a film thickness of 30 Å. Then, this operation is repeated 5 times to form a multilayer film in which 30 angstroms of Si-doped n-type Al0.02Ga0.98N layer and 30 angstroms of n-type GaN layer are alternately laminated in five layers. The procedure is the same as in Example 1 except that the second buffer layer is formed as described above. As a result, when lattice defects were measured in the same manner, Si-doped n-type G
The number of crystal defects reaching the surface of the aN layer is approximately 5 × 10.
It was 3 pieces / cm 2 . The electron carrier concentration of the multilayer film, which is the second buffer layer, was almost the same as that of the Si-doped n-type GaN layer.
【0030】[実施例6]実施例2の工程において、第
二のバッファ層としてSiドープn型Al0.1GaGa
0.9Nを0.01μmの膜厚で成長させる他は同様にし
て、Siドープn型Al0.3Ga0.7N層を成長させた。
その結果、最表面のn型Al0.3Ga0.7N層に達してい
た格子欠陥の数はおよそ1×105/cm2であった。なお
この実施例の電子キャリア濃度もほぼ同一とした。[Sixth Embodiment] In the process of the second embodiment, Si-doped n-type Al0.1GaGa is used as the second buffer layer.
A Si-doped n-type Al0.3Ga0.7N layer was grown in the same manner except that 0.9N was grown to a film thickness of 0.01 μm.
As a result, the number of lattice defects reaching the n-type Al0.3Ga0.7N layer on the outermost surface was about 1 × 10 5 / cm 2. It should be noted that the electron carrier concentrations in this example were also substantially the same.
【0031】[比較例1]実施例1において、第二のバ
ッファ層を成長させず、連続してSiドープn型GaN
層を4μmの膜厚で成長させたところ、n型GaN層の
表面に達した結晶欠陥の数はおよそ1×107個/cm2で
あった。Comparative Example 1 In Example 1, the Si-doped n-type GaN was continuously grown without growing the second buffer layer.
When the layer was grown to a film thickness of 4 μm, the number of crystal defects reaching the surface of the n-type GaN layer was about 1 × 10 7 / cm 2 .
【0032】[実施例7]実際の発光素子の構造とした
実施例を示す。実施例1のの工程の後に以下の工程を
加えた。 Siドープn型GaN層成長後、新たにTMA(ト
リメチルアルミニウム)ガスを加え、同じく1050℃
で、nクラッド層としてSiドープn型Al0.2Ga0.8
N層を0.1μmの膜厚で成長させる。[Embodiment 7] An embodiment of the structure of an actual light emitting device will be described. Following the steps of Example 1, the following steps were added. After growth of the Si-doped n-type GaN layer, TMA (trimethylaluminum) gas is newly added, and the temperature is also 1050 ° C.
Then, as the n-clad layer, Si-doped n-type Al0.2Ga0.8
The N layer is grown to a film thickness of 0.1 μm.
【0033】 nクラッド層成長後、TMG、TM
A、SiH4ガスを止め、再び温度を800℃に設定し
て、TMG、TMI、SiH4ガスに加えてDEZ(ジ
エチルジンク)を流し、活性層としてSiおよびZnド
ープIn0.05Ga0.95N層を0.1μmの膜厚で成長さ
せる。After growing the n-clad layer, TMG, TM
A, stop the SiH 4 gas, set the temperature to 800 ° C. again, and flow DEZ (diethyl zinc) in addition to TMG, TMI, SiH 4 gas, and Si and Zn-doped In0.05Ga0.95N layer as an active layer. Grow with a film thickness of 0.1 μm.
【0034】 活性層成長後、TMG、TMI、Si
H4、DEZガスを止め、温度を1050℃にした後、
TMG、TMA、Cp2Mg(シクロペンタジエニルマ
グネシウム)ガスを流し、pクラッド層としてMgドー
プp型Al0.1Ga0.9N層を0.1μmの膜厚で成長さ
せる。After growth of the active layer, TMG, TMI, Si
After stopping the H 4 and DEZ gases and setting the temperature to 1050 ° C.,
TMG, TMA, and Cp2Mg (cyclopentadienylmagnesium) gas are flown to grow a Mg-doped p-type Al0.1Ga0.9N layer as a p-clad layer to a thickness of 0.1 μm.
【0035】 p型Al0.1Ga0.9N層成長後、TM
Aガスを止め、同じく1050℃でpコンタクト層とし
てMgドープp型GaN層を0.3μmの膜厚で成長さ
せる。After growth of p-type Al0.1Ga0.9N layer, TM
The gas A is stopped, and a Mg-doped p-type GaN layer is grown to a thickness of 0.3 μm as a p-contact layer at 1050 ° C.
【0036】 以上のようにして得た素子のエッチン
グを行い、第二のバッファ層の次に成長したn型GaN
層を露出させ、pコンタクト層と、露出したSiドープ
n型GaN層とに電極を形成した。つまり図4に示すよ
うな構造の発光ダイオード素子とした。さらにこの素子
をリードフレームに取り付け、樹脂でモールドした。こ
の発光ダイオードは20mAにおいてVf3.6V、発
光波長450nmであり、光度3.0cd、発光出力は
3.5mWであった。The element obtained as described above was etched to grow n-type GaN next to the second buffer layer.
The layer was exposed and electrodes were formed on the p-contact layer and the exposed Si-doped n-type GaN layer. That is, a light emitting diode element having a structure as shown in FIG. 4 was used. Further, this element was attached to a lead frame and molded with resin. This light emitting diode had a Vf of 3.6 V and an emission wavelength of 450 nm at 20 mA, a luminous intensity of 3.0 cd, and an emission output of 3.5 mW.
【0037】[比較例2]比較例1で成長させたSiド
ープGaN層の上に、実施例7と同一の工程を行い、図
1に示すような構造の発光ダイオード素子としたとこ
ろ、この発光ダイオードは20mAにおいてVf3.6
V、発光波長450nmであったが、光度は1.0cd
であり、発光出力は1.2mWしかなかった。[Comparative Example 2] The same steps as in Example 7 were performed on the Si-doped GaN layer grown in Comparative Example 1 to obtain a light emitting diode device having a structure as shown in FIG. Diode is Vf3.6 at 20mA
V, emission wavelength was 450 nm, but luminous intensity was 1.0 cd
And the emission output was only 1.2 mW.
【0038】このように本発明の第一の方法によると、
結晶欠陥の少ないn型層が得られるので、その上に積層
するクラッド層、活性層等の結晶欠陥が少なくなる。特
に活性層の膜厚は約0.2μm以下と薄いため、結晶欠
陥の少ない結晶を成長させることは非常に重要である。
従って、結晶欠陥の少ない結晶を成長できたことによ
り、従来の光度1cd以上の光度を有し、発光出力に優
れた発光ダイオード素子を実現できる。Thus, according to the first method of the present invention,
Since the n-type layer having few crystal defects is obtained, the number of crystal defects in the clad layer, the active layer and the like laminated thereon is reduced. In particular, since the thickness of the active layer is as thin as about 0.2 μm or less, it is very important to grow a crystal with few crystal defects.
Therefore, since a crystal with few crystal defects can be grown, it is possible to realize a light emitting diode element having a luminous intensity of 1 cd or more and a superior luminous output in the related art.
【0039】[実施例8]以下本発明の第二の態様につ
いて具体的な実施例を示す。この実施例も第一の方法と
同様にMOVPEで成長させる手法を示すものであるの
で基本的操作に大差はない。 実施例1のの工程と同様にしてサファイア基板の
表面にGaNよりなるバッファ層を0.02μmの膜厚
で成長させる。[Embodiment 8] A concrete embodiment of the second aspect of the present invention will be described below. Since this example also shows a method of growing by MOVPE as in the first method, there is no great difference in the basic operation. A buffer layer made of GaN is grown to a thickness of 0.02 μm on the surface of the sapphire substrate in the same manner as in the process of the first embodiment.
【0040】 実施例1のの工程と同様にして、バ
ッファ層の上に、Siドープn型GaN層を10μmの
膜厚で成長させる。Similar to the process of Example 1, a Si-doped n-type GaN layer is grown to a thickness of 10 μm on the buffer layer.
【0041】成長後、基板を反応容器から取り出し、n
型GaN層表面をTEMで測定し、そのTEM像より、
単位面積あたりの結晶欠陥の数を計測したところ、およ
そ1×105個/cm2であった。After the growth, the substrate was taken out of the reaction vessel and n
Type GaN layer surface was measured by TEM, and from the TEM image,
When the number of crystal defects per unit area was measured, it was about 1 × 10 5 defects / cm 2 .
【0042】[実施例9]Siドープn型GaN層の膜
厚を5μmとする他は実施例5と同様にして結晶成長を
行ったところ、n型GaN層表面の結晶欠陥の数はおよ
そ5×106個であった。[Embodiment 9] Crystal growth was performed in the same manner as in Embodiment 5 except that the film thickness of the Si-doped n-type GaN layer was 5 μm. The number of crystal defects on the surface of the n-type GaN layer was about 5. The number was × 10 6 .
【0043】[実施例10]実施例5のの工程におい
て、実施例2のと同様にしてSiドープn型Al0.3
Ga0.7N層を連続して10μmの厚さで成長させる他
は同様にして結晶成長を行ったところ、n型Al0.3G
a0.7N層表面の結晶欠陥の数は、およそ3×106個/
cm2であった。[Embodiment 10] In the process of Embodiment 5, as in Embodiment 2, Si-doped n-type Al0.3
Crystal growth was performed in the same manner except that a Ga0.7N layer was continuously grown to a thickness of 10 μm.
The number of crystal defects on the a0.7N layer surface is about 3 × 10 6 /
It was cm 2 .
【0044】[実施例11]実施例5で得られたSiド
ープGaN層の上に実施例7と同様にして、nクラッド
層、活性層、pクラッド層、pコンタクト層を積層し
て、同様にして発光ダイオードとしたところ、その特性
は実施例7のものとほぼ同等であった。[Embodiment 11] An n-clad layer, an active layer, a p-clad layer and a p-contact layer are laminated on the Si-doped GaN layer obtained in Embodiment 5 in the same manner as in Embodiment 7, and the same. When a light emitting diode was manufactured as described above, its characteristics were almost the same as those of Example 7.
【0045】[0045]
【発明の効果】以上説明したように、本発明の方法によ
ると基板の表面に結晶欠陥の少ないn型窒化物半導体層
を成長させることができる。従って本発明の方法は、格
子整合する基板のない窒化物半導体にとって、結晶欠陥
の少ない結晶を積層し、発光素子、受光素子等の電子デ
バイスを実現するうえで、非常に有用である。As described above, according to the method of the present invention, the n-type nitride semiconductor layer having few crystal defects can be grown on the surface of the substrate. Therefore, the method of the present invention is very useful for a nitride semiconductor having no lattice-matched substrate to stack crystals with few crystal defects and realize an electronic device such as a light emitting device or a light receiving device.
【図1】 従来の発光ダイオード素子の一構造を示す模
式断面図。FIG. 1 is a schematic cross-sectional view showing one structure of a conventional light emitting diode element.
【図2】 基板の表面にAlNバッファ層を介してn型
GaN層を成長した際の結晶の構造を示す模式断面図。FIG. 2 is a schematic cross-sectional view showing a crystal structure when an n-type GaN layer is grown on the surface of a substrate via an AlN buffer layer.
【図3】 本発明の方法により得られたn型窒化物半導
体層を有する発光ダイオード素子の一構造を示す模式断
面図。FIG. 3 is a schematic cross-sectional view showing one structure of a light emitting diode element having an n-type nitride semiconductor layer obtained by the method of the present invention.
【図4】 本発明の方法により得られたn型窒化物半導
体層を有する発光ダイオード素子の一構造を示す模式断
面図。FIG. 4 is a schematic cross-sectional view showing one structure of a light emitting diode element having an n-type nitride semiconductor layer obtained by the method of the present invention.
1、1’・・・基板 2、2'・
・・バッファ層 3、3'、3”・・・n型窒化物半導体層 4、4'・
・・n型クラッド層 5、5'・・・活性層 6、6'・
・・pクラッド層 7、7'・・・pコンタクト層 33・・・第二のバッファ層(第二の窒化物半導体層)1, 1 '... Substrate 2, 2'
..Buffer layers 3, 3 ', 3 "... N-type nitride semiconductor layers 4, 4' ..
..N-type cladding layers 5 and 5 '... active layers 6 and 6'
..P cladding layer 7, 7 '... p contact layer 33 ... second buffer layer (second nitride semiconductor layer)
Claims (4)
はバッファ層を介してn型窒化ガリウム系化合物半導体
(InXAlYGa1-X-YN、0≦X、0≦Y、X+Y≦1)
の結晶を成長させる方法において、前記n型窒化ガリウ
ム系化合物半導体層成長中に、そのn型窒化ガリウム系
化合物半導体層と組成の異なる第二のn型窒化ガリウム
系化合物半導体層(InaAlbGa1-a-bN、0≦a、0
≦b、a+b≦1)を少なくとも一層以上成長させること
を特徴とするn型窒化ガリウム系化合物半導体の結晶成
長方法。1. An n-type gallium nitride compound semiconductor (In X Al Y Ga 1-XY N, 0 ≦ X, 0 ≦ Y, X + Y ≦ 1 directly on the surface of the substrate by a vapor phase growth method or via a buffer layer. )
In the method of growing a crystal, the second n-type gallium nitride compound semiconductor layer (In a Al b) having a different composition from the n-type gallium nitride compound semiconductor layer is grown during the growth of the n-type gallium nitride compound semiconductor layer. Ga 1-ab N, 0 ≦ a, 0
A crystal growth method for an n-type gallium nitride-based compound semiconductor, which comprises growing at least one layer of ≦ b, a + b ≦ 1).
導体層の一層あたりの膜厚が1μm以下であることを特
徴とする請求項1に記載のn型窒化ガリウム系化合物半
導体の結晶成長方法。2. The crystal growth method of an n-type gallium nitride compound semiconductor according to claim 1, wherein the thickness of each second n-type gallium nitride compound semiconductor layer is 1 μm or less. .
導体層がInaGa1-aN(0<a≦1)、もしくはAlb
Ga1-bN(0<b≦1)、または組成の異なるAlbG
a1-bN(0≦b≦1)の薄膜を積層した多層膜であるこ
とを特徴とする請求項1または請求項2に記載のn型窒
化ガリウム系化合物半導体の結晶成長方法。3. The second n-type gallium nitride based compound semiconductor layer is In a Ga 1 -a N (0 <a ≦ 1), or Al b
Ga 1-b N (0 <b ≦ 1) or AlbG with different composition
The crystal growth method for an n-type gallium nitride compound semiconductor according to claim 1 or 2, which is a multilayer film in which thin films of a1-bN (0≤b≤1) are laminated.
はバッファ層を介してn型窒化ガリウム系化合物半導体
(InXAlYGa1-X-YN、0≦X、0≦Y、X+Y≦1)
の結晶を成長させる方法において、前記n型窒化ガリウ
ム系化合物半導体層を5μm以上の膜厚で成長させるこ
とを特徴とするn型窒化ガリウム系化合物半導体の結晶
成長方法。4. An n-type gallium nitride-based compound semiconductor (In X Al Y Ga 1-XY N, 0 ≦ X, 0 ≦ Y, X + Y ≦ 1 directly on the substrate surface or via a buffer layer by a vapor phase growth method. )
In the method for growing a crystal, the n-type gallium nitride based compound semiconductor layer is grown to a thickness of 5 μm or more.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP22767994A JP2956489B2 (en) | 1994-06-24 | 1994-09-22 | Crystal growth method of gallium nitride based compound semiconductor |
| JP32938498A JP3548442B2 (en) | 1994-09-22 | 1998-11-19 | Gallium nitride based compound semiconductor light emitting device |
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6-142720 | 1994-06-24 | ||
| JP14272094 | 1994-06-24 | ||
| JP22767994A JP2956489B2 (en) | 1994-06-24 | 1994-09-22 | Crystal growth method of gallium nitride based compound semiconductor |
Related Child Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP32938498A Division JP3548442B2 (en) | 1994-09-22 | 1998-11-19 | Gallium nitride based compound semiconductor light emitting device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0870139A true JPH0870139A (en) | 1996-03-12 |
| JP2956489B2 JP2956489B2 (en) | 1999-10-04 |
Family
ID=26474636
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP22767994A Expired - Fee Related JP2956489B2 (en) | 1994-06-24 | 1994-09-22 | Crystal growth method of gallium nitride based compound semiconductor |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2956489B2 (en) |
Cited By (28)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2001007393A (en) * | 1999-06-08 | 2001-01-12 | Agilent Technol Inc | AlGaInN based LED with epitaxial layer |
| US6566677B2 (en) | 2000-03-24 | 2003-05-20 | Sanyo Electric Co., Ltd. | Nitride-based semiconductor device and manufacturing method thereof |
| US6677619B1 (en) | 1997-01-09 | 2004-01-13 | Nichia Chemical Industries, Ltd. | Nitride semiconductor device |
| WO2004036708A1 (en) * | 2002-10-15 | 2004-04-29 | Pioneer Corporation | Group iii nitride semiconductor light-emitting device and method for manufacturing same |
| US6822272B2 (en) | 2001-07-09 | 2004-11-23 | Nichia Corporation | Multilayered reflective membrane and gallium nitride-based light emitting element |
| JP2005056922A (en) * | 2003-08-06 | 2005-03-03 | Rohm Co Ltd | Semiconductor light emitting device |
| US6958497B2 (en) | 2001-05-30 | 2005-10-25 | Cree, Inc. | Group III nitride based light emitting diode structures with a quantum well and superlattice, group III nitride based quantum well structures and group III nitride based superlattice structures |
| JP2006179959A (en) * | 2006-03-24 | 2006-07-06 | Nichia Chem Ind Ltd | Nitride semiconductor light emitting device |
| US7166874B2 (en) | 1995-11-06 | 2007-01-23 | Nichia Corporation | Nitride semiconductor with active layer of quantum well structure with indium-containing nitride semiconductor |
| JP2007049169A (en) * | 1995-11-27 | 2007-02-22 | Sumitomo Chemical Co Ltd | Group 3-5 compound semiconductor light emitting device |
| JP2007067397A (en) * | 1995-11-27 | 2007-03-15 | Sumitomo Chemical Co Ltd | Method for producing group 3-5 compound semiconductor |
| JP2007081180A (en) * | 2005-09-15 | 2007-03-29 | Matsushita Electric Ind Co Ltd | Semiconductor light emitting device |
| US7205577B2 (en) | 2001-06-07 | 2007-04-17 | Sumitomo Chemical Company, Limted | Group 3-5 compound semiconductor and light emitting diode |
| US7365369B2 (en) | 1997-06-11 | 2008-04-29 | Nichia Corporation | Nitride semiconductor device |
| DE112006002450T5 (en) | 2005-09-15 | 2008-07-03 | Matsushita Electric Industrial Co., Ltd., Kadoma | Semiconductor light emitting device |
| JP2009010432A (en) * | 1996-04-26 | 2009-01-15 | Sanyo Electric Co Ltd | Method for manufacturing light emitting device |
| US7692182B2 (en) | 2001-05-30 | 2010-04-06 | Cree, Inc. | Group III nitride based quantum well light emitting device structures with an indium containing capping structure |
| USRE42074E1 (en) | 1996-04-26 | 2011-01-25 | Sanyo Electric Co., Ltd. | Manufacturing method of light emitting device |
| US7888670B2 (en) | 2007-04-16 | 2011-02-15 | Samsung Led Co., Ltd. | Nitride semiconductor light emitting device |
| JP2011040487A (en) * | 2009-08-07 | 2011-02-24 | Toyoda Gosei Co Ltd | Method for manufacturing group-iii nitride semiconductor light emitting element |
| US8344398B2 (en) | 2007-01-19 | 2013-01-01 | Cree, Inc. | Low voltage diode with reduced parasitic resistance and method for fabricating |
| JP2013055280A (en) * | 2011-09-06 | 2013-03-21 | Nichia Chem Ind Ltd | Nitride semiconductor light-emitting element |
| US8575592B2 (en) | 2010-02-03 | 2013-11-05 | Cree, Inc. | Group III nitride based light emitting diode structures with multiple quantum well structures having varying well thicknesses |
| US8679876B2 (en) | 2006-11-15 | 2014-03-25 | Cree, Inc. | Laser diode and method for fabricating same |
| JP2014522121A (en) * | 2011-08-02 | 2014-08-28 | 株式会社東芝 | Light emitting device and manufacturing method thereof |
| US8994064B2 (en) | 2011-09-03 | 2015-03-31 | Kabushiki Kaisha Toshiba | Led that has bounding silicon-doped regions on either side of a strain release layer |
| US9012937B2 (en) | 2007-10-10 | 2015-04-21 | Cree, Inc. | Multiple conversion material light emitting diode package and method of fabricating same |
| WO2017221519A1 (en) * | 2016-06-20 | 2017-12-28 | ソニー株式会社 | Nitride semiconductor element, nitride semiconductor substrate, method for manufacturing nitride semiconductor element, and method for manufacturing nitride semiconductor substrate |
Families Citing this family (18)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8664747B2 (en) | 2008-04-28 | 2014-03-04 | Toshiba Techno Center Inc. | Trenched substrate for crystal growth and wafer bonding |
| US8207547B2 (en) | 2009-06-10 | 2012-06-26 | Brudgelux, Inc. | Thin-film LED with P and N contacts electrically isolated from the substrate |
| US8525221B2 (en) | 2009-11-25 | 2013-09-03 | Toshiba Techno Center, Inc. | LED with improved injection efficiency |
| US8395165B2 (en) | 2011-07-08 | 2013-03-12 | Bridelux, Inc. | Laterally contacted blue LED with superlattice current spreading layer |
| US20130026480A1 (en) | 2011-07-25 | 2013-01-31 | Bridgelux, Inc. | Nucleation of Aluminum Nitride on a Silicon Substrate Using an Ammonia Preflow |
| US8916906B2 (en) | 2011-07-29 | 2014-12-23 | Kabushiki Kaisha Toshiba | Boron-containing buffer layer for growing gallium nitride on silicon |
| US9142743B2 (en) | 2011-08-02 | 2015-09-22 | Kabushiki Kaisha Toshiba | High temperature gold-free wafer bonding for light emitting diodes |
| US9343641B2 (en) | 2011-08-02 | 2016-05-17 | Manutius Ip, Inc. | Non-reactive barrier metal for eutectic bonding process |
| US9012939B2 (en) | 2011-08-02 | 2015-04-21 | Kabushiki Kaisha Toshiba | N-type gallium-nitride layer having multiple conductive intervening layers |
| US20130032810A1 (en) | 2011-08-03 | 2013-02-07 | Bridgelux, Inc. | Led on silicon substrate using zinc-sulfide as buffer layer |
| US8564010B2 (en) | 2011-08-04 | 2013-10-22 | Toshiba Techno Center Inc. | Distributed current blocking structures for light emitting diodes |
| US8624482B2 (en) | 2011-09-01 | 2014-01-07 | Toshiba Techno Center Inc. | Distributed bragg reflector for reflecting light of multiple wavelengths from an LED |
| US8558247B2 (en) | 2011-09-06 | 2013-10-15 | Toshiba Techno Center Inc. | GaN LEDs with improved area and method for making the same |
| US8686430B2 (en) | 2011-09-07 | 2014-04-01 | Toshiba Techno Center Inc. | Buffer layer for GaN-on-Si LED |
| US8698163B2 (en) | 2011-09-29 | 2014-04-15 | Toshiba Techno Center Inc. | P-type doping layers for use with light emitting devices |
| US20130082274A1 (en) | 2011-09-29 | 2013-04-04 | Bridgelux, Inc. | Light emitting devices having dislocation density maintaining buffer layers |
| US8581267B2 (en) | 2011-11-09 | 2013-11-12 | Toshiba Techno Center Inc. | Series connected segmented LED |
| US8552465B2 (en) | 2011-11-09 | 2013-10-08 | Toshiba Techno Center Inc. | Method for reducing stress in epitaxial growth |
-
1994
- 1994-09-22 JP JP22767994A patent/JP2956489B2/en not_active Expired - Fee Related
Cited By (49)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7166874B2 (en) | 1995-11-06 | 2007-01-23 | Nichia Corporation | Nitride semiconductor with active layer of quantum well structure with indium-containing nitride semiconductor |
| US8304790B2 (en) | 1995-11-06 | 2012-11-06 | Nichia Corporation | Nitride semiconductor with active layer of quantum well structure with indium-containing nitride semiconductor |
| US7166869B2 (en) | 1995-11-06 | 2007-01-23 | Nichia Corporation | Nitride semiconductor with active layer of quantum well structure with indium-containing nitride semiconductor |
| JP2007067397A (en) * | 1995-11-27 | 2007-03-15 | Sumitomo Chemical Co Ltd | Method for producing group 3-5 compound semiconductor |
| JP2007049169A (en) * | 1995-11-27 | 2007-02-22 | Sumitomo Chemical Co Ltd | Group 3-5 compound semiconductor light emitting device |
| JP2013141025A (en) * | 1996-04-26 | 2013-07-18 | Future Light Limited Liability Company | Light-emitting element manufacturing method |
| EP2383846B1 (en) * | 1996-04-26 | 2020-02-19 | Epistar Corporation | Light emitting device and manufacturing method thereof |
| JP2009010432A (en) * | 1996-04-26 | 2009-01-15 | Sanyo Electric Co Ltd | Method for manufacturing light emitting device |
| JP2012165011A (en) * | 1996-04-26 | 2012-08-30 | Sanyo Electric Co Ltd | Light-emitting device manufacturing method |
| USRE42074E1 (en) | 1996-04-26 | 2011-01-25 | Sanyo Electric Co., Ltd. | Manufacturing method of light emitting device |
| US7211822B2 (en) | 1997-01-09 | 2007-05-01 | Nichia Chemical Industries, Ltd. | Nitride semiconductor device |
| US7615804B2 (en) | 1997-01-09 | 2009-11-10 | Nichia Chemical Industries, Ltd. | Superlattice nitride semiconductor LD device |
| US6849864B2 (en) | 1997-01-09 | 2005-02-01 | Nichia Chemical Industries, Ltd. | Nitride semiconductor device |
| US6677619B1 (en) | 1997-01-09 | 2004-01-13 | Nichia Chemical Industries, Ltd. | Nitride semiconductor device |
| US7365369B2 (en) | 1997-06-11 | 2008-04-29 | Nichia Corporation | Nitride semiconductor device |
| JP2011205144A (en) * | 1999-06-08 | 2011-10-13 | Philips Lumileds Lightng Co Llc | AlGaInN-BASED LED WITH EPITAXIAL LAYER |
| JP2001007393A (en) * | 1999-06-08 | 2001-01-12 | Agilent Technol Inc | AlGaInN based LED with epitaxial layer |
| US6566677B2 (en) | 2000-03-24 | 2003-05-20 | Sanyo Electric Co., Ltd. | Nitride-based semiconductor device and manufacturing method thereof |
| US6872967B2 (en) | 2000-03-24 | 2005-03-29 | Sanyo Electric Co., Ltd. | Nitride-based semiconductor device and manufacturing method thereof |
| US7312474B2 (en) | 2001-05-30 | 2007-12-25 | Cree, Inc. | Group III nitride based superlattice structures |
| US8546787B2 (en) | 2001-05-30 | 2013-10-01 | Cree, Inc. | Group III nitride based quantum well light emitting device structures with an indium containing capping structure |
| US9054253B2 (en) | 2001-05-30 | 2015-06-09 | Cree, Inc. | Group III nitride based quantum well light emitting device structures with an indium containing capping structure |
| US9112083B2 (en) | 2001-05-30 | 2015-08-18 | Cree, Inc. | Group III nitride based light emitting diode structures with a quantum well and superlattice, group III nitride based quantum well structures and group III nitride based superlattice structures |
| US8227268B2 (en) | 2001-05-30 | 2012-07-24 | Cree, Inc. | Methods of fabricating group III nitride based light emitting diode structures with a quantum well and superlattice, group III nitride based quantum well structures and group III nitride based superlattice structures |
| US6958497B2 (en) | 2001-05-30 | 2005-10-25 | Cree, Inc. | Group III nitride based light emitting diode structures with a quantum well and superlattice, group III nitride based quantum well structures and group III nitride based superlattice structures |
| US7692182B2 (en) | 2001-05-30 | 2010-04-06 | Cree, Inc. | Group III nitride based quantum well light emitting device structures with an indium containing capping structure |
| US8044384B2 (en) | 2001-05-30 | 2011-10-25 | Cree, Inc. | Group III nitride based quantum well light emitting device structures with an indium containing capping structure |
| US7205577B2 (en) | 2001-06-07 | 2007-04-17 | Sumitomo Chemical Company, Limted | Group 3-5 compound semiconductor and light emitting diode |
| US6822272B2 (en) | 2001-07-09 | 2004-11-23 | Nichia Corporation | Multilayered reflective membrane and gallium nitride-based light emitting element |
| WO2004036708A1 (en) * | 2002-10-15 | 2004-04-29 | Pioneer Corporation | Group iii nitride semiconductor light-emitting device and method for manufacturing same |
| JP2005056922A (en) * | 2003-08-06 | 2005-03-03 | Rohm Co Ltd | Semiconductor light emitting device |
| US7196347B2 (en) | 2003-08-06 | 2007-03-27 | Rohm Co., Ltd. | Semiconductor light emitting device |
| US7601985B2 (en) | 2005-09-15 | 2009-10-13 | Panasonic Corporation | Semiconductor light-emitting device |
| DE112006002450T5 (en) | 2005-09-15 | 2008-07-03 | Matsushita Electric Industrial Co., Ltd., Kadoma | Semiconductor light emitting device |
| US7863623B2 (en) | 2005-09-15 | 2011-01-04 | Panasonic Corporation | Semiconductor light emitting device |
| JP2007081180A (en) * | 2005-09-15 | 2007-03-29 | Matsushita Electric Ind Co Ltd | Semiconductor light emitting device |
| JP2006179959A (en) * | 2006-03-24 | 2006-07-06 | Nichia Chem Ind Ltd | Nitride semiconductor light emitting device |
| US8679876B2 (en) | 2006-11-15 | 2014-03-25 | Cree, Inc. | Laser diode and method for fabricating same |
| US9041139B2 (en) | 2007-01-19 | 2015-05-26 | Cree, Inc. | Low voltage diode with reduced parasitic resistance and method for fabricating |
| US8344398B2 (en) | 2007-01-19 | 2013-01-01 | Cree, Inc. | Low voltage diode with reduced parasitic resistance and method for fabricating |
| US7888670B2 (en) | 2007-04-16 | 2011-02-15 | Samsung Led Co., Ltd. | Nitride semiconductor light emitting device |
| US9012937B2 (en) | 2007-10-10 | 2015-04-21 | Cree, Inc. | Multiple conversion material light emitting diode package and method of fabricating same |
| JP2011040487A (en) * | 2009-08-07 | 2011-02-24 | Toyoda Gosei Co Ltd | Method for manufacturing group-iii nitride semiconductor light emitting element |
| US8575592B2 (en) | 2010-02-03 | 2013-11-05 | Cree, Inc. | Group III nitride based light emitting diode structures with multiple quantum well structures having varying well thicknesses |
| JP2014522121A (en) * | 2011-08-02 | 2014-08-28 | 株式会社東芝 | Light emitting device and manufacturing method thereof |
| US8994064B2 (en) | 2011-09-03 | 2015-03-31 | Kabushiki Kaisha Toshiba | Led that has bounding silicon-doped regions on either side of a strain release layer |
| JP2013055280A (en) * | 2011-09-06 | 2013-03-21 | Nichia Chem Ind Ltd | Nitride semiconductor light-emitting element |
| WO2017221519A1 (en) * | 2016-06-20 | 2017-12-28 | ソニー株式会社 | Nitride semiconductor element, nitride semiconductor substrate, method for manufacturing nitride semiconductor element, and method for manufacturing nitride semiconductor substrate |
| JPWO2017221519A1 (en) * | 2016-06-20 | 2019-04-11 | ソニー株式会社 | Nitride semiconductor element, nitride semiconductor substrate, method for manufacturing nitride semiconductor element, and method for manufacturing nitride semiconductor substrate |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2956489B2 (en) | 1999-10-04 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP2956489B2 (en) | Crystal growth method of gallium nitride based compound semiconductor | |
| JP3646649B2 (en) | Gallium nitride compound semiconductor light emitting device | |
| JP2932467B2 (en) | Gallium nitride based compound semiconductor light emitting device | |
| JP3548442B2 (en) | Gallium nitride based compound semiconductor light emitting device | |
| JP3604205B2 (en) | Method for growing nitride semiconductor | |
| JP2890396B2 (en) | Nitride semiconductor light emitting device | |
| JP3890930B2 (en) | Nitride semiconductor light emitting device | |
| US8546167B2 (en) | Gallium nitride-based compound semiconductor light-emitting element | |
| JP5145617B2 (en) | N-type nitride semiconductor laminate and semiconductor device using the same | |
| JPH06268259A (en) | Gallium nitride compound semiconductor light emitting device | |
| JP2900990B2 (en) | Nitride semiconductor light emitting device | |
| US7550368B2 (en) | Group-III nitride semiconductor stack, method of manufacturing the same, and group-III nitride semiconductor device | |
| JPH09153642A (en) | Nitride semiconductor light emitting element | |
| WO2010098163A1 (en) | Light emitting element producing method and light emitting element | |
| JP2891348B2 (en) | Nitride semiconductor laser device | |
| JP2985908B2 (en) | Crystal growth method of gallium nitride based compound semiconductor | |
| JP2918139B2 (en) | Gallium nitride based compound semiconductor light emitting device | |
| JP2004014587A (en) | Nitride-based compound semiconductor epitaxial wafer and light emitting device | |
| JP3767491B2 (en) | Gallium nitride compound semiconductor light emitting device | |
| JP3371830B2 (en) | Nitride semiconductor light emitting device | |
| US20060081860A1 (en) | Group III nitride semiconductor light-emitting element and method of manufacturing the same | |
| JP3235440B2 (en) | Nitride semiconductor laser device and method of manufacturing the same | |
| JP3953077B2 (en) | Gallium nitride compound semiconductor light emitting device | |
| JP3888036B2 (en) | Method for growing n-type nitride semiconductor | |
| KR100742989B1 (en) | Method of manufacturing gallium nitride based light emitting device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| FPAY | Renewal fee payment (prs date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20080723 Year of fee payment: 9 |
|
| FPAY | Renewal fee payment (prs date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20080723 Year of fee payment: 9 |
|
| FPAY | Renewal fee payment (prs date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20090723 Year of fee payment: 10 |
|
| FPAY | Renewal fee payment (prs date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20090723 Year of fee payment: 10 |
|
| FPAY | Renewal fee payment (prs date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20090723 Year of fee payment: 10 |
|
| FPAY | Renewal fee payment (prs date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20100723 Year of fee payment: 11 |
|
| FPAY | Renewal fee payment (prs date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20100723 Year of fee payment: 11 |
|
| FPAY | Renewal fee payment (prs date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20110723 Year of fee payment: 12 |
|
| FPAY | Renewal fee payment (prs date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20110723 Year of fee payment: 12 |
|
| FPAY | Renewal fee payment (prs date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20120723 Year of fee payment: 13 |
|
| FPAY | Renewal fee payment (prs date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20120723 Year of fee payment: 13 |
|
| FPAY | Renewal fee payment (prs date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20120723 Year of fee payment: 13 |
|
| FPAY | Renewal fee payment (prs date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20130723 Year of fee payment: 14 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| LAPS | Cancellation because of no payment of annual fees |