JPH087239B2 - Character display device - Google Patents
Character display deviceInfo
- Publication number
- JPH087239B2 JPH087239B2 JP1283570A JP28357089A JPH087239B2 JP H087239 B2 JPH087239 B2 JP H087239B2 JP 1283570 A JP1283570 A JP 1283570A JP 28357089 A JP28357089 A JP 28357089A JP H087239 B2 JPH087239 B2 JP H087239B2
- Authority
- JP
- Japan
- Prior art keywords
- signal
- character display
- character
- circuit
- output
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 238000010408 sweeping Methods 0.000 claims description 3
- 230000003111 delayed effect Effects 0.000 description 19
- 238000010586 diagram Methods 0.000 description 11
- 230000007274 generation of a signal involved in cell-cell signaling Effects 0.000 description 7
- 229920005994 diacetyl cellulose Polymers 0.000 description 4
- 238000010894 electron beam technology Methods 0.000 description 2
- 238000005259 measurement Methods 0.000 description 2
- 230000008054 signal transmission Effects 0.000 description 2
- 230000003247 decreasing effect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000001052 transient effect Effects 0.000 description 1
Landscapes
- Controls And Circuits For Display Device (AREA)
Description
【発明の詳細な説明】 産業上の利用分野 本発明はオシロスコープ等に使用する文字表示装置に
関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a character display device used in an oscilloscope or the like.
従来の技術 近年のオシロスコープには文字やカーソルを表示して
測定をしやすくすることが増えている。ところがリアル
タイムのオシロスコープでは、観測波形を描きながら文
字やカーソルを描くのでブラウン管の電子ビームを時分
割することが避けられない。この結果、観測波形はその
周波数が電子ビームの分割周波数に近いような場合に
は、不連続な輝線で描かれて非常に観測しにくいことに
なる。2. Description of the Related Art In recent years, oscilloscopes are increasingly displaying characters and cursors to facilitate measurement. However, in a real-time oscilloscope, characters and cursors are drawn while drawing the observed waveform, so time-sharing the electron beam of the CRT is inevitable. As a result, when the frequency of the observed waveform is close to the division frequency of the electron beam, the observed waveform is drawn as a discontinuous bright line and is very difficult to observe.
第5図に従来例を示す。その動作第6図の各部波形を
用いて説明する。オシロスコープとしての基本部分につ
いては長年周知の知識となっているので要点のみを説明
する。FIG. 5 shows a conventional example. The operation will be described with reference to the waveforms of each part in FIG. Since the basic part of the oscilloscope has been known for many years, only the essential points will be explained.
垂直軸入力チャネル1入力端子1または垂直軸入力チ
ャネル2入力端子4に印加された被観測波形aは垂直軸
チャネル1回路2または垂直軸チャネル2回路5に於て
所望の振幅に増減されて垂直軸チャネル切換回路3に加
えられて選択的に垂直軸信号遅延回路6に入る。所要の
遅延量を得た被観測信号は垂直軸信号/文字切換回路7
にて文字表示用切換信号fにより、文字表示用垂直軸信
号gと交互に切り換わり、複合した垂直軸信号/文字切
換回路出力信号iとなって垂直軸出力増幅回路8に加え
られ、ブラウン管9の必要とする振幅に増幅されブラウ
ン管9の垂直軸偏向板に加えられる。The observed waveform a applied to the vertical axis input channel 1 input terminal 1 or the vertical axis input channel 2 input terminal 4 is vertically adjusted by increasing or decreasing to a desired amplitude in the vertical axis channel 1 circuit 2 or the vertical axis channel 2 circuit 5. It is added to the axis channel switching circuit 3 and selectively enters the vertical axis signal delay circuit 6. The observed signal that has obtained the required delay amount is the vertical axis signal / character switching circuit 7
In accordance with the character display switching signal f, the character display vertical axis signal g is alternately switched to form a combined vertical axis signal / character switching circuit output signal i which is added to the vertical axis output amplifier circuit 8 and the cathode ray tube 9 It is amplified to the amplitude required by the and is applied to the vertical axis deflection plate of the cathode ray tube 9.
主掃引用同期信号入力端子10には一般に被観測信号a
と相似の信号が垂直軸回路から与えられ主掃引用同期回
路11にて同期レベルvtに達する時刻に同期パルスbを発
生し、主掃引掃引信号発生回路12に加えられて主掃引信
号cを発生する。この主掃引信号cの一部は掃引遅延時
刻発生用比較回路13に遅延ポジションレベル電圧vdと共
に加えられ遅延時刻信号dを発生し、遅延掃引用同期回
路15の出力と共に遅延掃引用掃引信号発生回路16に加え
られて遅延掃引信号eを発生する。主掃引信号cと遅延
掃引信号eとは水平軸信号切換回路17を通して選択的に
水平軸信号/文字切換回路18に加わり、文字表示用水平
軸信号hとの間で文字表示用切換信号fにより交互に切
り換えられる水平軸信号/文字切換回路出力信号jとな
って水平軸信号切換回路17に加わりブラウン管9の必要
とする振幅に増幅されブラウン管9の水平軸偏向板に加
えられる。Generally, the observed signal a is input to the main sweep sync signal input terminal 10.
A signal similar to the above is given from the vertical axis circuit, a synchronizing pulse b is generated at the time when the synchronizing level v t is reached in the main sweep quote synchronizing circuit 11, and the main sweep signal c is added to the main sweep sweep signal generating circuit 12. appear. This part of the main sweep signal c is applied with delay position level voltage v d to a comparison circuit 13 for sweep delay time generating generates a delay time signal d, the delay for sweeping sweep signal generator with the output of the delay sweep synchronization circuit 15 It is applied to the circuit 16 to generate a delayed sweep signal e. The main sweep signal c and the delayed sweep signal e are selectively added to the horizontal axis signal / character switching circuit 18 through the horizontal axis signal switching circuit 17, and the character display switching signal f is used between them and the character display horizontal axis signal h. The horizontal axis signal / character switching circuit output signal j, which is switched alternately, is added to the horizontal axis signal switching circuit 17, amplified to the amplitude required by the cathode ray tube 9, and applied to the horizontal axis deflection plate of the cathode ray tube 9.
垂直軸チャネル切換回路3から得られる垂直軸信号切
換期間内消去信号nと主掃引用信号発生回路12から得ら
れる主掃引ゲート信号と遅延掃引用掃引信号発生回路
16から得られる遅延掃引ゲート信号mは輝度制御外部信
号入力端子20からの外部信号と共に輝度制御信号切換回
路21に加えられて文字表示用輝度制御信号との間で文字
表示用切換信号fにより切り換えられて輝度制御用信号
/文字切換回路出力信号iとなって輝度制御信号増幅回
路22に於てブラウン管9を輝度制御するために必要な振
幅に増幅成形してブラウン管9の第1グリッドに加えら
れる。前述の各種文字信号f,g,h,oは文字信号発生回路2
4で作られ、文字の表示内容、位置、表示タイミングな
どは制御系バス29を通じてCPUを主とする制御系回路30
から指示される。Erase signal n within vertical axis signal switching period obtained from vertical axis channel switching circuit 3, main sweep gate signal obtained from main sweep reference signal generation circuit, and delayed sweep reference sweep signal generation circuit
The delayed sweep gate signal m obtained from 16 is added to the brightness control signal switching circuit 21 together with the external signal from the brightness control external signal input terminal 20 and switched between the character display brightness control signal and the character display switching signal f. The brightness control signal / character switching circuit output signal i is formed into an amplitude necessary for brightness control of the cathode ray tube 9 in the luminance control signal amplifier circuit 22 and added to the first grid of the cathode ray tube 9. . The various character signals f, g, h, and o described above are the character signal generation circuit 2
The control system circuit 30 is mainly made up of the CPU through the control system bus 29.
Instructed by.
発明が解決しようとする課題 しかしながら、被観測信号波形と文字表示とは第8図
に示すようになり、掃引の速さとタイミングによっては
被観測信号波形を描いている期間に文字を表示するため
に切り取られる輝線欠落の部分が非常に目立ち、観測に
支障を与える。とくに遅延掃引機能を用いて被観測信号
波形を水平軸方向に拡大するような場合は文字信号のド
ット期間が掃引時間に近くなることが多くなり、第8図
のように波形上の輝線欠落が致命的な障害を招くことに
なる。However, the observed signal waveform and the character display are as shown in FIG. 8. In order to display the character during the period of drawing the observed signal waveform depending on the sweep speed and timing. The part where the bright line is cut off is very conspicuous, which hinders the observation. Especially when the observed signal waveform is expanded in the horizontal axis direction by using the delayed sweep function, the dot period of the character signal often becomes close to the sweep time, and as shown in FIG. It will cause a fatal obstacle.
本発明はこのような従来の欠点を軽減救済するもので
あり、信号波形とともに文字やカーソルを表示するもの
であっても、輝線欠落の少ない優れた文字表示装置を提
供することを目的とする。An object of the present invention is to alleviate and remedy such conventional drawbacks, and it is an object of the present invention to provide an excellent character display device with few missing bright lines even when displaying characters and cursors together with signal waveforms.
課題を解決するための手段 本発明は上記問題点を解決するために、被観測信号波
形を遅延掃引する遅延掃引手段と文字情報を時分割表示
する手段を有するオシロスコープにおいて、前記文字情
報を表示用画面位置に対応した領域に記憶する記憶手段
と、前記遅延掃引手段の遅延掃引ゲート信号の期間は文
字表示用クロック信号の供給を停止するクロック制御回
路と、前記文字表示用クロック信号応じて前記表示用画
面位置に対応した文字位置信号を出力する文字表示位置
制御用のカウンタ回路と、前記記憶手段に記憶された前
記文字情報を前記カウンタ回路の出力値に対応した領域
より順次読出し、これを文字表示用垂直軸信号及び文字
表示用水平軸信号に交換して出力する文字信号発生手段
と、前記カウンタ回路の出力に基づいて文字表示用輝度
信号を出力する輝度制御回路と、前記カウンタ回路の出
力に基づいて文字表示用切換信号を出力する文字表示用
切換信号出力回路と、前記文字表示用切換信号により被
観測波形表示用輝度信号と前記文字表示用輝度信号を切
換える輝度切換回路とを備えたものである。Means for Solving the Problems In order to solve the above problems, the present invention provides an oscilloscope having a delay sweep means for delay sweeping an observed signal waveform and a means for displaying character information in a time-division manner, for displaying the character information. Storage means for storing in a region corresponding to the screen position, a clock control circuit for stopping the supply of the character display clock signal during the delay sweep gate signal of the delay sweep means, and the display according to the character display clock signal. Counter circuit for controlling the character display position for outputting a character position signal corresponding to the screen position for the display, and the character information stored in the storage means are sequentially read from the area corresponding to the output value of the counter circuit, and the character information is read out. Character signal generating means for exchanging and outputting a vertical axis signal for display and a horizontal axis signal for character display, and character display based on the output of the counter circuit Brightness control circuit for outputting a luminance signal for display, a character display switching signal output circuit for outputting a character display switching signal based on the output of the counter circuit, and an observed waveform display luminance signal by the character display switching signal And a luminance switching circuit for switching the luminance signal for character display.
作用 したがって、本発明は、遅延掃引期間中の文字表示用
信号の発生を停止し、停止期間前後の文字が連続して表
示されるようにし、さらに、被観信号測波形用と文字表
示用に輝度信号を切換えて表示しているため、遅延掃引
拡大表示において被観測信号波形が文字表示機能のため
に途切れることを解消できるとともに、被観信号測波形
及び文字表示をちらつくことなく一定した輝度で表示で
きる。Therefore, the present invention stops the generation of the character display signal during the delayed sweep period so that the characters before and after the stop period are continuously displayed, and further, for the observed signal measurement waveform and the character display. Since the luminance signal is switched and displayed, it is possible to eliminate the discontinuity of the observed signal waveform due to the character display function in the delayed sweep magnified display, and to maintain constant luminance without flickering the observed signal waveform and the character display. Can be displayed.
実施例 第1図は本発明の一実施例を示すブロック図である。
太い実線の部分以外については従来例第5図と全く同一
である。太い実線部分について説明する。Embodiment FIG. 1 is a block diagram showing an embodiment of the present invention.
Except for the thick solid line part, it is exactly the same as FIG. 5 of the conventional example. The thick solid line portion will be described.
遅延掃引ゲード信号mの一部を文字信号発生回路24ま
たは文字表示用切換信号fを抑制する文字表示切換制限
ゲート50に供給して遅延掃引期間中の文字表示動作を禁
止する。これにより、第8図に示した遅延掃引拡大表示
に於て、被観測信号波形が文字表示機能のために途切れ
るという欠点は解決される。また遅延掃引期間は主掃引
期間に対して通常は高くても1/2倍程度であり、遅延掃
引期間に文字を表示しなくてもブラウン管スクリーン上
の文字表示は少くとも70%以上の文字輝度を維持でき、
また文字が欠けることもない。A part of the delayed sweep gated signal m is supplied to the character signal generation circuit 24 or the character display switching limiting gate 50 for suppressing the character display switching signal f to prohibit the character display operation during the delayed sweep period. This solves the problem that the waveform of the observed signal is interrupted due to the character display function in the delayed sweep enlarged display shown in FIG. In addition, the delayed sweep period is usually about 1/2 times higher than the main sweep period, and even if the characters are not displayed during the delayed sweep period, the character display on the CRT screen is at least 70% or more in character brightness. Can be maintained
Also, the letters are not missing.
第1図は本発明の考え方を示すブロック図、第2図は
文字表示回路部分を中心にした本発明の要部の一実施
例、第3図は第2図に示した考え方を具体化した一具体
例、第4図は第2図と第3図の動作例を示す信号波形図
である。FIG. 1 is a block diagram showing the concept of the present invention, FIG. 2 is an embodiment of the main part of the present invention centering on the character display circuit part, and FIG. 3 is a concrete embodiment of the concept shown in FIG. FIG. 4 is a signal waveform diagram showing an operation example of FIGS. 2 and 3 as a specific example.
以下第1図〜第4図を用いて本発明について説明す
る。図中の各部を示す番号および信号を示す文字のう
ち、第5図〜第8図と同じものである1〜30およびa〜
oは同一機能を示すものであり、以後でくり返して説明
することを省略する。すなわち、第1図、第2図に示す
本発明は第5図に示す従来例の一部に変更・増設を加え
たものである。したがって変更・増設部分についての説
明に限定しても支障ないと判断する。The present invention will be described below with reference to FIGS. Among the numbers indicating the respective parts and the characters indicating the signals in the drawings, 1 to 30 and a to which are the same as those in FIGS.
Since o indicates the same function, its repeated description will be omitted. That is, the present invention shown in FIGS. 1 and 2 is obtained by modifying or adding a part of the conventional example shown in FIG. Therefore, it is judged that there is no problem even if the explanation is limited to the changed / added parts.
第1図に於て第5図との変更点は遅延掃引ゲート信号
mを文字信号発生回路24に供給し新たな文字信号発生回
路24aとしたことにある。The difference between FIG. 1 and FIG. 5 is that the delayed sweep gate signal m is supplied to the character signal generating circuit 24 to form a new character signal generating circuit 24a.
新たな文字信号発生回路24aを中心に詳しい構成を第
2図で説明すると、CPUを主とする制御系回路30から制
御系バス回路29を通じて送られてきた文字表示情報rは
文字情報受信レジスタ41にて受信され、同じく文字情報
受信レジスタ41にて受信される制御命令α,β,γ,
δ,εの中の文字表示画面構成用RAM制御信号γによっ
て文字表示画面構成用RAM42に記憶・書込みされる。こ
の記憶書込み動作が終了すると、文字表示位置制御用カ
ウンタ43から出される文字位置信号pに従い、文字表示
画面構成用RAM42に記憶された文字情報であるコード化
文字信号gが読み出されてコード化文字信号→文字表示
信号変換用ROM44に供給され、ベクトル表示に必要な文
字表示信号sに変換されて文字表示信号送出ラッチ45に
入る。文字表示信号送出ラッチ45はROM44が発生する過
渡的な信号の乱れを除去してその出力を文字を実際に表
示するためのアナログ的ベクトル信号を発生するための
2個のデジタル−アナログ変換器(以後DACと呼ぶ)46,
47に供給する。ラッチ45の出力tは二分され、他方、文
字表示位置制御用カウンタ43からの文字位置信号pも二
分され、それぞれ文字表示垂直位置制御信号uと文字表
示水平位置制御信号vとなってそれぞれ文字表示垂直軸
信号発生用DAC46と文字表示水平軸信号発生用DAC47に供
給される。こうして2個のDAC46,47の出力を受ける文字
表示用垂直軸信号出力回路25と文字表示用水平軸信号出
力回路26からそれぞれ文字表示用垂直軸信号gと文字表
示用水平軸信号hが得られる。A detailed configuration centering on the new character signal generation circuit 24a will be described with reference to FIG. 2. The character display information r sent from the control system circuit 30 mainly of the CPU through the control system bus circuit 29 is the character information reception register 41. And the control commands α, β, γ, which are also received by the character information reception register 41.
It is stored / written in the character display screen configuration RAM 42 by the character display screen configuration RAM control signal γ in δ and ε. When this memory writing operation is completed, the coded character signal g, which is the character information stored in the character display screen configuration RAM 42, is read and encoded in accordance with the character position signal p output from the character display position control counter 43. It is supplied to the ROM 44 for converting a character signal to a character display signal, converted into a character display signal s necessary for vector display, and then entered into the character display signal transmission latch 45. The character display signal transmission latch 45 removes the transient signal disturbance generated by the ROM 44, and outputs two digital-analog converters for generating an analog vector signal for actually displaying the character. Hereinafter referred to as DAC) 46,
Supply to 47. The output t of the latch 45 is divided into two parts, while the character position signal p from the character display position control counter 43 is also divided into two parts, which become a character display vertical position control signal u and a character display horizontal position control signal v, respectively. It is supplied to the vertical axis signal generating DAC 46 and the character display horizontal axis signal generating DAC 47. Thus, the character display vertical axis signal output circuit 25 and the character display horizontal axis signal output circuit 26 receiving the outputs of the two DACs 46 and 47 respectively obtain the character display vertical axis signal g and the character display horizontal axis signal h. .
ここで文字表示位置制御用カウンタ43は文字表示用ク
ロック信号制御回路48を経由して文字表示用クロック信
号49を受けて文字表示に必要な位置データを順次生成す
るが、文字表示用クロック信号制御回路48は遅延掃引ゲ
ート信号50を受けて遅延掃引期間である時刻tsからteま
での間はクロック信号の送り出しを抑制するため、文字
表示位置制御用カウンタ43も動作進行が時刻tsからteの
間は中止し、その出力の1つを受ける文字表示用切換信
号出力回路28も文字表示を行うための信号出力の動作が
時刻tsからteの間は中止される。Here, the character display position control counter 43 receives the character display clock signal 49 via the character display clock signal control circuit 48 and sequentially generates the position data necessary for character display. Since the circuit 48 receives the delayed sweep gate signal 50 and suppresses sending of the clock signal from the time t s to the time t e which is the delay sweep period, the operation progress of the character display position control counter 43 also progresses from the time t s. The operation is stopped during t e , and the character display switching signal output circuit 28 that receives one of the outputs is also stopped during the time t s to t e for outputting the signal for displaying characters.
第3図は第2図の一具体例で、第4図の動作をより詳
しく説明する。FIG. 3 is a specific example of FIG. 2, and the operation of FIG. 4 will be described in more detail.
文字表示用クロック信号制御回路48はNORゲートU7で
構成され、遅延掃引ゲート信号mが高準位にある時刻ts
からteの間は同じくNORゲートU7の入力である文字表示
用クロック信号49がNORゲートU7の出力に伝達されるこ
とを阻止する。NORゲートU7の出力はカウンタU8と文字
表示用切換信号回路27のU19に供給されるが、時刻tsか
らteの間は前述の通りクロック信号の供給が止まるので
文字を表示するすべての動作が中止される。時刻teの直
後は再びクロック信号の供給が再開し、文字表示動作が
再開する。The character display clock signal control circuit 48 is composed of the NOR gate U7, and the time t s when the delayed sweep gate signal m is in the high level.
During the period from to t e , the character display clock signal 49, which is also the input of the NOR gate U7, is prevented from being transmitted to the output of the NOR gate U7. The output of the NOR gate U7 is supplied to the counter U8 and U19 of the character display switching signal circuit 27, but during the time t s to t e , the clock signal supply is stopped as described above, so all operations for displaying characters are performed. Is canceled. Immediately after the time t e , the supply of the clock signal is restarted again, and the character display operation is restarted.
こうして時刻tsからteの間、すなわち遅延掃引の期間
は文字表示の動作が中断し、被観測信号波形が文字表示
機能のために切り取られるという欠点を軽減することが
できる。In this way, it is possible to mitigate the disadvantage that the operation of character display is interrupted between the time t s and t e , that is, the period of the delayed sweep, and the observed signal waveform is cut off for the character display function.
発明の効果 本発明は上記実施例より明らかなように、遅延掃引期
間中の文字表示用信号の発生を停止し、停止期間前後の
文字が連続して表示されるようにし、さらに、被観信号
測波形用と文字表示用に輝度信号を切換えて表示してい
るため、遅延掃引拡大表示において被観測信号波形が文
字表示機能のために途切れることを解消できるととも
に、被観信号測波形及び文字表示をちらつくことなく一
定した輝度で表示できるという効果を有する。As is apparent from the above embodiment, the present invention stops generation of the character display signal during the delayed sweep period so that the characters before and after the stop period are continuously displayed, and further, the observed signal Since the luminance signal is switched and displayed for the measured waveform and the character display, it is possible to eliminate the interruption of the observed signal waveform due to the character display function in the delayed sweep magnified display, and to display the observed signal waveform and character display. It has an effect that it can be displayed with constant brightness without flickering.
第1図は本発明の一実施例による文字表示装置を含むオ
シロスコープのブロック図、第2図は同実施例による文
字信号発生回路のブロック図、第3図は第2図の具体回
路図、第4図は同実施例の信号波形図、第5図は従来例
のブロック図、第6図は同従来例の信号波形図、第7図
は文字と信号波形が重複した表示画面図、第8図は一般
の表示画面図である。 7……垂直軸信号/文字切換回路、9……ブラウン管、
12……主掃引用掃引信号発生回路、16……遅延掃引用掃
引信号発生回路、17……水平軸信号切換回路、18……水
平軸信号/文字切換回路、21……輝度制御信号切換回
路、24a……文字信号発生回路。FIG. 1 is a block diagram of an oscilloscope including a character display device according to an embodiment of the present invention, FIG. 2 is a block diagram of a character signal generating circuit according to the same embodiment, and FIG. 3 is a specific circuit diagram of FIG. FIG. 4 is a signal waveform diagram of the same embodiment, FIG. 5 is a block diagram of a conventional example, FIG. 6 is a signal waveform diagram of the conventional example, FIG. 7 is a display screen diagram in which characters and signal waveforms overlap, and FIG. The figure is a general display screen diagram. 7 ... Vertical axis signal / character switching circuit, 9 ... CRT,
12 …… Main sweep quote sweep signal generation circuit, 16 …… Delayed sweep quote sweep signal generator circuit, 17 …… Horizontal axis signal switching circuit, 18 …… Horizontal axis signal / character switching circuit, 21 …… Brightness control signal switching circuit , 24a …… Character signal generation circuit.
Claims (1)
段と文字情報を時分割表示する手段を有するオシロスコ
ープにおいて、前記文字情報を記憶する記憶手段と、前
記遅延掃引手段の遅延掃引ゲート信号の期間は文字表示
用クロック信号の供給を停止するクロック制御回路と、
前記文字表示用クロック信号に応じて文字位置信号を出
力する文字表示位置制御用のカウンタ回路と、前記記憶
手段に記憶された前記文字情報を前記カウンタ回路の出
力値に対応して順次読出し、これを文字表示用垂直軸信
号及び文字表示用水平軸信号に変換して出力する文字信
号発生手段と、前記カウンタ回路の出力に基づいて文字
表示用輝度信号を出力する輝度制御回路と、前記カウン
タ回路の出力に基づいて文字表示用切換信号を出力する
文字表示用切換信号出力回路と、前記文字表示用切換信
号により被観測波形表示用輝度信号と前記文字表示用輝
度信号を切換える輝度切換回路とを備えた文字表示装
置。1. An oscilloscope having a delay sweep means for delay sweeping an observed signal waveform and a means for displaying character information in a time-division manner, and a storage means for storing the character information and a delay sweep gate signal of the delay sweep means. A clock control circuit that stops the supply of the character display clock signal during the period,
A counter circuit for character display position control that outputs a character position signal according to the character display clock signal, and the character information stored in the storage means are sequentially read in correspondence with the output value of the counter circuit. To a character display vertical axis signal and a character display horizontal axis signal for output, a brightness control circuit for outputting a character display brightness signal based on the output of the counter circuit, and the counter circuit A character display switching signal output circuit that outputs a character display switching signal based on the output of the character display, and a luminance switching circuit that switches the observed waveform display luminance signal and the character display luminance signal by the character display switching signal. Equipped character display device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1283570A JPH087239B2 (en) | 1989-10-31 | 1989-10-31 | Character display device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1283570A JPH087239B2 (en) | 1989-10-31 | 1989-10-31 | Character display device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH03144374A JPH03144374A (en) | 1991-06-19 |
| JPH087239B2 true JPH087239B2 (en) | 1996-01-29 |
Family
ID=17667239
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1283570A Expired - Fee Related JPH087239B2 (en) | 1989-10-31 | 1989-10-31 | Character display device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH087239B2 (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP3480651B1 (en) * | 2016-06-30 | 2023-09-13 | Hoya Lens Thailand Ltd. | Spectacle lens and spectacles |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3039173U (en) * | 1996-09-05 | 1997-07-11 | 好子 宮脇 | Ornaments using empty cosmetic containers |
-
1989
- 1989-10-31 JP JP1283570A patent/JPH087239B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JPH03144374A (en) | 1991-06-19 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP2627691B2 (en) | Display device | |
| KR100561655B1 (en) | Image display method and device | |
| JPH0352077B2 (en) | ||
| US4780712A (en) | Polar coordinate display device employing raster scan scheme | |
| US4556879A (en) | Video display apparatus | |
| JPH087239B2 (en) | Character display device | |
| JPH0670649B2 (en) | oscilloscope | |
| GB1251891A (en) | ||
| JPH0644013B2 (en) | oscilloscope | |
| US4823128A (en) | Digital-to-analog converter filter for producing a continuous analog signal output without distortion | |
| JPS59197867A (en) | Oscilloscope | |
| US4654650A (en) | Voltage offset device and method for providing a smooth scroll for a raster scan cathode ray tube display | |
| EP0163177B1 (en) | Window borderline generating circuit for crt display | |
| SU401991A1 (en) | DEVICE FOR DISPLAYING OF DIGITAL-LETTER INFORMATION | |
| JPS6343684B2 (en) | ||
| JPH0114059Y2 (en) | ||
| US5742275A (en) | Apparatus and method for displaying a signal waveform | |
| SU1525726A1 (en) | Device for display of graphic information on cathode-ray tube screen | |
| SU943783A2 (en) | Device for displaying data on cathode ray tube screen | |
| JPH0749420Y2 (en) | Delayed sweep display circuit | |
| JPS648824B2 (en) | ||
| SU802989A1 (en) | Piano mechanism | |
| JPS6143713B2 (en) | ||
| SU1195374A1 (en) | Device for displaying information on screen cathode-ray tube | |
| JPS6213669B2 (en) |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| LAPS | Cancellation because of no payment of annual fees |