JPH0879123A - Time division duplex operation system communication equipment - Google Patents

Abstract

PURPOSE: To eliminate the load fluctuation of a local oscillation circuit at the rise point of transmission or reception control signals and to eliminate oscillation frequency fluctuation by making a base current in an HFA and a frequency converter circuit flow at all times. CONSTITUTION: Regardless of the transmission control signals of a low level or a high level from a terminal 115, the base current is allowed to flow to a transistor 105 for high frequency power amplification at all times by resistors 103 and 104 for base bias. Thus, regardless of the conduction or nonconduction of a collector current, the input impedance of the transistor 105 is approximately fixed. Thus, the load fluctuation to the local oscillation circuit is eliminated and an oscillation frequency dose not fluctuate at the rise point of the transmission control signals. Further, this fact it is the same for a reception frequency converter circuit and a reception control circuit as well.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a time division duplex communication device used in a mobile radio communication device or the like.

[0002]

2. Description of the Related Art In mobile radio communication, a time division duplex system (hereinafter abbreviated as TDD system) has been put into practical use. The TDD method is a communication method in which transmission and reception are temporally switched and alternately performed at the same frequency. Figure 2
1 is a general block configuration diagram of a TDD communication device. Reference numeral 1 is an antenna switching circuit portion, 2 is a transmission circuit portion, 3 is a receiving circuit portion, 4 is a local oscillation circuit portion, and 5 is a voice circuit portion and a control circuit portion.

First, the operation during transmission will be described. A transmission control signal composed of a high level voltage is given from a microcomputer (hereinafter abbreviated as a microcomputer) 51 to the transmission control circuit 21 and the antenna switching control circuit 13.
Then, driving power is supplied by the transmission control circuit 21, the high frequency power amplifier circuit 25 is put into an operating state, the antenna switching circuit 12 is controlled by the antenna switching circuit 13, and the antenna connection end 11 is selectively switched to a high frequency. It is connected to the output end of the power amplification circuit 25. A voice digital signal obtained by digitizing voice and data is added to the modulation circuit 22 from the voice circuit 52. Further, a frequency control signal is given from the microcomputer 51 to the PLL 41 or 42, the frequency of the second local oscillation circuit 43 is controlled by the PLL 41, and oscillates at, for example, 240 MHz. And is transmitted to the modulation circuit 22 or the reception second frequency conversion circuit 36. First
The local oscillating circuit 48 is frequency-controlled by the PLL 42, oscillates at 1660 MHz, for example, and transmits the oscillating signal through the oscillating signal amplifying circuit 46 or 47 to the transmitting frequency converting circuit 2
3 or to the reception first frequency conversion circuit 34. In the modulation circuit 22, 240 MHz from the second local oscillation circuit 43
Of the oscillation signal of
A transmission intermediate frequency signal of MHz is generated and transmitted to the transmission frequency conversion circuit 23 at the next stage. The transmission frequency conversion circuit 23 has 2
40 MHz transmission intermediate frequency signal and the first local oscillation circuit 4
Oscillating signal of 1660MHz from 8
Generates 0MHz transmission carrier signal,
The transmission carrier signal of z has its unnecessary frequency component removed by the transmission band filter, is amplified by the high frequency power amplifier circuit 25, is output from the antenna connection end 11 to the antenna through the antenna switching circuit 12. The operation of the receiving circuit unit 3 at the time of transmission is as follows. That is, a reception control signal having a low-level voltage is given from the microcomputer 51 to the reception control circuit 31, and the RF amplification circuit 32, the reception first frequency conversion circuit 34, and the reception first frequency conversion circuit whose drive power is cut off by the reception control circuit 31. The dual frequency conversion circuit 36 and the intermediate frequency amplification circuit 38 are deactivated. The reason why the above circuits of the receiving circuit unit are made inactive during transmission is to reduce unnecessary power consumption.

Next, the operation at the time of reception will be described.
A transmission control signal having a low level voltage is given from the microcomputer 51 to the transmission control circuit 21 and the antenna switching circuit 13. The transmission control circuit 21 deactivates the high-frequency power amplifier circuit 25 whose drive power has been cut off, the antenna switching circuit 13 controls the antenna switching circuit 12, and the antenna connection end 11 is selectively switched to the RF amplifier circuit 32. Connected to the input end. High-frequency power amplifier circuit 2 when receiving
The reason why 5 is made inoperative is to reduce unnecessary power consumption, but also to prevent leakage power from the transmission circuit unit 2 from flowing into the reception circuit unit 3. Further, a reception control signal having a high level voltage is given from the microcomputer 51 to the reception control circuit 31, and driving power is supplied by the reception control circuit 31, and the RF amplification circuit 32, the reception first frequency conversion circuit 34, and the reception The second frequency conversion circuit 36 and the intermediate frequency amplification circuit 38 are activated. Then, by the frequency control signal given from the microcomputer 51 to the PLL 41, the PLL 41 controls the second local oscillation circuit 43 to oscillate an oscillation signal of 229.3 MHz. The oscillation signal of 229.3 MHz is input to the reception second frequency conversion circuit 36 via the oscillation signal amplification circuit 45. At this time, the received carrier wave signal of, for example, 1900 MHz input from the antenna connection end 11 is amplified by the RF amplification circuit 32 via the antenna switching circuit 12.
Unwanted waves are removed by the reception band fill 33 and the first local oscillation circuit 48 is received in the reception first frequency conversion circuit 34.
1660 generated by the oscillation signal amplification circuit 47
It is mixed with the oscillation signal of MHz and converted into the first intermediate frequency signal of 240 MHz. The 1660 MHz oscillation signal is generated in the first local oscillation circuit 48 as follows. That is, from the microcomputer 51, the PLL 4
2 to the frequency control signal, and based on the frequency control signal, the PLL 42 causes the first local oscillation circuit 48 to operate 16 times.
It is generated by controlling to transmit at 60 MHz. The 240 MHz first intermediate frequency signal is filtered by the receiving intermediate frequency filter 35 to remove unnecessary wave components, and then received by the receiving second frequency signal.
The frequency conversion circuit 36 mixes the oscillation signal of 229.3 MHz generated by the second local oscillation circuit 43,
It is converted to a second intermediate frequency signal of 7 MHz. The second intermediate frequency signal is selected by the receiving second intermediate frequency filter,
The sound circuit 52 is amplified by the intermediate frequency amplifier circuit 38.
Given to.

The oscillation signal frequency of the first local oscillation circuit 48 is controlled by the microcomputer 51 and the PLL 42 so that the transmission / reception carrier signal frequency to be used (1900 in the above example).
However, the same frequency is set at the time of transmission and at the time of reception (1660 in the above example).
MHz). However, the oscillation signal frequency of the second local oscillation circuit 43 does not change according to the transmission / reception carrier wave signal frequency to be used, but the microcomputer 51 can be used for both transmission and reception.
And the PLL 41 are controlled to set different fixed frequencies (in the above example, 240 MHz for transmission and 229.3 MHz for reception).

FIG. 3 is a time chart showing the relationship between the transmission control signal (a) and the reception control signal (b). The transmission control signal (a) is at a high level during the transmission time T1, but is at a low level at other times. The reception control signal (b) has a high level during the reception time T2, but has a low level during the other times.

FIG. 4 is a diagram showing a conventional high frequency power amplifier circuit 25 and a transmission control circuit 21. In the high frequency power amplification circuit 25, the transmission carrier signal 1990 MHz output from the transmission band filter 24 is input from the terminal 101, passes through the DC blocking capacitor 102, is amplified by the high frequency power amplification transistor 105, and is coupled to the coil 107.
It is tuned by a tuning circuit composed of a capacitor 108, and is output from a terminal 111 to an antenna switching circuit 12 of the next stage via a DC blocking capacitor 110. Resistors 103, 104
Is a base bias resistor, and the resistor 106 is a damping resistor for a tuning circuit including a coil 107 and a capacitor 108. 109 is a bypass capacitor. In the transmission control circuit 21, a transmission control signal composed of a high level voltage or a low level voltage from the microcomputer 51 is input from the terminal 115, and the switching transistor 113 is turned on or off via the resistor 114. A power supply voltage is applied to the terminal 112. When the switching transistor 113 becomes conductive, the collector current and the base current are supplied to the high frequency power amplification transistor 105, and the high frequency power amplification circuit 25.
Becomes the operating state, but the switching transistor 1
When 13 becomes non-conducting, the collector current and the base current are not supplied to the high frequency power amplification transistor 105, and the high frequency power amplification circuit 25 becomes inactive.

The circuit configuration and circuit operation of the reception first frequency conversion circuit 34 or the reception second frequency conversion circuit 36 and the reception control circuit 31 are exactly the same as those shown in FIG. However, to the terminal 101, the oscillation signal generated by the first local oscillation circuit 48, the reception carrier signal, or the oscillation signal generated by the second local oscillation circuit 43 and the reception second intermediate frequency signal,
The frequency conversion transistors 105 are input.
Then, they are mixed and become a reception first intermediate frequency signal or a reception second intermediate frequency signal, and are output from the terminal 111. Further, the reception control signal is applied to the terminal 115 to activate or deactivate the reception first frequency conversion circuit 34 or the reception second frequency conversion circuit 36.

[0009]

However, in the above-mentioned conventional time division duplex communication device, the high frequency power amplifier circuit 25 changes from the non-operating state to the operating state at the rising of the transmission control signal. , High frequency power amplifier circuit 2
The input impedance of No. 5 fluctuates, and this fluctuation acts as a load fluctuation for the first local oscillation circuit 48, and the oscillation frequency of the first local oscillation circuit 48 fluctuates. Similarly, when the reception control signal rises, the reception first frequency conversion circuit 34 or the reception second frequency conversion circuit 36 changes from the non-operation state to the operation state. Frequency conversion circuit 3
The input impedance of 6 fluctuates, and this fluctuation acts as a load fluctuation for the first local oscillation circuit 48 or the second local oscillation circuit 43, and this changes to the first local oscillation circuit 46.
Alternatively, there is a problem that the oscillation frequency of the second local oscillation circuit 43 is changed. An object of the present invention is to solve the above problems and to provide a time division duplex communication device in which the oscillation frequency of the local oscillation circuit does not change at the time of rising at the time of transmission or reception.

[0010]

According to a first aspect of the present invention, there is provided a time-division duplex communication device, wherein a transmission signal obtained by mixing an oscillation signal generated by a local oscillation circuit and a transmission intermediate frequency signal. A high frequency power amplifier circuit that inputs a carrier wave signal, amplifies and outputs the transmission carrier wave signal, an oscillation signal generated by a local oscillation circuit, and a reception carrier wave signal are input, and a reception intermediate frequency signal is generated. In a time-division duplex communication device having a reception frequency conversion circuit for outputting as an output, the high frequency power amplification circuit is provided with a high frequency power transistor, and the high frequency power amplification transistor has a collector current only during transmission. Is conducted, and the base current is always conducted. The time division duplex communication apparatus according to the invention of claim 2 inputs a transmission carrier signal obtained by mixing an oscillation signal generated by a local oscillation circuit and a transmission intermediate frequency signal, and transmits the transmission carrier signal. A high-frequency power amplifier circuit that amplifies and outputs a carrier signal, an oscillation signal that is generated by a local oscillator circuit, and a reception frequency conversion circuit that inputs a reception carrier signal and generates and outputs a reception intermediate frequency signal. In the time division duplex communication device having, the reception frequency conversion circuit is provided with a frequency conversion transistor,
The frequency conversion transistor is characterized in that the collector current is conducted only during reception and the base current is conducted at all times. The time division duplex communication apparatus according to the invention of claim 3 inputs a transmission carrier signal obtained by mixing an oscillation signal generated in a local oscillation circuit and a transmission intermediate frequency signal, and transmits the transmission carrier signal. A high-frequency power amplifier circuit that amplifies and outputs a carrier signal, an oscillation signal that is generated by a local oscillator circuit, and a reception frequency conversion circuit that inputs a reception carrier signal and generates and outputs a reception intermediate frequency signal. In the time division duplex communication device having, the high frequency power amplifier circuit is provided with a high frequency power transistor, the high frequency power amplifier transistor conducts a collector current only during transmission, and the base current is constantly supplied. The receiving frequency converting circuit is provided with a frequency converting transistor, and the frequency converting transistor conducts the collector current and receives the base current only during reception. , Characterized in that it has been conducting all the time.

[0011]

Since the base currents of the high frequency power amplifier circuit, the receiving first frequency converting circuit, and the receiving second frequency converting circuit are constantly flowing, the input impedance in these circuits does not always fluctuate, so that the transmitting or receiving control signal is transmitted. At the time of rising, the load variation of the first or second local oscillation circuit disappears and the oscillation frequency does not vary.

[0012]

1 is a circuit diagram showing a connection between a high frequency power amplifier circuit 25 and a transmission control circuit 21 of a TDD communication device according to an embodiment of the present invention. The difference between this figure and the conventional example shown in FIG. 4 is that the base bias resistors 103 and 104 for supplying a base current are directly connected to a terminal 112 to which a power supply voltage is applied. With such a circuit configuration, regardless of the low level or high level transmission control signal from the terminal 115, the base bias resistor 1 is connected to the high frequency power amplification transistor 105.
Since the base current always flows due to 03 and 104, the input impedance of the high-frequency power amplification transistor 105 becomes substantially constant regardless of the conduction or non-conduction of the collector current. Therefore, the load on the first local oscillation circuit 48 does not change, and the oscillation frequency does not change when the transmission control signal rises. Further, the circuit configuration and circuit operation of the reception first frequency conversion circuit 34 or the reception second frequency conversion circuit 36 and the reception control circuit 31 are exactly the same as those shown in FIG. However, terminal 101
An oscillation signal generated by the first local oscillation circuit 48 and a reception carrier signal or an oscillation signal generated by the second local oscillation circuit 43 and a reception first intermediate frequency signal are input to the The signals are mixed by the transistor 105 and become a reception first intermediate frequency signal or a reception second intermediate frequency signal, which is output from the terminal 111. In addition, the reception control signal is applied to the terminal 115 to activate or deactivate the reception first frequency conversion circuit 34 or the reception second frequency conversion circuit 36. Since the above-mentioned configuration is provided also in the receiving circuit section, the first circuit is provided when the reception control signal rises.
Alternatively, the load fluctuations on the second local oscillation circuits 48 and 43 are eliminated, and the oscillation signal is not varied.

[0013]

As described above, according to the time division duplex communication device of the present invention, the base currents of the high frequency power amplifier circuit, the reception first frequency conversion circuit, and the reception second frequency conversion circuit are always supplied. Therefore, the input impedance of these circuits does not always fluctuate, and even when the transmission or reception control signal rises, the load fluctuation of the first or second local oscillation circuit disappears, and the fluctuation of the oscillation frequency disappears. Play.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing a connection between a high frequency power amplifier circuit and a transmission control circuit of a TDD communication device according to an embodiment of the present invention.

FIG. 2 is a general block diagram of a TDD communication device.

FIG. 3 is a time chart diagram showing a relationship between a transmission control signal and a reception control signal.

FIG. 4 is a circuit diagram showing a connection between a high-frequency power amplifier circuit and a transmission control circuit of a conventional TDD communication device.

[Explanation of symbols]

25 high frequency power amplifier circuit 34, 36 reception frequency conversion circuit 43, 48 local oscillation circuit 105 power amplification transistor (or frequency conversion transistor)

Claims (3)

[Claims] 1. A high frequency power amplifier circuit for inputting a transmission carrier signal obtained by mixing an oscillation signal generated by a local oscillation circuit and a transmission intermediate frequency signal, and amplifying and outputting the transmission carrier signal. And a reception frequency conversion circuit that inputs an oscillation signal generated by a local oscillation circuit and a reception carrier signal, and generates and outputs a reception intermediate frequency signal, wherein the high frequency The power amplification circuit is provided with a high frequency power transistor, and the high frequency power amplification transistor includes:
A time division duplex communication device characterized in that the collector current is conducted only during transmission and the base current is conducted at all times. 2. A high frequency power amplifier circuit for inputting a transmission carrier signal obtained by mixing an oscillation signal generated by a local oscillation circuit and a transmission intermediate frequency signal and amplifying and outputting the transmission carrier signal. And a reception frequency conversion circuit that inputs an oscillation signal generated by a local oscillation circuit and a reception carrier signal, and generates and outputs a reception intermediate frequency signal, in the time division duplex communication device, The frequency conversion circuit is provided with a frequency conversion transistor, the collector current is conducted to the frequency conversion transistor only during reception, and the base current is conducted at all times. Method communication device. 3. A high frequency power amplifier circuit for inputting a transmission carrier signal obtained by mixing an oscillation signal generated by a local oscillation circuit and a transmission intermediate frequency signal and amplifying and outputting the transmission carrier signal. And a reception frequency conversion circuit that inputs an oscillation signal generated by a local oscillation circuit and a reception carrier signal, and generates and outputs a reception intermediate frequency signal, wherein the high frequency The power amplification circuit is provided with a high frequency power transistor, and the high frequency power amplification transistor includes:
The collector current conducts only during transmission, and the base current conducts constantly. The reception frequency conversion circuit is provided with a frequency conversion transistor, and the frequency conversion transistor conducts collector current only during reception. However, the time-division duplex communication equipment is characterized in that the base current is always conducted.