JPH088075B2 - Photoelectric conversion device - Google Patents
Photoelectric conversion deviceInfo
- Publication number
- JPH088075B2 JPH088075B2 JP62065633A JP6563387A JPH088075B2 JP H088075 B2 JPH088075 B2 JP H088075B2 JP 62065633 A JP62065633 A JP 62065633A JP 6563387 A JP6563387 A JP 6563387A JP H088075 B2 JPH088075 B2 JP H088075B2
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- Prior art keywords
- photoelectric conversion
- amorphous semiconductor
- layer
- amorphous
- conversion device
- Prior art date
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Description
【発明の詳細な説明】 [産業上の利用分野] 本発明は光を電気信号に変換する光電変換装置に係
り、特に非晶質半導体中の電荷増倍作用を用いて高感度
を実現する光電変換装置に関する。Description: TECHNICAL FIELD The present invention relates to a photoelectric conversion device for converting light into an electric signal, and particularly to a photoelectric conversion device that realizes high sensitivity by using a charge multiplication effect in an amorphous semiconductor. Regarding the converter.
[従来の技術] 従来、非晶質半導体を主体とする光電変換素子とし
て、フォトセル、一次元イメージセンサー(例えば、特
許第1022633号)、固体駆動回路と非晶質光導電体とを
組合せた2次元イメージセンサー(例えば特公昭59−26
154号)、光導電形撮像管(例えば、特許第902189号)
などが知られている。これらの光電変換素子において
は、光導電膜にたいして、信号電極からの電荷の注入を
阻止するような接合特性を有する阻止型構造を採用した
ものと、双方、あるいは一方の電極から電荷が注入され
る構造の、いわゆる注入型構造を採用したものがある。[Prior Art] Conventionally, as a photoelectric conversion element mainly composed of an amorphous semiconductor, a photocell, a one-dimensional image sensor (for example, Japanese Patent No. 1022633), a solid-state driving circuit and an amorphous photoconductor are combined. Two-dimensional image sensor (for example, Japanese Patent Publication Sho-59-26)
154), a photoconductive image pickup tube (for example, Japanese Patent No. 902189).
Are known. In these photoelectric conversion elements, one having a blocking type structure having a junction characteristic that blocks the injection of charges from the signal electrode to the photoconductive film, and one or both electrodes having charges injected There is a structure that employs a so-called injection type structure.
注入型素子では、原理的に入射光子数以上の電子を外
部回路に取りだすことができるので利得1より大の高感
度化が可能であり、上記の光電変換素子の高感度化をは
かる目的で、例えばフォトトランジスタ特性を有する光
導電膜と読み取り回路を積層した撮像素子(特開昭61−
222383号)が提案されている。In the injection type element, in principle, more electrons than the number of incident photons can be taken out to an external circuit, so that it is possible to increase the sensitivity to a gain higher than 1, and for the purpose of increasing the sensitivity of the photoelectric conversion element, For example, an image pickup device in which a photoconductive film having a phototransistor characteristic and a reading circuit are laminated (Japanese Patent Laid-Open No. 61-
222383) has been proposed.
同様な目的で、光電変換部自体に増倍作用を持たせた
素子として、静電誘導型トランジスタ(アイイーイーイ
ー トランザクション オン エレクトロン デバイセ
ズ 1975年 第イイデイ22巻、185〜197頁、IEEE TRAN
SACTION ON ELECTRON DEVICES,ED22巻)を利用した
方法が提案されており、あるいは、水素やハロゲン(例
えばフッ素、塩素等)をふくむSiを主体とする非晶質半
導体で、結晶Siと同様のp+πpnn+接合を形成してpn接合
部空乏層でアバランシェ動作を発生させて信号増幅を行
う方式(特願昭55−95953号)も提案されている。一
方、光導電膜外部からの電荷流入を阻止する性質を有す
る阻止型接合構造を採用した場合は、入射光のうち光導
電膜内部で電荷に変換された分だけが信号電流となるの
で、光電変換の利得は通常1以下に限定される。しかし
最近、Seを主体とする非晶質半導体で阻止型接合構造を
形成し、非晶質半導体層内でアバランシェ動作を発生さ
せて信号増幅を行う方式を採用すれば、阻止型接合構造
の素子でも光電変換効率を1より大きくできることが本
特許の発明者等により提案されている。(テレビ学技報
1987年 第10巻、1〜6頁) [発明が解決しようとする問題点] フォトセル、一次元イメージセンサー、光導電膜積層
型固体受光素子などの光電気変換装置に関し、注入型整
合構造を採用すれば、原理的に入射光子数以上の電子を
外部回路に取りだすことができるので、利得1より大の
高感度化が可能であるが、このように電荷の一部をセン
サ内部に注入させる方式では光応答特性が著しく劣化し
好ましくない。また、静電誘導型トランジスタは画素毎
に増幅部を内蔵させる方式であるため、各画素間の増幅
率を同一の値に揃えることが困難であった。For the same purpose, as an element in which the photoelectric conversion section itself has a multiplication effect, an electrostatic induction type transistor (IE EE Transaction on Electron Devices 1975, EI Day 22, pp. 185-197, IEEE TRAN
SACTION ON ELECTRON DEVICES, ED22) has been proposed, or it is an amorphous semiconductor mainly composed of Si containing hydrogen and halogen (eg, fluorine, chlorine, etc.), and p + similar to crystalline Si. A method of forming a πpnn + junction and generating an avalanche operation in the depletion layer of the pn junction to perform signal amplification (Japanese Patent Application No. 55-95953) has also been proposed. On the other hand, when the blocking junction structure having the property of blocking the inflow of charges from the outside of the photoconductive film is adopted, only the part of the incident light converted into the charges inside the photoconductive film becomes the signal current, so that The conversion gain is usually limited to 1 or less. However, recently, if a method of forming a blocking junction structure with an amorphous semiconductor mainly composed of Se and generating an avalanche operation in the amorphous semiconductor layer to perform signal amplification is adopted, an element with a blocking junction structure is obtained. However, it has been proposed by the inventors of the present patent that the photoelectric conversion efficiency can be made larger than 1. (Television Technical Report
1987, Vol. 10, pp. 1 to 6) [Problems to be solved by the invention] Regarding photoelectric conversion devices such as photocells, one-dimensional image sensors, photoconductive film laminated solid-state light receiving elements, etc. If adopted, in principle, more electrons than the number of incident photons can be taken out to the external circuit, so that it is possible to increase the sensitivity to a gain higher than 1, but in this way a part of the charge is injected into the sensor. However, this method is not preferable because the light response characteristics are significantly deteriorated. Further, since the static induction transistor has a system in which an amplification unit is built in for each pixel, it is difficult to make the amplification factors of the pixels equal to each other.
これにたいして、非晶質半導体を用いた例では、比較
的低温で均質な膜形成が可能であり、しかも膜抵抗が高
いため、結晶Siのように複雑な画素分離プロセスを必要
とせず、高い解像度を実現できる利点がある。しかしな
がら、従来提案されていた非晶質半導体中のアバランシ
ェ増倍現象を応用した受光素子においては、まだいくつ
かの問題点が残されていた。On the other hand, in an example using an amorphous semiconductor, a uniform film can be formed at a relatively low temperature, and since the film resistance is high, a complicated pixel separation process such as crystalline Si is not required, and a high resolution is achieved. There is an advantage that can be realized. However, some problems still remain in the light-receiving element that has been conventionally proposed to which the avalanche multiplication phenomenon in an amorphous semiconductor is applied.
すなわち、結晶半導体のアバランシェダイオードで採
用されているものと同じp+πpnn+構造を非晶質Siを用い
て形成し、信号増幅を行う方式では、信号光をp+領域を
通して入射させπ領域で吸収させて電荷に変換し、その
電荷をpn接合部へ導き、pn接合部に存在する空乏層の領
域でアバランシェ増倍を行わせる。That is, in the method of amplifying the signal by forming the same p + πpnn + structure as that used in the crystalline semiconductor avalanche diode by using amorphous Si and injecting the signal light through the p + region, It is absorbed and converted into a charge, and the charge is guided to the pn junction, and avalanche multiplication is performed in the region of the depletion layer existing in the pn junction.
しかし、アバランシェ増倍を起こすためには電荷をあ
る程度以上の距離走行させることが必要であるが、実際
に非晶質Siで上記の構造を形成してみると、非晶質Siは
結晶Siに比べて禁制帯域中に存在する局在準位が多いた
めに、pn整合における空乏層があまり広がらず、十分な
アバランシェ増倍効果が得られないことがわかった。さ
らに、動作温度が室温を越えると暗電流が増大してしま
い、十分なアバランシェ増倍効果を得られるほどに高い
電界を印加することができない。これらの結果、ただ単
に結晶Siと同様のアバランシェダイオード構造を非晶質
Siで形成しただけでは十分な増幅率が得られないという
問題点があった。However, in order to cause avalanche multiplication, it is necessary to cause the charges to travel over a certain distance, but when actually forming the above structure with amorphous Si, amorphous Si turns into crystalline Si. Compared with this, it was found that the depletion layer in pn matching does not spread so much and the avalanche multiplication effect is not sufficient because there are many localized levels in the forbidden band. Furthermore, when the operating temperature exceeds room temperature, the dark current increases, and it is not possible to apply a high electric field to obtain a sufficient avalanche multiplication effect. As a result, the avalanche diode structure similar to that of crystalline Si is simply amorphous.
There is a problem that a sufficient amplification factor cannot be obtained only by forming with Si.
また、阻止型接合を有する非晶質Seを用いたアバラン
シェ増倍方式の場合には、大きな増倍率が得られ、良好
な光応答特性が得られるものの、材料自体の制約から、
たとえば80℃以上の高温環境では、使用中に膜変質の恐
れがあり、特に高温動作時の素子特性が不十分という欠
点があった。Further, in the case of the avalanche multiplication method using amorphous Se having a blocking junction, although a large multiplication factor can be obtained and good photoresponse characteristics can be obtained, due to the restrictions of the material itself,
For example, in a high temperature environment of 80 ° C. or higher, there is a possibility that the film may be deteriorated during use, and there is a defect that the device characteristics are not sufficient especially during high temperature operation.
本発明の目的は、上記従来の問題点を除去し、光電変
換の利得が1よりも大きく、光応答特性も良好で、耐熱
性のすぐれた非晶質半導体受光素子を提供することにあ
る。An object of the present invention is to eliminate the above-mentioned conventional problems, and provide an amorphous semiconductor light receiving element having a photoelectric conversion gain of more than 1, good photoresponse characteristics, and excellent heat resistance.
[問題点を解決するための手段] 上記目的は、受光装置の内部に、水素およびハロゲン
元素のすくなくとも一方を含む(含有量は0.5〜30原子
パーセント、より好ましくは、5〜20原子パーセン
ト。)テトラヘドラル系元素を主体とする非晶質半導体
層を設け、さらに、その非晶質半導体層と外部電極との
間に外部からの電荷の注入を阻止するような性質の電気
的接合を設けた構造とし、この非晶質半導体層に電界を
印加し、上記非晶質半導体層内の主として接合界面以外
の領域で電荷増倍作用を発生させるように動作させるこ
とにより達成される。[Means for Solving the Problems] The above object includes at least one of hydrogen and a halogen element inside the light receiving device (the content is 0.5 to 30 atomic percent, more preferably 5 to 20 atomic percent). A structure in which an amorphous semiconductor layer mainly containing a tetrahedral element is provided, and an electrical junction having a property of preventing injection of charges from the outside is provided between the amorphous semiconductor layer and an external electrode. Then, an electric field is applied to the amorphous semiconductor layer, and the amorphous semiconductor layer is operated so as to generate a charge multiplication action mainly in a region other than the junction interface.
なお、発明者等はテトラヘドラル系元素として炭素、
ケイ素、ゲルマニウム、スズ等を用いて実験をした。The inventors of the present invention used carbon as a tetrahedral element,
Experiments were conducted using silicon, germanium, tin, and the like.
本発明者等は、すでに、Seを主体とする非晶質半導体
層に強い電界をかけると非晶質半導体層の内部で電荷増
倍作用が起こることを発見した。これまでは、非晶質半
導体には多くの内部欠陥があるため半導体自体ではこの
ような現象は極めて起り難いと一般に考えられており、
このとき発見された非晶質Seは例外的な材料と考えられ
ていた。The present inventors have already discovered that when a strong electric field is applied to an amorphous semiconductor layer mainly composed of Se, a charge multiplication action occurs inside the amorphous semiconductor layer. Until now, it has been generally considered that such a phenomenon is extremely unlikely to occur in the semiconductor itself because an amorphous semiconductor has many internal defects.
The amorphous Se discovered at this time was considered to be an exceptional material.
今回、本発明者らは、上記現象は必ずしも非晶質Seに
限られるものではなく、水素またはハロゲンを含む上述
のテトラヘドラル系非晶質材料を用いれば、阻止型接合
の形成が可能であり、さらに、このような材料でpn接合
を形成し、その接合部の空乏層部分でアバランシェ増幅
をおこさせる従来の方式とは異なり、前記の阻止型接合
構造を採用して高電圧を接合による空乏層領域を有しな
い非晶質層内部の領域に印加し動作させれば、テトラヘ
ドラル系非晶質層内部でSeの場合と同様の電荷倍増作用
を起こしうることを発見した。上記の、非晶質層に強い
電界を印加して非晶質層内で電荷増倍作用を発生させる
方式を利用することにより、阻止型構造を有する受光素
子のもつすぐれた光応答特性を劣化させることなく、し
かも利得が1より大の高い感度を有する光電変換装置を
得ることができる。This time, the present inventors, the above phenomenon is not necessarily limited to amorphous Se, it is possible to form a blocking junction by using the above tetrahedral amorphous material containing hydrogen or halogen, Furthermore, unlike the conventional method in which a pn junction is formed with such a material and avalanche amplification is performed in the depletion layer portion of the junction, the blocking type junction structure described above is adopted to apply a high voltage to the depletion layer due to the junction. It has been discovered that, when applied and operated in a region having no region inside the amorphous layer, a charge doubling action similar to that in the case of Se can occur inside the tetrahedral amorphous layer. By using the above-mentioned method of applying a strong electric field to the amorphous layer to generate the charge multiplication effect in the amorphous layer, the excellent light response characteristics of the light receiving element having the blocking structure are deteriorated. It is possible to obtain a photoelectric conversion device having a high sensitivity with a gain larger than 1 without performing the above.
さらに詳しく調べた結果、上記の阻止型構造を形成す
るテトラヘドラル系非晶質材料として、とくに禁制帯幅
が1.85eVよりも広い材料を選べば、80℃以上の温度でも
特性が劣化せず、高温動作時の安定性が特に優れている
ことがわかった。As a result of further investigation, as a tetrahedral amorphous material forming the above-mentioned blocking structure, if a material with a forbidden band width wider than 1.85 eV is selected, the characteristics do not deteriorate even at a temperature of 80 ° C. or higher, and It was found that the stability during operation was particularly excellent.
又、非晶質層の厚さは0.5〜10μm程度であれば、十
分な増倍率が得られることがわかった。It was also found that a sufficient multiplication factor can be obtained when the thickness of the amorphous layer is about 0.5 to 10 μm.
第1図は本発明を実施する場合の光電変換装置の原理
的構成図である。基板1、厚さ3000Å以下の信号読み出
し電極2、厚さ0.5〜5000Å程度の電荷注入阻止層3、
厚さ0.5〜10μm程度の電荷増倍作用を有する非晶質半
導体を含む光導電層4、厚さ50〜5000Å程度で3と逆符
号の電荷の注入を阻止する層5、対電極6が基本部分で
ある。ただしここで、光導電膜4と電極2、あるいは電
極6とのあいだに十分な整流性接触が得られている場合
には、電荷注入阻止層3あるいは5を省略することもで
きる。FIG. 1 is a principle configuration diagram of a photoelectric conversion device when the present invention is carried out. Substrate 1, signal readout electrode 2 having a thickness of 3000 Å or less, charge injection blocking layer 3 having a thickness of 0.5 to 5000 Å,
A photoconductive layer 4 containing an amorphous semiconductor having a charge multiplication effect with a thickness of about 0.5 to 10 μm, a layer 5 with a thickness of about 50 to 5000 Å for blocking the injection of charges having the opposite sign to 3, and a counter electrode 6 are basically used. It is a part. However, here, if sufficient rectifying contact is obtained between the photoconductive film 4 and the electrode 2 or the electrode 6, the charge injection blocking layer 3 or 5 may be omitted.
[作用] 第1図に示す構造の光電変換装置に、非晶質半導体層
内でアバランシェ増倍を起こすために必要な電界を印加
する。発明者等が発見したように、非晶質半導体層が水
素もしくはハロゲンを含むテトラヘドラル系材料で阻止
型接合構造を形成した素子では、非晶質半導体層全体に
わたって高電界を印加でき、しかも、大面積でありなが
ら暗電流を結晶半導体の100分の一以下にできる。[Operation] An electric field necessary for causing avalanche multiplication in the amorphous semiconductor layer is applied to the photoelectric conversion device having the structure shown in FIG. As discovered by the inventors, in an element in which the amorphous semiconductor layer has a blocking junction structure formed of a tetrahedral material containing hydrogen or halogen, a high electric field can be applied to the entire amorphous semiconductor layer and The dark current can be reduced to 1/100 or less of that of a crystalline semiconductor despite its area.
この状態で透光性導電膜側から光を照射すると、入射
光は非晶質層内で吸収されて電子正孔対を発生し、それ
ぞれ逆向きに印加電圧の向きで決まる方向へ走行する。
従って、採用した非晶質体内で発生した一次光電流のう
ちイオン化率の大きいほうの電荷が非晶質層内を高電界
下で走行する際に有効に電荷増倍作用が起こるように非
晶質層の膜厚と電界の向きを設定しておけば、高速の光
応答特性を維持したままで利得が1より大の高感度で、
しかも80℃以上でも安定に動作する素子特性を得ること
ができる。When light is irradiated from the transparent conductive film side in this state, the incident light is absorbed in the amorphous layer to generate electron-hole pairs, and travel in opposite directions in the directions determined by the direction of the applied voltage.
Therefore, of the primary photocurrents generated in the adopted amorphous body, the one with a higher ionization rate is amorphous so that the charge multiplication effect effectively occurs when traveling in the amorphous layer under a high electric field. By setting the thickness of the quality layer and the direction of the electric field, the gain is higher than 1 and the sensitivity is high while maintaining the high-speed photoresponse characteristics.
Moreover, it is possible to obtain device characteristics that operate stably even at 80 ° C or higher.
さらに、非晶質半導体は均質かつ大面積の薄膜形成が
容易であり、簡便なプロセスで任意の基板上に堆積が可
能であり、均質な増倍率が得られる点で本発明は極めて
有効である。Further, the present invention is extremely effective in that an amorphous semiconductor is easy to form a thin film having a large area and can be deposited on an arbitrary substrate by a simple process, and a uniform multiplication factor can be obtained. .
本発明を実施するにあたっての望ましいテトラヘドラ
ル系非晶質半導体材料としてはたとえばSiを主体とする
化合物があげられる。この化合物は、作製条件やSiの組
成比を変えることによって禁止帯幅を変化させることが
でき、しかも耐熱性に優れているという特徴を持つ。Examples of desirable tetrahedral amorphous semiconductor materials for carrying out the present invention include compounds containing Si as a main component. This compound has the characteristics that the band gap can be changed by changing the production conditions and the composition ratio of Si, and is also excellent in heat resistance.
また、図1の構成において、電荷注入阻止層を設けて
電荷注入阻止接触を強化する場合、以下に記す層が有効
である。Further, in the configuration of FIG. 1, when the charge injection blocking layer is provided to enhance the charge injection blocking contact, the layers described below are effective.
すなわち、正孔注入阻止層としては、水素もしくはハ
ロゲン元素の少なくとも一者を含む非晶質炭化珪素もし
くは窒化珪素、あるいは、水素もしくはハロゲン元素の
少なくとも一者と、P,As等のV族元素の少なくとも一者
とを含む非晶質炭化珪素もしくは窒化珪素、あるいは、
Ce,Ge,Zn,Cd,Al,Si,Nb,Ta,Cr,Wの少なくとも一者の酸化
物、あるいは、以上の層の2者以上の組合せが適してい
る。That is, as the hole injection blocking layer, amorphous silicon carbide or silicon nitride containing at least one of hydrogen or a halogen element, or at least one of hydrogen or a halogen element and a group V element such as P or As is used. Amorphous silicon carbide or silicon nitride containing at least one of the above, or
An oxide of at least one of Ce, Ge, Zn, Cd, Al, Si, Nb, Ta, Cr and W, or a combination of two or more of the above layers is suitable.
また、電子注入阻止層としては、水素もしくはハロゲ
ン元素の少なくとも一者を含む非晶質炭化珪素もしくは
窒化珪素、あるいは、水素もしくはハロゲン元素の少な
くとも一者と、B,Al等のIII族元素の少なくとも一者と
を含む非晶質炭化珪素もしくは窒化珪素、あるいは、Ir
の酸化物、あるいは、Sb2S3,As2S3,As2Se3,Se−As−Te
等のカルコゲナイド、あるいは、以上の層の2者以上の
組合せが適している。As the electron injection blocking layer, amorphous silicon carbide or silicon nitride containing at least one of hydrogen or a halogen element, or at least one of hydrogen or a halogen element and at least a Group III element such as B or Al is used. Amorphous silicon carbide or silicon nitride, or Ir
Oxide, or Sb 2 S 3 , As 2 S 3 , As 2 Se 3 , Se-As-Te
Chalcogenides such as or a combination of two or more of the above layers are suitable.
以上、テトラヘドラル系非晶質半導体層における電荷
増倍作用をもちいた光電変換装置について述べたが、非
晶質半導体は結晶と異なり任意の異種材料の積層が可能
なので、光導電層を単層とせず、同様な電荷増倍作用を
有する異なる2種類以上の非晶質半導体の層を積層した
構成でもよく、また、光導電層全体が必ずしも非晶質半
導体である必要はなく結晶半導体と非晶質半導体の層を
積層した構成でもよく、さらに、信号読み取り回路基板
などの上に堆積した構成でもよい。本発明で必要なこと
は、光導電層を構成する層のうち少なくとも一部の層
に、接合による空乏層領域を有せず耐熱性が大きく禁止
帯幅の広い非晶質半導体を用い、強い電界を印加して非
晶質半導体層の内部で電荷増倍作用を生じさせ、感度を
高めるようにすることである。The photoelectric conversion device using the charge multiplication function in the tetrahedral amorphous semiconductor layer has been described above.However, unlike a crystal, an amorphous semiconductor can be formed by stacking arbitrary different materials. Alternatively, a structure in which two or more different types of amorphous semiconductor layers having the same charge multiplication effect are laminated may be used. Further, the entire photoconductive layer does not necessarily have to be an amorphous semiconductor, and a crystalline semiconductor and an amorphous semiconductor may be used. It may have a structure in which high quality semiconductor layers are laminated, or may have a structure in which it is deposited on a signal reading circuit board or the like. What is required in the present invention is that at least a part of the layers constituting the photoconductive layer is made of an amorphous semiconductor having a large heat resistance and a wide band gap without having a depletion layer region due to a junction, and is strong. The purpose is to apply an electric field to cause a charge multiplication effect inside the amorphous semiconductor layer to enhance the sensitivity.
第2図、第3図に本発明を実施した場合の効果を示
す。第2図は、透光性ガラス基板上に順次透明電極、電
子注入阻止層、真性非晶質珪素層、正孔注入阻止層、Al
電極を堆積した、実効面積1cm2の受光素子(A)と、透
明電極を堆積した透光性基板上に、非晶質珪素を用いて
p+πpnn+接合を形成し、その上にAl電極を堆積した、実
効面積1cm2の受光素子(B)に、(A)の場合は非晶質
珪素層内全体、(B)の場合はpn接合の空乏層部分でア
バランシェ増倍が得られるような電界を印加して動作さ
せた際の、暗電流及び光電変換の利得の温度依存性を示
す。受光素子(B)では全温度域で利得が不十分であ
り、かつ、温度上昇に伴い暗電流が大幅に増加している
のに対し、受光素子(A)では、利得、暗電流とも良好
な振舞を示している。2 and 3 show the effects of implementing the present invention. FIG. 2 shows a transparent electrode, a transparent electrode, an electron injection blocking layer, an intrinsic amorphous silicon layer, a hole injection blocking layer, and an Al layer on a transparent glass substrate.
Amorphous silicon was used on the light receiving element (A) with an effective area of 1 cm 2 and the transparent electrode on which the transparent electrode was deposited.
A p + πpnn + junction is formed, and an Al electrode is deposited on the p + π pnn + junction. In the light receiving element (B) with an effective area of 1 cm 2 , the entire area within the amorphous silicon layer in the case of (A), and in the case of (B) The temperature dependence of the dark current and the gain of photoelectric conversion when an electric field is applied so that avalanche multiplication is obtained in the depletion layer portion of the pn junction is shown. In the light receiving element (B), the gain is insufficient over the entire temperature range, and the dark current increases significantly with the temperature rise, whereas in the light receiving element (A), both the gain and the dark current are good. Shows behavior.
次に、第3図は前述の素子(A)と、透光性基板上に
順次透明電極、正孔注入阻止層、非晶質Se層、Au電極を
対瀬した実効面積1cm2の受光素子(C)を80℃で100時
間連続動作させた場合の素子破損率を示す。素子(C)
に比べ、素子(A)の場合、破損率が大幅に低下してい
る。Next, FIG. 3 shows the above-mentioned device (A) and a light-receiving device having an effective area of 1 cm 2 in which a transparent electrode, a hole injection blocking layer, an amorphous Se layer, and an Au electrode are sequentially arranged on a transparent substrate. The element damage rate when (C) is continuously operated at 80 ° C. for 100 hours is shown. Element (C)
In the case of the element (A), the breakage rate is significantly lower than that of (1).
ところで、以上では、熱的に安定なテトラヘドラル系
非晶質半導体中に於るアバランシェ効果を主に光電変換
装置へ適用した例について述べたが、本発明を光電変換
装置以外にも、より一般の増幅素子やスイッチング素子
へも適用できることは言うまでもない。By the way, in the above, an example in which the avalanche effect in the thermally stable tetrahedral amorphous semiconductor is mainly applied to the photoelectric conversion device has been described, but the present invention is not limited to the photoelectric conversion device and is more general. It goes without saying that it can be applied to an amplifying element and a switching element.
以下、本発明を実施例により詳しく説明する。 Hereinafter, the present invention will be described in detail with reference to Examples.
実施例1 透光性基板1上に酸化イリジウムを主体とする透明電
極2を形成する。その上に、非晶質半導体を含む光導電
層4として、SiH4を原料ガスとして、膜厚0.5〜10μm
のa−Si:HをプラズマCVD法で形成する。その上に、SiH
4とC2H6を原料ガス、PH3をドーピングガスとして、Pを
50ppmドープしたa−SiC:Hを10nmの厚さ形成し、正孔注
入阻止層5とする。さらにその上に、対電極6としてAl
電極を堆積して、第1図に示す光電変換装置を得る。Example 1 A transparent electrode 2 mainly composed of iridium oxide is formed on a transparent substrate 1. On top of that, as a photoconductive layer 4 containing an amorphous semiconductor, SiH 4 is used as a source gas and a film thickness is 0.5 to 10 μm.
A-Si: H is formed by the plasma CVD method. On top of that, SiH
4 and C 2 H 6 as source gas, PH 3 as doping gas, and P as
A hole injection blocking layer 5 is formed by forming a-SiC: H doped with 50 ppm to a thickness of 10 nm. On top of that, as the counter electrode 6, Al
Electrodes are deposited to obtain the photoelectric conversion device shown in FIG.
実施例2 第4図に本発明の一実施例である1次元イメージセン
サの構成を示す。第4図(a)はその平面の一部を示す
図、第4図(b)は(a)におけるAA′断面を示す図で
ある。Embodiment 2 FIG. 4 shows the structure of a one-dimensional image sensor which is an embodiment of the present invention. FIG. 4 (a) is a view showing a part of the plane, and FIG. 4 (b) is a view showing a cross section taken along the line AA 'in FIG. 4 (a).
透光性基板11上に酸化イリジウムを主体とする透明導
電膜を堆積した後、フォトエッチングにより上記導電膜
を分離し、個別の読みだし電極12を形成する。その上
に、マスクを用いてSiH4とC2H6を原料ガス、B2H6をドー
ピングガスとして、Bを50ppmドープしたa−SiC:Hを10
nmの厚さ形成し、電子注入阻止層13とする。さらにその
上に、同じマスクを用い非晶質半導体を含む光導電層14
として、ArとH2の混合ガスを用いてSiターゲットをスパ
ッタリングして、膜厚0.5〜10μmのa−Si:Hを形成す
る。さらにその上に、同じマスクを用いSiH4とC2H6を原
料ガス、PH3をドーピングガスとして、Pを50ppmドープ
したa−SiC:Hを10nmの厚さに形成し、正孔注入阻止層1
5とする。さらにその上に、上記とは別のマスクを用い
共通電極16としてAl電極を堆積する。その後、読みだし
電極12を基板上に設けた走査回路にボンヂングなどの手
段によって接続し、1次元イメージセンサを得る。After depositing a transparent conductive film mainly composed of iridium oxide on the transparent substrate 11, the conductive film is separated by photoetching to form individual reading electrodes 12. Then, using a mask, SiH 4 and C 2 H 6 are used as source gases, and B 2 H 6 is used as a doping gas.
The electron injection blocking layer 13 is formed to a thickness of nm. Further thereon, a photoconductive layer 14 containing an amorphous semiconductor is formed using the same mask.
As a step, a Si target is sputtered using a mixed gas of Ar and H 2 to form a-Si: H having a film thickness of 0.5 to 10 μm. Further, using the same mask, using SiH 4 and C 2 H 6 as source gases and PH 3 as a doping gas, a-SiC: H doped with 50 ppm of P is formed to a thickness of 10 nm to prevent hole injection. Tier 1
Set to 5. Further, an Al electrode is deposited as the common electrode 16 on it using a mask different from the above. After that, the reading electrode 12 is connected to the scanning circuit provided on the substrate by means such as bonding to obtain a one-dimensional image sensor.
上記実施例1,2の光電変換装置に5×107V/m以上の電
界を透光性基板側が対電極にたいして負になるような向
きに印加した場合、光応答特性を損なうこと無く、利得
1を越える高感度が実現でき、それらを80℃で長時間連
続動作させた場合にも、特性変化は生じなかった。When an electric field of 5 × 10 7 V / m or more was applied to the photoelectric conversion devices of Examples 1 and 2 in the direction in which the transparent substrate side was negative with respect to the counter electrode, the gain was obtained without impairing the optical response characteristics. High sensitivities exceeding 1 were realized, and even when they were continuously operated at 80 ° C. for a long time, no characteristic change occurred.
実施例3 第5図に本発明の別の実施例である撮像管の構成図を
示す。ガラス基板18上にIn2O3を主体とする透明電極19
を形成する。その上に、PH4をドーピングガスとして、
Pを50ppmドープしたa−Si:Hを10nmの厚さ形成し、正
孔注入阻止層20とする。次にSiH4を原料ガスとして、膜
厚0.5〜10μmのa−Si:HをプラズマCVD法で形成し、光
導電層21を得る。次に電子注入阻止層として、Sb2S3を1
0-1TorrのAr雰囲気中で膜厚100nmに堆積する。以上18か
ら22により撮像管ターゲット部を得る。このターゲット
部を、カソード171,電子ビーム偏向集束電極172を含む
ガラス管17に組み込み、真空排気して撮像管を得る。Embodiment 3 FIG. 5 shows a block diagram of an image pickup tube which is another embodiment of the present invention. A transparent electrode 19 mainly composed of In 2 O 3 on the glass substrate 18
To form. On top of that, PH 4 as a doping gas,
A hole injection blocking layer 20 is formed by forming a-Si: H doped with 50 ppm of P to a thickness of 10 nm. Next, using SiH 4 as a source gas, a-Si: H having a film thickness of 0.5 to 10 μm is formed by the plasma CVD method to obtain the photoconductive layer 21. Next, Sb 2 S 3 is used as an electron injection blocking layer.
Deposit to a film thickness of 100 nm in an Ar atmosphere of 0 -1 Torr. From the above 18 to 22, the image pickup tube target portion is obtained. This target portion is incorporated into a glass tube 17 including a cathode 171, an electron beam deflection / focusing electrode 172, and vacuum exhausted to obtain an image pickup tube.
実施例4 次に実施例3と同様、本発明を撮像管へ適用した例を
示す。本実施例では、テトラヘドラル系元素としてGeを
用いたものである。第5図において、ガラス基板18上に
In2O3を主体とする透明電極19を形成する、その上にPH4
をドーピングガラスとしてPを50ppmドープしたa−Si:
Hを10nmの厚さに形成し、正孔注入阻止層20とする。次
にGeH4を原料ガスとして、プラズマCVD法により膜厚0.5
〜10μmのa−Ge:Hを形成し、光導電層21を得る。次に
電子注入阻止層として、Se−As−Teより成る非晶質材料
を10-1TorrのN2雰囲気中で膜厚100nmに堆積する。この
ようにして得られた撮像管ターゲット部を用い実施例3
と同様の方法によって撮像管を得る。Example 4 Next, as in Example 3, an example in which the present invention is applied to an image pickup tube will be described. In this embodiment, Ge is used as the tetrahedral element. In FIG. 5, on the glass substrate 18,
A transparent electrode 19 mainly composed of In 2 O 3 is formed, and PH 4 is formed on the transparent electrode 19.
A-Si doped with 50 ppm of P as a doping glass:
H is formed to a thickness of 10 nm to form the hole injection blocking layer 20. Next, using GeH 4 as a source gas, a film thickness of 0.5 is obtained by the plasma CVD method.
The photoconductive layer 21 is obtained by forming a-Ge: H of about 10 μm. Next, as an electron injection blocking layer, an amorphous material composed of Se-As-Te is deposited to a film thickness of 100 nm in an N 2 atmosphere of 10 -1 Torr. Example 3 using the image pickup tube target portion thus obtained
An image pickup tube is obtained by a method similar to.
実施例3,4の撮像管において、透明電極が正となる向
きに8x107V/m以上の電界を印加した場合、光応答特性を
損なうこと無く、利得1を越える高感度が実現でき、ま
た、その動作は、熱的に安定であることが確認出来た。In the image pickup tubes of Examples 3 and 4, when an electric field of 8 × 10 7 V / m or more is applied in the direction in which the transparent electrode is positive, high sensitivity exceeding gain 1 can be realized without deteriorating the light response characteristic. , It was confirmed that the operation was thermally stable.
[発明の効果] 以上から明らかなように、本発明により、阻止型構造
の光導電膜を用いた受光素子のすぐれた光応答特性を劣
化させること無く、利得が1より大の高感度で、熱的に
安定な、光電変換装置を得ることが出来る。[Effects of the Invention] As is apparent from the above, according to the present invention, the gain is higher than 1 and the high sensitivity is achieved without deteriorating the excellent light response characteristics of the light receiving element using the photoconductive film having the blocking structure. A photoelectric conversion device that is thermally stable can be obtained.
第2図は、受光素子の暗電流,光電変換の利得の温度依
存性を示す図、第3図は、受光素子の破損率を示す図、
第1図は、電荷注入阻止型構造を有する光電変換装置の
原理的構成を示す図、第4図は、本発明の一実施例であ
る1次元イメージセンサの構成図、第5図は、本発明の
一実施例である撮像管の構成図である。 1……基板、2……信号読みだし電極 3……電荷注入阻止層、4……光導電層、 5……電荷注入阻止層、6……対電極2 is a diagram showing the dark current of the light receiving element and the temperature dependence of the gain of photoelectric conversion, FIG. 3 is a diagram showing the damage rate of the light receiving element,
FIG. 1 is a diagram showing a principle configuration of a photoelectric conversion device having a charge injection blocking structure, FIG. 4 is a configuration diagram of a one-dimensional image sensor which is one embodiment of the present invention, and FIG. It is a block diagram of the image pick-up tube which is one Example of the invention. 1 ... Substrate, 2 ... Signal reading electrode 3 ... Charge injection blocking layer, 4 ... Photoconductive layer, 5 ... Charge injection blocking layer, 6 ... Counter electrode
───────────────────────────────────────────────────── フロントページの続き (72)発明者 鮫島 賢二 東京都国分寺市東恋ヶ窪1丁目280番地 株式会社日立製作所中央研究所内 (72)発明者 松原 宏和 東京都国分寺市東恋ヶ窪1丁目280番地 株式会社日立製作所中央研究所内 (72)発明者 石岡 祥男 東京都国分寺市東恋ヶ窪1丁目280番地 株式会社日立製作所中央研究所内 (72)発明者 設楽 圭一 東京都世田谷区砧1丁目10番11号 日本放 送協会放送技術研究所内 (72)発明者 河村 達郎 東京都世田谷区砧1丁目10番11号 日本放 送協会放送技術研究所内 (72)発明者 竹歳 和久 東京都世田谷区砧1丁目10番11号 日本放 送協会放送技術研究所内 (72)発明者 谷岡 健吉 東京都世田谷区砧1丁目10番11号 日本放 送協会放送技術研究所内 (72)発明者 山崎 順一 東京都世田谷区砧1丁目10番11号 日本放 送協会放送技術研究所内 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Kenji Samejima, 1-280 Higashi Koigakubo, Kokubunji City, Tokyo Metropolitan Institute of Hitachi, Ltd. (72) Hirokazu Matsubara 1-280, Higashi Koigakubo, Kokubunji City, Tokyo Hitachi, Ltd. Central Research Laboratory (72) Inventor Yoshio Ishioka 1-280 Higashi Koigakubo, Kokubunji, Tokyo Central Research Laboratory, Hitachi, Ltd. (72) Inventor Keiichi Shitara 1-10-11 Kinuta, Setagaya-ku, Tokyo Broadcasting Technology of Japan Broadcasting Corporation Inside the laboratory (72) Inventor Tatsuro Kawamura 1-10-11 Kinuta, Setagaya-ku, Tokyo Inside the Broadcasting Technology Laboratory, Japan Broadcasting Corporation (72) Inventor Kazuhisa Takeshi 1-10-11 Kinuta, Setagaya-ku, Tokyo Japan (72) Inventor Kenkichi Tanioka 1-10-11 Kinuta, Setagaya-ku, Tokyo Japan (72) Inventor Junichi Yamazaki, 1-10-11 Kinuta, Setagaya-ku, Tokyo Inside Broadcasting Technology Institute, Japan Broadcasting Corporation
Claims (2)
を有する光電変換装置において、該非晶質半導体層がシ
リコンを主体とし、かつ水素およびハロゲン元素の少な
くとも一方を含み、該光導電層が、外部電極との間に、
外部からの電荷の注入を阻止するような性質の電気的接
合構造を有し、該非晶質半導体層に電界を印加し、該非
晶質半導体層内の主として上記接合の界面以外の領域で
電荷増倍作用を生じせしめて動作させることを特徴する
光電変換装置。1. A photoelectric conversion device having a photoconductive layer containing at least an amorphous semiconductor layer, wherein the amorphous semiconductor layer is mainly composed of silicon and contains at least one of hydrogen and a halogen element, and the photoconductive layer comprises , Between the external electrodes,
It has an electric junction structure having a property of preventing the injection of charges from the outside, applies an electric field to the amorphous semiconductor layer, and increases the charge mainly in the region other than the interface of the junction in the amorphous semiconductor layer. A photoelectric conversion device which is operated by causing a double action.
行わしむるシリコンを主体とする非晶質半導体が、1.85
eVをこえる禁制帯幅を有することを特徴とする特許請求
の範囲第1項記載の光電変換装置。2. An amorphous semiconductor mainly composed of silicon, which is used for the photoconductive layer and which has a charge multiplication effect, is 1.85.
The photoelectric conversion device according to claim 1, wherein the photoelectric conversion device has a forbidden band width exceeding eV.
Priority Applications (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62065633A JPH088075B2 (en) | 1987-03-23 | 1987-03-23 | Photoelectric conversion device |
| EP88101954A EP0283699B1 (en) | 1987-03-23 | 1988-02-10 | Photoelectric conversion device |
| DE3850157T DE3850157T2 (en) | 1987-03-23 | 1988-02-10 | Photoelectric conversion device. |
| US07/155,809 US4980736A (en) | 1987-03-23 | 1988-02-16 | Electric conversion device |
| US07/561,678 US5233265A (en) | 1986-07-04 | 1990-08-01 | Photoconductive imaging apparatus |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62065633A JPH088075B2 (en) | 1987-03-23 | 1987-03-23 | Photoelectric conversion device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS63236247A JPS63236247A (en) | 1988-10-03 |
| JPH088075B2 true JPH088075B2 (en) | 1996-01-29 |
Family
ID=13292621
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP62065633A Expired - Lifetime JPH088075B2 (en) | 1986-07-04 | 1987-03-23 | Photoelectric conversion device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH088075B2 (en) |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS624865A (en) * | 1985-06-29 | 1987-01-10 | Ishikawajima Harima Heavy Ind Co Ltd | Sealing device for vacuum treating apparatus |
| JPH0687404B2 (en) * | 1986-07-04 | 1994-11-02 | 日本放送協会 | Image pickup tube and its operating method |
| JPH0687404A (en) * | 1992-07-20 | 1994-03-29 | Toyota Motor Corp | Collision sensor fitting structure for side air bag device |
-
1987
- 1987-03-23 JP JP62065633A patent/JPH088075B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPS63236247A (en) | 1988-10-03 |
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