JPH088651A - Voltage controlled oscillator - Google Patents

Abstract

(57) [Summary] [Object] To provide a VCO with a large variable range of oscillation frequency, good stability of oscillation frequency, simple circuit configuration, and low power consumption. [Configuration] Inverters 23, 33, 34, crystal unit 4
A crystal oscillating circuit composed of 0, a feedback resistor 41, and capacitors 42 and 43 oscillates at a predetermined frequency. When the input voltage Vc changes, the PMOS 21 is gate-controlled by the control signal output from the voltage control circuit 10,
The on-resistance value of OS21 changes. Then, the transconductance of the inverter 23 changes and the phase of the crystal oscillation circuit changes, which is amplified by the amplification circuit 30 and the output voltage Vo having the oscillation frequency corresponding to the change of the input voltage Vc is output.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION The present invention has a crystal oscillator or the like,
The present invention relates to a voltage controlled oscillator (hereinafter referred to as VCO) whose oscillation frequency changes according to a change in input voltage.

[0002]

2. Description of the Related Art Heretofore, as a technique relating to such a VCO, there has been a technique described in, for example, Japanese Patent Application Laid-Open No. 62-145903. VCO described in this document
Is composed of a ceramic oscillator and a bipolar transistor. A ceramic oscillator is connected in parallel to the output terminal of an amplifier circuit having a positive feedback capacitance, and the parallel resonance of the ceramic oscillator is amplified by the amplifier circuit to a predetermined frequency. A main oscillating circuit that oscillates at, a phase shift circuit connected to the main oscillating circuit, and a control amplifier circuit that amplifies an output signal of the phase shift circuit and feeds it back to an input terminal of the phase shift circuit. . Between the output terminal of the phase shift circuit and the input terminal of the control amplifier,
A buffer amplifier is connected. In this type of VCO, by controlling the feedback amount of the control amplifier circuit, the reactance connected in parallel to the ceramic oscillator is changed to change the frequency of the main oscillation circuit. At this time, since the buffer amplifier is provided, the input impedance of the control amplifier does not affect the phase shift circuit, and the oscillation becomes more stable.

[0003]

However, since the conventional VCO is composed of bipolar transistors, the circuit structure is complicated and the power consumption is large. In addition, if the stability of the oscillation frequency is improved with respect to fluctuations in power supply voltage, changes in temperature, changes in load, etc., there is a problem that the circuit configuration becomes more complicated. In order to solve such a problem, a VCO in which a crystal oscillation circuit is configured by using MOS transistors and a load capacitance value for the crystal oscillator is changed according to a change in input voltage to change the oscillation frequency is also proposed. ing. The VCO using such a MOS transistor has a simple circuit configuration, consumes less power, and has a relatively stable oscillation frequency. However, when the load capacitance value is considerably small or large, the oscillation operation is stopped, so that the usable variable range of the oscillation frequency is relatively narrow. Therefore, it is still difficult to provide a VCO that is technically sufficiently satisfactory.

[0004]

In order to solve the above-mentioned problems, a first aspect of the present invention is directed to an input voltage and a first node in a VCO formed by using an oscillator such as a crystal oscillator and a MOS transistor. A first differential amplifier that differentially amplifies the above voltage, a first integrator circuit that integrates an output signal of the first differential amplifier, a first power supply voltage, and a source / drain at the first node And a voltage having a first reference resistance connected between the first node and a second power supply voltage, the first MOS transistor being gate-controlled by the output signal of the first integrating circuit. It has a control circuit. Further, a vibrator and a feedback resistor connected in parallel between the second and third nodes, between the second node and the second power supply voltage, and between the third node and the second power supply. A first capacitor, a phase shift circuit, and an amplifier circuit, which are respectively connected to the voltage, are provided. The phase shift circuit includes a second MOS transistor whose source / drain is connected to the first power supply voltage and a fourth node and whose gate is controlled by the output signal of the first integrating circuit, and a power supply to the fourth node. A first or a plurality of stages of first inverters connected to the terminals for inverting or normalizing the signal on the second node, and connected between the output terminal of the first inverter and the second power supply voltage 2 is a circuit having a second capacitor that is formed. The amplifier circuit is a circuit that amplifies the output signal of the first inverter by one stage or a plurality of stages of the second inverter and outputs a signal of an oscillation frequency corresponding to the input voltage to the third node. is there.

In the second invention, the VCO of the first invention is
A compensation circuit and a fourth MOS transistor are provided.
The compensation circuit is connected between the first and second power supply voltages and generates a reference voltage.
A second differential amplifier that differentially amplifies the voltage on the node of
A second integrator circuit for integrating the output signal of the second differential amplifier; a source / drain connected to the first power supply voltage and the fifth node; and gate control by the output signal of the second integrator circuit. And a second MOS transistor, and a second reference resistor connected between the fifth node and the second power supply voltage. The fourth MOS transistor has a source / drain connected to the first power supply voltage and a power supply terminal of the second inverter.
Is a transistor whose gate is controlled by the output signal of the integrating circuit. In the third invention, a temperature sensitive element whose resistance value changes with temperature is provided in place of the first and second reference resistances of the first or second invention. In the fourth invention, the oscillator of the first, second or third invention is constituted by a crystal oscillator.

[0006]

According to the first aspect of the invention, since the VCO is constructed as described above, the first and second power supply voltages are applied, and
When the input voltage is input to the voltage control circuit, the oscillation circuit composed of the first and second inverters, the oscillator, the feedback resistor, and the first capacitor oscillates at a predetermined frequency. When the input voltage changes, the voltage on the first node changes following the change in the input voltage due to the feedback operation of the voltage control circuit, and the output signal of the first integration circuit in the voltage control circuit also changes. . When the output signal of the first integrating circuit changes, the second
The MOS transistor is gate-controlled to change the voltage on the fourth node, and the time constant of the time constant circuit formed by the first inverter and the second capacitor is changed,
The phase of the oscillator circuit changes. The output signal of the first inverter is amplified by the amplifier circuit, and the signal of the oscillation frequency corresponding to the change of the input voltage is output from the third node. According to the second aspect of the invention, the follow-up operation is performed by the feedback operation of the compensation circuit such that the voltage on the fifth node matches the reference voltage. Then, the fourth MOS transistor is gate-controlled by the output signal of the second integration circuit in the compensation circuit, and the power supply voltage applied to the power supply terminal of the second inverter is kept constant. Therefore, fluctuations in the phase of the oscillation circuit due to temperature changes and the like are controlled. According to the third aspect of the invention, the resistance value of the temperature-sensitive element changes depending on the temperature change.
The value of the current flowing between the source and drain of the MOS transistor changes. According to the fourth aspect of the invention, the crystal oscillator has a function of stably performing an oscillating operation with respect to fluctuations in power supply voltage, changes in temperature, changes in load, and the like. Therefore, the above problem can be solved.

[0007]

1 is a circuit diagram of a VCO showing an embodiment of the present invention, and FIG. 2 is a schematic configuration block diagram thereof. Figure 2
As shown in FIG. 6, the VCO of this embodiment includes a voltage control circuit 10 that inputs an input voltage Vc and outputs a control signal, and a phase shift circuit 20 that changes the phase of the oscillation frequency based on the control signal. . The output terminal of the phase shift circuit 20 is connected to the input terminal of an amplifier circuit 30 for amplifying the output signal of the phase shift circuit 20, and the output terminal of the amplifier circuit 30 is connected via the crystal oscillator 40 to the phase shift circuit. It is feedback-connected to 20 input terminals. An output buffer 50 that drives the output signal of the amplifier circuit 30 and outputs the output voltage Vo is connected to the output terminal of the amplifier circuit 30.
The VCO shown in FIG. 1 is a specific circuit of the configuration block shown in FIG. 2, to which a compensation circuit 60 and the like are added. The voltage control circuit 10 constituting the VCO includes a differential amplifier 11 that differentially amplifies the input voltage Vc and the voltage V1 on the first node N1.
And its output terminal is connected to one end of the resistor 12. The other end of the resistor 12 is connected to the second power supply voltage Vss (for example, ground (GND)) via the capacitor 13, and the resistor 12 and the capacitor 13 form a first integrating circuit. The other end of the resistor 12 has a first
Of the MOS transistor 14 (for example, a P-channel type MOS transistor, hereinafter referred to as PMOS) is connected, and the source of the PMOS 14 is connected to the first power supply voltage Vdd.
It is connected to the. The first node N1 on the drain side of the PMOS 14 is connected to the GND via the first reference resistor 15 having a high resistance value. In this voltage control circuit 10,
It has a function of outputting a control signal from the other end of the resistor 12 and giving the control signal to the phase shift circuit 20.

The phase shift circuit 20 has a second MOS transistor (for example, PMOS) 21, its gate is connected to the other end of the resistor 12, and its source is connected to the power supply voltage Vdd. The fourth node N4 on the drain side of the PMOS 21 is connected to the GND via the capacitor 22.
And a power supply terminal of the first inverter 23. The capacitor 22 is connected to the fourth node N
4 has a function of causing the AC component of the voltage V2 on the No. 4 to flow to the GND side to stabilize the power supply voltage of the first inverter 23. The first inverter 23 is composed of a complementary MOS transistor (hereinafter, referred to as CMOS) including a PMOS and an N-channel type MOS transistor (hereinafter, referred to as NMOS), and its output terminal is connected to the second capacitor 24. Connected to GND, and the inverter 23 and the capacitor 24 form a time constant circuit. The input terminal of the inverter 23 is connected to the second node N2. The crystal oscillator 4 is connected to the second node N2.
While one end of 0 and one end of the feedback resistor 41 are connected,
It is connected to GND via the first capacitor 42. The other end of the crystal oscillator 40 and the other end of the feedback resistor 41 are
It is connected to the third node N3. Third node N3
Is connected to the output terminal of the amplifier circuit 30, and
Is connected to GND via the capacitor 43.

The amplifier circuit 30 has a fourth MOS transistor (for example, PMOS) 31, and the source of the PMOS 31 is connected to the power supply voltage Vdd. PMOS3
The node N5 on the drain side of 1 is connected to the GND via the capacitor 32, and is also connected to the power supply terminals of a plurality of (for example, two) cascaded second inverters 33 and 34. The capacitor 32 is connected to the node N5
It has a function of causing the AC component of the upper voltage V3 to flow to the GND side to stabilize the power supply voltage of the second inverters 33 and 34. The two-stage inverters 33 and 34 are CMOS
The input terminal of the inverter 33 at the preceding stage is connected to the output terminal of the inverter 23. The output terminal of the front-stage inverter 33 is connected to the rear-stage inverter 3
4 and the output terminal of the inverter 34 is connected to the third node N3. Third node N
An output buffer 50 is connected to 3. The output buffer 50 is a circuit that outputs an output voltage Vo having an oscillation frequency according to the input voltage Vc, and is composed of a CMOS or the like. The PMOS 31 in the amplifier circuit 30 is a compensation circuit 60.
The gate is controlled by.

The compensating circuit 60 has a reference voltage generating circuit (for example, two voltage dividing resistors 61 and 62 connected in series) which generates the reference voltage Vr from the constant voltage Vreg, and the voltage dividing resistors 61 and 62. Is connected to the (−) input terminal of the second differential amplifier 63. The differential amplifier 63 is
It is a circuit that differentially amplifies the reference voltage Vr applied to the (−) input terminal and the voltage V4 on the fifth node N6 applied to the (+) input terminal, and one end of the resistor 64 is connected to its output terminal. ing. The other end of the resistor 64 has a capacitor 65
And the resistor 64 and the capacitor 65 form a second integrating circuit. Resistance 6
The other end of 4 is connected to the gate of the PMOS 31 in the amplifier circuit 30 and the gate of the third MOS transistor (for example, PMOS) 66. PMO
The source of S66 is connected to the power supply voltage Vdd.
The fifth node N6 on the drain side of the PMOS 66 is connected to the (+) input terminal of the differential amplifier 63 and is also connected to GND via the second reference resistor 67 having a high resistance value.

The operation of the VCO configured as above and shown in FIGS. 1 and 2 will be described. When the power supply voltage Vdd is applied and the input voltage Vc is input to the voltage control circuit 10,
A crystal oscillation circuit composed of the inverters 23, 33 and 34, the crystal oscillator 40, the feedback resistor 41, and the capacitors 42 and 43 oscillates at a predetermined frequency. Here, consider a case where the input voltage Vc changes. When the input voltage Vc changes, the input voltage Vc and the voltage V1 on the drain side node N1 of the PMOS 14 are differentially amplified by the differential amplifier 11, and the output signal thereof is integrated by the resistor 12 and the capacitor 13. Based on this integration result, PMOS 14 and PM
The gate of OS21 is controlled respectively, and the PMOS1
The on-resistance values of Nos. 4 and 21 change. At this time, the PMOS 14 and the reference resistor 15 are connected by the high resistance reference resistor 15.
A constant power supply current flows. When the ON resistance value of the PMOS 14 changes, the voltage V1 on the drain side node N1 changes.
Changes, and as a result, the following operation is performed such that the voltage V1 matches the input voltage Vc. On the other hand, when the ON resistance value of the PMOS 21 changes, the voltage V2 on the drain side node N4 also changes following the voltage V1. On this occasion,
Due to the current mirror effect between the circuit on the PMOS 14 side and the circuit on the PMOS 21 side, a constant power supply current flows through the source / drain of the PMOS 21. Voltage V on node N4
When 2 changes, the time constant of the time constant circuit formed by the transconductance gm of the inverter 23 and the capacitor 24 changes, and the phase of the output signal of the inverter 23 changes. The output signal of the inverter 23 is the amplification circuit 30.
It is inverted by the inverter 33 inside, and the inverted signal is inverted by the inverter 34. Then, the inverter 34
Is driven by the output buffer 50, and the output voltage Vo having the oscillation frequency corresponding to the change in the input voltage Vc is output.

Next, the operation of the compensation circuit 60 will be described. This compensating circuit 60 has the same circuit configuration as the voltage control circuit 10, and both differ only in the voltage input to the (−) input terminals of the differential amplifiers 11, 63. That is, the input voltage Vc is input to the (−) input terminal of the differential amplifier 11 in the voltage control circuit 10, but the divided voltage is input to the (−) input terminal of the differential amplifier 63 in the compensation circuit 60. Resistors 61,6
The reference voltage Vr generated in 2 is input. The input reference voltage Vr and the voltage V4 on the drain side node N6 of the PMOS 66 are differentially amplified by the differential amplifier 63, and the output signal thereof is integrated by the resistor 64 and the capacitor 65. Based on the result of the integration, the PMOS 66 is gate-controlled to perform a follow-up operation such that the voltage V4 on the drain side node N6 matches the reference voltage Vr. At this time, a constant power supply current flows through the PMOS 66 and the reference resistor 67 by the high resistance reference resistor 67. The PMOS 31 in the amplifier circuit 30 is gate-controlled by the integration result of the resistor 64 and the capacitor 65, and a constant power supply current flows through the PMOS 31 due to the current mirror effect between the circuit on the PMOS 66 side and the circuit on the PMOS 31 side, and its drain The voltage V3 on the side node N5 is kept constant. Therefore, the fluctuation of the phase of the crystal oscillation circuit due to temperature change or the like is controlled, and the output voltage Vo having a more stable oscillation frequency can be output from the output buffer 50.

As described above, this embodiment has the following advantages (a) to (c). (A) Inverters 23, 33, 34, crystal unit 4
0, the feedback resistor 41, and the capacitors 42 and 43 form a crystal oscillation circuit. When the input voltage Vc changes, the voltages V1 and V2 follow the same operation, the time constant of the time constant circuit composed of the inverter 23 and the capacitor 24 changes, and the phase of the output signal of the inverter 23 changes. . As a result, the oscillation frequency of the crystal oscillation circuit changes corresponding to the change of the input voltage Vc. Therefore, unlike the conventional VCO that changes the load capacitance value for the crystal resonator 40, the variable range of the oscillation frequency can be increased. (B) Since the crystal oscillator circuit is used and the phase is changed by the phase shift circuit 20 according to the change of the input voltage Vc, the oscillation frequency with respect to the fluctuation of the power supply voltage Vdd, the change of the temperature, the change of the load, etc. Good stability. In particular, in this embodiment, since the compensation circuit 60 is provided, the stability of the oscillation frequency with respect to temperature changes and the like is higher. (C) Since the VCO is configured by using MOS transistors and the like, the circuit configuration is simple and the power consumption can be reduced as compared with the conventional bipolar transistor configuration.

The present invention is not limited to the above embodiment,
Various modifications are possible. The following are examples of such modifications. (1) Instead of the high resistance reference resistors 15 and 67, a temperature sensitive element such as a thermistor may be provided. For example, if a thermistor is provided, the resistance value will decrease as the temperature rises, and P
Since the power supply currents flowing through the sources and drains of the MOSs 14 and 66 increase, the gate control rate of the PMOSs 14 and 66 increases, and the temperature change suppression speed increases. (2) The time constant circuit composed of the inverter 23 and the capacitor 24 may be configured to increase the time constant by increasing the number of stages and delay the phase by 180 ° or more. (3) The PMOS 14, 21, 31, and 66 may be replaced with NMOS, and the circuit configuration may be changed such that the polarity of the power supply is changed accordingly. (4) The amplifier circuit 30 may be composed of one or three or more stages of inverters, or may be composed of other amplifiers. (5) The crystal oscillator 40 may be replaced with another piezoelectric oscillator such as Rochelle salt, barium titanate, or ceramics. At this time, depending on the type of the replaced piezoelectric vibrator, its peripheral circuit may be changed to a circuit configuration other than that shown.

[0015]

As described in detail above, according to the first aspect of the invention, the oscillation frequency of the oscillation circuit including the first and second inverters, the oscillator, the feedback resistor, and the first capacitor can be adjusted. On the other hand, by changing the phase by the phase shift circuit according to the change of the input voltage, the oscillation frequency is changed according to the change of the input voltage. The oscillation frequency is stable against fluctuations in temperature, changes in temperature, changes in load, and the like. Moreover, since the oscillator and the MOS transistor are used to configure the VCO, the circuit configuration is simple and the power consumption can be reduced. According to the second aspect of the invention, since the compensation circuit is provided to control the gate of the fourth MOS transistor, the stability of the oscillation frequency with respect to temperature changes and the like can be further improved. According to the third invention, since the temperature sensitive element is provided in place of the reference resistance, the value of the current flowing through each source / drain of the first and third MOS transistors changes depending on the temperature change. Therefore, the first and third MO
The gate control rate of the S-transistor is increased, and the temperature change suppression rate is increased. According to the fourth aspect of the invention, since the oscillator is composed of the crystal oscillator, the stability of the oscillation frequency can be further improved against fluctuations in the power supply voltage, changes in temperature, changes in load, and the like.

[Brief description of drawings]

FIG. 1 is a circuit diagram of a VCO showing an embodiment of the present invention.

FIG. 2 is a schematic configuration block diagram of FIG.

[Explanation of symbols]

10 Voltage control circuit 11,63 Differential amplifier 12,64 Resistance 13,22,24,32,42,43,65 Capacitor 14,21,31,66 PMO
S 15,67 Reference resistance 20 Phase shift circuit 23,33,34 Inverter 30 Amplification circuit 40 Crystal oscillator 41 Feedback resistance 50 Output buffer 60 Compensation circuit N1, N2, N3, N4, N5, N6 node Vc Input voltage Vdd, Vss Power supply voltage Vo Output voltage Vr Reference voltage Vreg Constant voltage

Claims (4)

[Claims] 1. A first differential amplifier that differentially amplifies an input voltage and a voltage on a first node, a first integrating circuit that integrates an output signal of the first differential amplifier, and a first differential circuit. A first MO whose source and drain are connected to the power supply voltage and the first node and which is gate-controlled by the output signal of the first integrating circuit.
An S-transistor, a voltage control circuit having a first reference resistance connected between the first node and a second power supply voltage, a vibrator connected in parallel between the second and third nodes, and A feedback resistor; a first capacitor connected between the second node and the second power supply voltage; and a first capacitor connected between the third node and the second power supply voltage; A second MOS transistor whose source / drain is connected to a fourth node and a source / drain of which is gate-controlled by the output signal of the first integrator circuit, and whose second terminal is connected to a power supply terminal. A one-stage or multiple-stage first inverter that inverts or normally rotates the signal on the node,
And a phase shift circuit having a second capacitor connected between the output terminal of the first inverter and the second power supply voltage, and the first inverter by one stage or a plurality of stages of the second inverter. An amplifier circuit that amplifies the output signal of 1. and outputs a signal having an oscillation frequency according to the input voltage to the third node. 2. The voltage controlled oscillator according to claim 1, wherein a reference voltage generation circuit connected between the first and second power supply voltages to generate a reference voltage, the reference voltage and a voltage on a fifth node. A second differential amplifier for differentially amplifying, a second integrating circuit for integrating an output signal of the second differential amplifier, the first differential amplifier
Of the third MOS transistor whose source / drain is connected to the fifth node and the source / drain of which is gate-controlled by the output signal of the second integrating circuit, and the fifth node and the second power source voltage. A compensating circuit having a second reference resistance connected between the source and the drain is connected to the first power supply voltage and the power supply terminal of the second inverter, and a gate is formed by an output signal of the second integrating circuit. A voltage controlled oscillator, comprising: a controlled fourth MOS transistor. 3. The voltage controlled oscillator according to claim 1, wherein a temperature sensitive element whose resistance value changes according to temperature is provided in place of the first and second reference resistors. Oscillator. 4. The voltage controlled oscillator according to claim 1, 2 or 3, wherein the resonator is a crystal resonator.