JPH088759A - Code error correction method - Google Patents

Abstract

(57) [Summary] [Purpose] High-efficiency code error correction processing for S
It is easily realized by the / W process. [Structure] An error syndrome is calculated for an error pattern to be corrected in advance, the error syndromes are reordered for each error syndrome, and the error syndrome upon reception is immediately corrected. In addition, correction processing is performed with high efficiency in combination with frame check sequence (FCS) processing, and error correction in error correction is detected. [Effect] It can be realized with a simple circuit configuration, has a highly efficient correction capability, and can be easily adapted to an actual line.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of correcting an error in a code of received data in digital data transmission.

[0002]

2. Description of the Related Art Among the conventional error correction methods, a method for making an error pattern correction table in which an error pattern and a remainder term correspond to each other 1: 1 and correcting a burst error and a random error at the same time 63-2
No. 86026. FIG. 13 shows a general code transmission function diagram. In FIG. 13, first, in the transmission operation, 1 is transmission data, 2 is an encoding function, 3 is a modulation function for a transport path, and 4 is a transport function on the transport path. In the receiving operation, 5 is a demodulation function from the conveying path, 6 is a decoding function, and 7 is a data display / printing function, which is substantially received data. FIG. 14 shows an encoding / decoding circuit by a microcomputer that realizes the functions of FIG.

In FIG. 14, 10 is a central processing unit (hereinafter, CPU), 11 is a read-only memory (hereinafter, ROM),
12 is a random access memory (hereinafter referred to as RAM), 13 is a parallel input / output circuit, and 14 is a serial input / output circuit. The method of creating an error pattern table and correcting errors is described in FIG.
By converting the data in the ROM 11 of No. 4 into a data table, the code error correction process can be easily performed. The above-mentioned JP-A-6
FIG. 15 shows a state transition diagram in the conventional code error correction process according to No. 3-286026.

Next, the operation will be described below by adding steps S1 to SN to each operation. In FIG. 15, as time T elapses, reception processing, error detection processing, error correction processing, and processing result correspondence are performed. First, in the receiving process, in the code receiving process S1, the received code (including the data part and the check bit part) is stored in the RAM 12 at a fixed address, for example, prior to the following process. In this case, in order to facilitate the subsequent processing, the data portion and the check bit portion are divided, and in the error detection processing, the result obtained by operating the received code with the generator polynomial is "no error" S2-1.
And “There is an error” S2-2. In the error correction process, in the case of the above-mentioned “error present” S2-2 determination process, the error pattern is extracted and corrected from the error pattern correction table in the ROM 11, but when the error pattern exists in the table, “ Correctable "
It becomes the state of S3-1 and can be corrected.

In this case, "correction" S4-1 results and "erroneous correction" S4-2 occurs in an error pattern outside the original correction capability. On the other hand, if the error pattern does not exist in the error pattern correction table, “uncorrectable” S
The state becomes 3-2. As a result of the whole processing, the results of the above-mentioned respective processing S2-1, S4-1, S4-2 are restored data S5.
And is restored to the original transmission code. It is divided into "correct reception" S6-1 and "correct reception" S6-2 which is erroneously corrected. Part of S2-2 and the result of S3-2 are "not received" S
6-3. However, "correction" S4-1 and "correction"
S4-2 and "correct reception" S6-1 and "erroneous reception" S6-
Neither of the two can be distinguished.

Therefore, the state transition process in the conventional code error correction process of FIG. 15 can be generally said to be a correction code by a cyclic code. When a method based on a correction operation is adopted, a certain error pattern can be corrected 100%, but in the other patterns, the state becomes “uncorrectable” S3-2 or “miscorrection” S4-2.

[0007]

However, the conventional method has a problem that there is a "uncorrectable" state in which correction processing cannot be performed, and erroneous correction of correctability cannot be determined, and the code correction capability is small. .

The present invention has been made to solve the above problems, and the present invention is "correctable".
Make the state as small as possible so that miscorrection can be identified,
The error correction capability is greatly improved, and the code can be corrected by a simple correction process. In addition, the high quality "normal reception" state can be maintained. In addition, it is possible to perform efficient processing that matches the characteristics of the practical line and improve the code error correction capability. Further, it is intended to enable highly reliable error correction.

[0009]

A code error correction method according to the invention of claim 1 is an error correction method for a digital reception code using an error correction code by a cyclic code and a burst error correction code. Is classified into multiple error patterns such as single burst error, 2-bit random error, 3-bit random error, etc., prioritized for these, and the error syndromes of all these error patterns are calculated, and all error syndromes are calculated. On the other hand, by expanding until one or more error patterns are filled and further arranging these error syndromes in order of priority for each error syndrome, one with a higher priority is tabulated as an error pattern to be corrected in advance. , Code error detection processing after reception processing Error is generated by extracting the highest priority error pattern to be corrected for the error syndrome from the error syndrome caused by the error syndrome calculation and the error pattern correction table, and performing an exclusive OR operation on the received data. Is used as a code error correction method.

A code error correction method according to a second aspect of the present invention is an error correction method for a digital received signal using an error correction code by a cyclic code and a burst error correction code. , Two-bit random error, three-bit random error, etc. are classified, priorities are assigned to these, and all error syndromes of the error pattern are calculated, and the error syndromes are sorted in the order of these error syndromes. 1 or more error patterns are the first correction pattern in the order of priority of error patterns,
Second correction pattern: A data table arranged with the a-th correction pattern (a is a positive integer) is prepared in advance, and after the reception processing, the error syndrome and error pattern correction caused by the error syndrome calculation by the code error detection processing are performed. From the table, an error pattern to be corrected for an error syndrome is immediately restored when there is one error pattern, and when there are a plurality of error patterns, as frame restoration sequence (FC) as restoration data to be sequentially corrected according to the priority order
And a code error correction method capable of correcting the code errors for all of the selected error patterns by passing them to the frame error detection process in the process, repeating until no code errors are detected, and selecting and processing the error patterns. did.

In the code error correction method according to the third aspect of the present invention, when there is a large amount of transmission information, the error correction code is used as a plurality of block codes, and the last block code is corrected from the error pattern correction table to the error syndrome. If there is one error pattern, the frame check sequence (FC
S) In the transmission code configured to perform the overall error detection process using the frame check sequence (FCS) process, which is passed to the frame error detection process in the process, the error detection and the error correction for each block immediately after reception. Process, when an error is detected, it is immediately corrected from the error syndrome and the error pattern correction table,
As a result, the restored data is determined for each of the transmission codes, and the code error correction method is used to determine the normal reception state or the non-reception state by the error detection process of the entire data by the FCS process.

The code error correction method according to the invention of claim 4 is used as a plurality of block codes when there is a lot of transmission information, and a frame length check sequence (FCS) process of the data length is used for the last block code. In a transmission code that is configured to perform overall error detection processing, an error pattern correction table that can correct all error pattern classifications after reception is used to temporarily store the restored data as one or more candidates. A code error correction method is performed in which the restored data is combined with each other and is determined separately in the normal reception state and the non-reception state in the FCS processing.

According to a fifth aspect of the present invention, the code error correction method uses the FC in the restoration data combination process and the FCS process.
If there is no error in the first correction candidate in the S process, the normal reception state is set. If there is an error, a combination process is used to efficiently create a plurality of combinations of data having restored data other than the first correction candidate. Therefore, the FCS syndrome of the data portion (restored data) of each block code is selected so that the error syndrome (FCS syndrome) due to the FCS processing of these restored data is selected only once.
Nesting processing is made with a code word number, a pointer indicating the order of the code words, and an error syndrome of the whole data calculated so far, and the FCS syndrome of the restored data is 1
In the case of only one, the processing is advanced to the next, and the FCS processing is performed only in other cases, but instead of performing the FCS processing of the entire code, the restored data of the first candidate of the specific block code for the already-calculated FCS processing. FCS processing is performed by excluding the code of the specific block from the overall code by creating the logical sum of the FCS syndromes of the above, and the FCS syndrome of the restored data other than the first candidate for the error syndrome excluding the specific block code. Indicated by the pointer, and the decoded data is subjected to an exclusive OR operation (XOR) to perform the FCS processing of the entire code.
An error syndrome calculation is performed, and when it does not become 0, it is determined that there is an error, and all the combination processing is performed in order.

In the code error correction method according to the sixth aspect of the present invention, the error patterns divided into groups are corrected by 100%, and the erroneous correction for other errors is performed by the first FCS in the second FCS processing. When an error detection code different from that used in the processing is added and an XOR operation result = 0 for the FCS error syndrome of each restored data in the normal reception state in the first FCS processing described above is obtained, each restored data at this time And a second FCS received word, the FCS processing is performed between a plurality of restored data that has been error-corrected, and if this operation result is 0, a code that determines that there was no missed error in the first FCS processing. The error correction method was used.

[0015]

According to the first aspect of the present invention, the error patterns to be corrected are classified into error patterns having a high correction efficiency and adapted to the error patterns of the lines used, all the error syndromes are tabulated, and an error pattern table is created for each error syndrome. By forming one or more error patterns for each error syndrome, the "uncorrectable" state of S3-2 can be eliminated and the "correctable" state S3-1 can be set to one or more.

According to the second aspect of the present invention, the restored data is sequentially processed by selecting the correctable data until the state of "no error" is obtained by the error detection process of the entire received data by the frame check sequence (FCS) process. It is possible to maintain a high-quality "normal reception" state by finally making it non-reception only when there is no error-free state for all correctable data.

According to the third aspect of the present invention, the code error correction method can select an efficient error pattern that matches the characteristics of the actual line, and can easily correct the error pattern according to the error table for each error pattern syndrome.

In the invention of claim 4, a large number of necessary and sufficient error correction candidates can be created, and the code can be corrected by a simple process. By implementing the error pattern syndrome-specific error table in ROM, it can be sufficiently realized by general microcomputer processing and the like without depending on special hardware.

According to the fifth aspect of the invention, since all the combination processing is performed, the "erroneous correction" can be minimized and the "correction correction" can be increased.

In the sixth aspect of the invention, since the second FCS processing is performed in addition to the first FCS processing, highly reliable error correction is possible.

[0021]

【Example】

Example 1 (corresponding to claim 1). A first embodiment of the present invention will be described with reference to the drawings. As an example of the error correction code, data 16 bits, check bit 1
In the case of a burst error correction code of 1 bit (total 27-bit length code), when the error correction ability of the burst length up to 5 bits, the code length, the data length, and the correctable burst length are in the format (27, 16, 5). Will be expressed as For the example using this code (27, 16, 5), the correction table of the burst error and the random error is shown in the ROM 11
Created in, and used as data in ROM 11,
A method for error correction in microcomputer processing using this ROM table is disclosed in Japanese Patent Application Laid-Open No. 63-286026.

The present invention extends this method further, expanding the correction capability and facilitating the processing. First, the basic concept of code correction processing when creating a transmission code will be described. The code word F (X) is represented by F (X) = (f _n-1 , f _n-2, ... F ₁ , f ₀ ) where f _n-1 , f _n-2, ... F ₁ , f ₀ are "0". When expressed as "," or a value of "1", in polynomial expression, F
(X) = f _n-1 · X ^n-1 + f _n-2 · X ^n-2 + ... + f ₁
・ X ¹ + f ₀・ X ⁰ . Similarly, send data D
(X), the check bit R (X) is D (X) = d _k-1 · X ^k-1 + d _k-2 · X ^k-2 + ... + d
^{_{1 · X 1 + d 0 ·}} X 0 R (X) = r nk-1 · X nk-1 + r nk-2 · X nk-2 +
... is expressed as + r ₁ · X ¹ + r ₀ · X ⁰ . The generator polynomial G (X) in the cyclic code is G (X) = X ^nk + g _nk-1 · X ^nk-1 + ... + g ₁ ·
It is expressed as X ¹ + g ₀ · X ⁰ . If these relationships are expressed in the form of the remainder theorem, the codeword equation is as shown in the following equation (1).

F (X) = G (X) · Q (X) = D (X) · X ^nk + R (X) (1) (F (α) = 0, where α is the root of G (X)) Become. The meaning is the code word F (X) obtained by adding the remainder R (X) to the data D (X) · X ^nk , and F (X) is the generator polynomial G.
Dividable by (X). The quotient polynomial at that time is Q (X). If D (X) · X ^nk is divided by G (X), the remainder R
(X) can be done. However, since it is an operation in the Galois set (MOD2), algebraic operation is possible.

Next, the concept of the code correction process during the reception code process will be described. If the above equation (1) is a transmitting process, the error polynomial E (X) is added to the above equation (1) during the receiving process, and the receiving polynomial is J (X) = F.
(X) + E (X). In the expression of the expression (1), since J (α) = F (α) + E (α) and F (α) = 0, = E (α) (2)

This means that the relationship between the code word F (X) and the remainder R (X) at the time of transmission is the error polynomial E at the time of reception.
(X) and the error syndrome R (X). Generate the receiving polynomial J (X) and the generating polynomial G
The operation of dividing by (X) is the same as the operation of dividing the error pattern E (X) by the generator polynomial G (X). The present invention classifies code errors to be corrected which are suitable for an actual line, and calculates a set of residuals (error syndromes) {R ₀ (X)} corresponding to an error pattern {E ₀ (X)} based on the classification. . A table in which the respective remainders {R ₀ (X)} are arranged in order is created, and when the error syndrome R ₀ (X) is obtained in the error detection process after the reception process, the error term E for this is generated.
₀ (X) is brought from the table and corrected immediately.

According to the present invention, the original correction capability of the correction code can be expanded, and at the same time, the conventional "uncorrectable" state of S3-2 can be eliminated. The present invention will be described in more detail.
In the following description, a specific example will be given for a burst length error correction code having a code length of 27, a data length of 16, a correctable burst length of 5 bits, and a format (27, 16, 5), but is also valid for codes of other formats. . First, in FIG. 1 and FIG.
The error pattern classification method and the error pattern classification example 1 for the (27, 16, 5) code will be described, and the error pattern classification example 2 will be described later. A single burst error, for example, a 5-bit burst error will be described.
The error patterns to be corrected on the actual line are classified as follows.

5-bit burst error (original correction code ability) 2-bit random error 3-bit random error 4-bit random error In this way, in all combinations of 27 bits in FIG. The numbers are the numbers of the respective combinations corresponding to the above error patterns (the overlapping part is not counted). Numbers in the error pattern are numbered according to priority. A table in which all error syndromes of these error patterns are calculated and rearranged in the order of the error syndromes is shown in the error pattern correction table of FIG.

In FIG. 3, G is a generator polynomial.
(X) = (X ¹⁰ + X ⁸ + X ⁷ + X ⁵ + X ⁴ + X ³ +1)
(X + 1) is used, and the SYND (Syndrome) column is 11
It is a 3-digit hexadecimal (HEX) representation of the bit error syndrome. In the first to fourth correction columns, EP is 16 bits of data to be corrected, R is 11 bits of residual bits to be corrected corresponding to {R ₀ (X)}, and TP numbers 1, 3, 2 , 4 correspond to the 5-bit burst error to 4-bit random error in the correction pattern, respectively. All of the 5 bits burst error to the 4 bits random error cannot be expressed in FIG. 3 by arranging the 5 bits burst error to the 4 bits random error in the first correction column. Are all included in. Further, in the error pattern up to 4-bit random error, the data to be corrected is filled in all the first correction columns in all the error syndromes. In FIG. 3, up to the fourth correction column is displayed, and up to the fourth candidate are displayed due to space limitations.

The present invention will be explained with reference to the difference between FIG. 15 and FIG. 5 as to the method of correction processing using the first correction column in FIG. The code error correction process in the present invention is shown in FIG. The process up to the reception process and the error detection process is the same as in FIG. Here, when the state of "error" S2-2 is shifted to the error correction processing step, if the first correction column of FIG. 3 is used, there is always one error pattern corresponding to the error syndrome. Impossible goes away. Next, the error pattern to be corrected is known, and the correct correction S4-1 and the incorrect correction S4- are performed.
Although there is 2, the restored data S5 can be reproduced.

Embodiment 2 (corresponding to claim 2). The second embodiment of the present invention will be described in more detail with reference to FIG.
5 bit burst error to FIG. 1 to 4
This error pattern classification example 1 is a case in which all error patterns of bit random errors are selected as error patterns to be corrected, and the error pattern correction table at that time is shown in FIG. In this case, the condition to be corrected is the first
Correction, 2nd correction ... Data can be created in each column of the a-th correction. (In FIG. 3, the candidates for the fourth correction are displayed on the paper surface.) The first correction to the a-th correction are performed in a number of “correctable” states S3-1 to S3-a shown in FIG. It corresponds. If processing is performed according to this error pattern correction table example 1, a large number of restored data S5-1 to S5-a that are the object of code error correction are generated respectively.

With respect to these, by the frame check sequence (FCS) processing, which is a method of sequentially arranging the entire correction candidates and sequentially verifying them, the restored data S5-1 is obtained.
Calculate the error syndrome of S5-a. If it is divisible by the generator polynomial by the FCS processing, "correct reception" S7-1
To determine. If it is not divisible, select "restoration data" S6
The next restored data is selected and the FCS process is performed, and if the FCS process of the last restored data S5-a is not divisible, it is determined as "non-reception" S7-3. Thus, the error pattern of the 5-bit burst error to the 4-bit random error in Fractional Example 1 of FIG. 1 can be corrected 100%.

Embodiment 3 (corresponding to claim 3). A third embodiment of the present invention will be described with reference to the drawings. In FIG. 7, when there are a plurality of code words 1 to n + 1 in the present embodiment, the code error correction process (FIG. 5) and the FCS process of FIG. 6 are combined to immediately perform the restoration data selection S6. Indicates that error correction and FCS processing will be performed.

[0033] each codeword W ₁ ~W _{n + 1} of the restored data S5-
1 to S5-n are necessarily determined one by one. The "correct reception" S7-1 and "non-reception" S7-3 can be immediately determined by the error syndrome calculation in the FCS processing.
However, W _{n + 1} is a code word of the FCS check bit.
Next, other error patterns will be described in detail below.

FIG. 2 shows another error pattern classification example 2 for formats (27, 16, 5) and codes, which is an example of another error pattern. The error pattern to be corrected on the actual line is 5 bit burst error (original correction code capability) 1 bit + 5 bit burst error (1 bit random error occurs first) 5 bit burst + 1 bit error (1 bit random error occurs later) ), The numerical value in the circle in FIG. 2 is the number of combinations of error patterns to be corrected (the overlapping portion is not counted). The numbers ~ in the error pattern are numbers of priorities.

An error pattern correction table example 2 in FIG. 4 shows a table in which the error syndromes are calculated for all of these error patterns and the error syndromes are rearranged in the order. In FIG. 4, up to the fifth correction column is displayed due to space limitations. As a generator polynomial in FIG.
(X) = (X ¹⁰ + X ⁸ + X ⁷ + X ⁵ + X ⁴ + X ³ +1)
(X + 1) is used, and the SYND (Syndrome) column is 11
It is a 13-digit hexadecimal (HEX) representation of the bit error syndrome. In the first to fifth correction columns, EP corresponds to 16 bits of data to be corrected, R corresponds to {R ₀ (X)}, and the surplus bits 11 to be corrected
The numbers 1, 2, and 3 of TP correspond to the above 5 bit burst error to 5 bit burst + 1 bit error in the correction pattern, respectively.

Also in this case, one or more error patterns exist in all error syndromes, and the first correction column is filled with the data to be corrected. Therefore, the state of the conventional "uncorrectable" S3-2 can be eliminated. The correction processing method and its correction capability are the same as those of the FCS processing of FIG. That is, the first correction to the a-th correction correspond to a large number of “correctable” states S3-1 to S3-a shown in FIG. If processing is performed according to this error pattern correction table example 2, a large number of restored data subject to code error correction will be S5.
-1 to S5-a are generated respectively.

For these, the error syndromes of the restored data S5-1 to S5-a are calculated by sequentially performing the entire frame check sequence (FCS) process.
"Normal reception" if divisible by the generator polynomial by FCS processing
It is determined to be S7-1. If it is not divisible, the next restoration data is selected and FCS processing is performed by "restoration data selection" S6. If it is not divisible until the FCS processing of the last restoration data S5-a, "non-reception" S7-3 is determined. Thus, the 5-bit burst error in Fractional Example 2 of FIG.
An error pattern of 5 bit burst + 1 bit error can be corrected 100%.

As a result, it is possible to expand the 368 kinds of 5-bit burst error correction, which is the original coding ability, to 2 ¹¹ (= 2048) kinds, which is the total number of check bit combinations. Similarly, in FIG. 7, a plurality of code words 1
If ~ n + 1 exists, it indicates that the error correction and the FCS processing are immediately performed by performing the combination processing of the code error correction processing (FIG. 5) and the FCS processing of FIG. 6 without the above-mentioned restored data selection S6. .

On the other hand, a plurality of code words W ₁ , W ₂ , W _{n + 1}
( _{Wn + 1} is the frame check sequence (FC
S)), the restored data that has been subjected to the error correction processing is uniquely determined, and these are restored to S5-1 to S5- (n +
If it is set to 1), an exclusive OR (XOR) operation is performed on each frame in the FCS processing, and the entire frame (W _{1 to} W _{n + 1} )
If the error detection processing of (1) is successful and the result (FCS error syndrome) is 0, the normal reception is S7-1. If it is not zero, it becomes "non-reception" S7-3, and the above "wrong correction" S4
Most of -2 can be in this state. The erroneous reception S7-2 is included in the correct reception S7-1 as a result and cannot be identified in the code error correction process, but the number thereof is small.

Embodiment 4 (corresponding to claim 4). A fourth embodiment of the present invention will be described with reference to the drawings. FIG. 8 shows a code error correction process for a plurality of code words, simultaneously targeting all error pattern corrections as shown in Example 1 of FIG. 3 and Example 2 of FIG. 4 as shown in FIG. The number of restored data in this case is a corresponding to each code word W ₁ , W ₂ ... W _{n + 1.
1} , a ₂ ... A _{n + 1} , the number of combinations of correction data to be subjected to FCS processing is a ₁ · a ₂ · a _{n + 1} , which is enormous with the number of code words.

On the other hand, the FCS of all the restored data
A flow chart of FIG. 9 shows a method of transferring error syndromes in the processing (hereinafter, abbreviated as FCS syndrome) once to the FCS processing to efficiently perform restoration data combination. As shown in the restored data combination processing and FCS processing flow in this embodiment of FIG. 9, the first correction candidate of the code words W ₁ to W _{n + 1} , that is, the error-free judgment, or the error pattern correction to be corrected. The data corrected by the first correction column in FIGS. 3 and 4 are data D ₁ (1), D ₂ (1) ...
... D _{n + 1} (1). These FCS Syndrome R
FCS processing X of ₁ (1), R ₂ (1) ... R _{n + 1} (1)
OR ₁ is XOR ₁ = R ₁ (1) + R ₂ (1) …… + R
_It becomes _{n + 1} (1) and is performed in "Processing" P11. FCS
A serial number x'is added to the processing result so that the subsequent processing can be easily identified.

As a result of the processing "determination processing" P12,
When XOR ₁ is 0, the FCS processing is completed, and the state is the normal reception S7-1 of FIG. In this case, erroneous reception S7-2 in FIG.
It is known that the case of is extremely low in probability. On the other hand, if it is not 0 in "processing" P12, the process proceeds to "processing" P13. Here, the code word number W (= 1, 2, ...
... n + 1) past FCS processing number x (= 1, 2 ... x
By nesting for the _max) and each code word D _i pointer P for restoring data number a _i of (= 1,2 ...... a _i) indicating that the exclusive OR operation can be efficiently performed.

Embodiment 5 (corresponding to claim 5). A fifth embodiment of the present invention will be described with reference to FIG. First, the initialization of the code word number is performed in "Processing" P13, and then "Processing" P13.
1 is added at 14. When the maximum number of codewords n + 1 is generated in the "determination process" P15, all the processes are completed according to * 2, and this state is the non-reception S7-3. On the other hand, if W cannot occur n + 1, the past FCS process number x is initialized in "process" P16, and "process" P17.
Is incremented by 1. In the “judgment process” P18, when the maximum number of past FCS processes x _max has occurred, F is added to x _max .
Substituting the current maximum number of CS processes, x ', and returns to "Process" P14 to move to the process of the next codeword.

When x _max cannot be generated, the pointer P is initialized in the "process" P20, and the "process" P2 is executed.
1 is incremented by 1. The “determination process” P22 is performed when there is only one restored data of the codeword W ((P = 1) AND
P + 1> _aw )). In this case, since the restoration data selection process is unnecessary, the process returns to P14, and the next code word is selected. In the "judgment process" P22, when a plurality of restored data are recognized, the process moves to the "judgment process" P23, where the pointer P indicates the maximum restored data a of the code word.
_{If w} cannot occur, the subsequent FCS processing is performed according to * 1. If it occurs, the process returns to "Processing" P17, and the next FCS processing result is sequentially processed.

In the "judgment process" P24 according to * 1, when the pointer P = 1, the x-th FCS process result XOR _x has already been calculated. Further, as a specific block of this code word, the first correction candidate D _w
By FORing the FCS syndrome R _w (1) of (1), the FCS processing result XOR _x (−R _w (1)) excluding this code word is obtained in “processing” P25.
XO from the next pointer P1 to "Process" P26
By performing R _x (−R _w (1)) + R _w (P), F
The same result can be obtained by performing the exclusive OR of the FCS syndrome of the n restored data of the code words W _{1 to} W _{n + 1} which is the CS process.

This processing result XOR _X is "determination processing" P2
If it is 0 in 7, it is determined that there is no error, the processing is completed, and the normal reception S7-1 state is set. If it is not 0, the XOR _x data is added with the coefficient of x ′ in the process P28, and the process returns to the pointer next to the “process” P21. In this way, while sequentially using the results of FCS processing,
New restored data can be captured only once to create a combination of all restored data. FIG. 10 shows a process in which a plurality of restored data and FCS calculation are updated by the combination processing as shown in FIG.

Embodiment 6 (corresponding to claim 6). A sixth embodiment of the present invention will be described with reference to the drawings. FIG. 11 illustrates the structure of the code word of the present invention and the method of reducing the ability of the missed error rate accompanying the error correction of the present invention. In the code word structure of the present invention, data to be transmitted is divided into blocks of a fixed length and divided into data D _{1 to} D _n in code words _{1 to} n in the figure. On the other hand, the remainders divided by the error-correction generator polynomial G _FEC are added to CRC ₁ to CRC _n , respectively. On the other hand, the above D
The remainder in the generator polynomial G _ED α of the first error detection code for ₁ , D ₂ ... D _n is FCSα, and the remainder of G _FEC for this is CRC _{n + 1} .

The above is the code configuration method at the time of transmission. On the other hand when receiving. Received data (D ' ₁ , CRC' ₁ ) to (D '
_n , CRC ' _n ), (FCS'α, CRC' _{n + 1} ) calculates the division remainder of the generator polynomial G _FEC for each word, but when the remainder is 0, it is determined that there is no error, If there is a remainder, one or more of the error pattern correction table examples 1 to 2 or a plurality of restored data (correction candidates) D _i (1) to D
_i (a _i ) is obtained. Generator polynomial G _ED for these
The error syndromes R _i (1) to R _i (a _i ) of α are obtained, and the data to be corrected in the FCS process is determined in the combination process of these.

In this case, the FCS processing result is determined to be correct by determining one combination of the restored data of the code words 1 to n. When an error pattern other than the error pattern correction table examples 1 and 2 occurs, the FCS processing can determine most of the error correction as to the error correction. The following processing is added to further improve the error detection capability. On the other hand, the second error detecting code is different from the first one in the generator polynomial G _ED β data D ₁ , D ₂ ...
The surplus FCS'β due to D _n is added.

Received data (FCS'β, CRC ' _{n + 2} )
For the restored data D _{n + 2} (1) to D _{n + 2} (a _n +
For each 2), one combination of the first FCS processing result restored data is determined. In this case, if the restoration result is correct and the restoration data for FCS'β is also correct, the FCS processing by these combinations, that is, the division remainder result by the second generator polynomial G _ED β is 0. Is clear. By performing the FCS processing twice as described above, the missed error detection capability can be enhanced.

When the effect of the present invention is evaluated, the error correction capability, processing efficiency, economic effect, etc., are as follows. (1) Error correction capability The conventional 5-bit burst error correction capability is 368 out of 2 ²⁷ types (according to FIGS. 1 and 2). On the other hand, the correction capability according to the present invention is 21,079 in the case of FIG. 1 and 8,464 in the case of FIG. 1 and 3 according to the present invention, there are 2,048 ways (out of ²⁷ ways) (each codeword unit).

On the other hand, FIG. 12 shows the S / N improvement characteristics of the modem according to the present invention. The correction error pattern and S / N improvement are shown in the figure. The vertical axis represents the element error rate Pe, and the horizontal axis represents the modem input signal-to-noise ratio S / N. Format (2
In the cyclic code (7, 16, 5), the element error Pe is 27 when no code error correction is performed.
0.5 bit error in bits (Pe = 0.5 / 27)
Received half at. In the half unaccepted state,
It is represented by SN ₀ of S / N input in the figure. On the other hand, it is represented by SN ₁ at Pe = 1.5 / 27 in the _1- bit correction state, SN ₂ at Pe = 2.5 / 27 in the _2- bit correction state, and SN ₃ in the 3-bit correction state. S for SN ₁
/ N improvement effect is recognized. The 4-bit correction capability according to the modem system is as follows. FSK asynchronous detection system improved by about 4.7 dB BPSK synchronous detection system improved by about 7.3 dB (2) Processing effect In the case of the inventions of claims 1 and 3, correction processing can be immediately performed from the error syndrome. Claim 2
In the case of the inventions of the items (4) and (4), a higher correction process can be easily performed by performing the restoration data combination process. (3) Economic effect It is possible to easily perform error correction adapted to a real line by general microcomputer processing without requiring special hardware.

[0053]

As described above, according to the first aspect of the invention, in the error correction method for the digital reception code using the error correction code by the cyclic code and the burst error correction code, the error pattern of the real line is simply Classify into multiple error patterns such as 1 burst error, 2 bit random error, 3 bit random error, etc., prioritize these, calculate the error syndromes of all these error patterns, and for all error syndromes Expanding until one or more error patterns are filled, and further, regarding these error syndromes, one having a higher order among the above-mentioned priority order for each error syndrome is tabulated as an error pattern to be corrected in advance, After reception processing, code error detection processing An error is generated by extracting the highest priority error pattern to be corrected for the error syndrome from the error syndrome generated by the error syndrome calculation and the error pattern correction table, and performing an exclusive OR operation on the received data. Since the code error correction method for correcting the above is used, it is possible to eliminate the "uncorrectable" state and set the "correctable" state to 1 or more by forming one or more error patterns for each error syndrome.

According to the second aspect of the present invention, in the error correction method for the digital reception code using the error correction code by the cyclic code and the burst error correction code, the error pattern of the real line is a single burst error or a 2-bit random error. , Three-bit random error, etc. are classified into a plurality of error patterns, priority is given to these, all error syndromes of the error patterns are calculated, and one or a plurality of error patterns for each error syndrome are calculated in the order of these error syndromes. A data table in which the first correction pattern, the second correction pattern, and the a-th correction pattern (a is a positive integer) are arranged in the order of priority of the error patterns is prepared in advance. Error syndrome caused by syndrome calculation From the error pattern correction table, the error pattern to be corrected with respect to the error syndrome is immediately used when there is one error pattern, and when there are a plurality of error patterns, it is used as restoration data to be sequentially corrected according to the priority order. The code error correction method is designed to correct the code errors for all of the selected error patterns by passing and repeating until the code error is no longer detected, and processing the error patterns. Only when the error-free state does not occur, it is possible to finally make no reception, and it is possible to maintain a high-quality “normal reception” state.

According to the invention of claim 3, when there is a lot of transmission information, the error correction code is used as a plurality of block codes, and the last block code is an error pattern to be corrected for the error syndrome from the error pattern table. When there is one error pattern, immediately when there are a plurality of error patterns, it is passed to the error detection processing of the frame in the frame check sequence (FCS) processing as restoration data to be sequentially corrected according to the priority order. In the transmission code according to claim 1, which is configured to perform overall error detection processing, error detection and error correction processing is performed for each block immediately after reception, and at the time of error detection, correction is performed immediately from the error syndrome and error pattern correction table. And as a result,
The restored data is determined for each transmission code, and the code error correction method is used to determine whether the data is in the normal reception state or the non-reception state by the error detection process of the entire data by the FCS process. It is possible to perform efficient processing and improve the code error correction capability.

According to the invention of claim 4, when there is a lot of transmission information, it is used as a plurality of block codes, and for the last block code, a frame check sequence (FCS) process of the above data length is used, and the whole block code is used. In a transmission code configured to perform error detection processing, the restored data is temporarily held as one or a plurality of candidates by using an error pattern correction table that can correct all error pattern classifications after reception. A combination of these restored data is performed, and in the FCS processing, a code error correction method for determining whether the received state is the normal reception state or the non-reception state is used. Therefore, a large number of necessary and sufficient error correction candidates can be created. The code can be corrected by the processing.

According to the invention of claim 5, in the restoration data combination process and the FCS process, the first is performed in the FCS process.
When there is no error in the correction candidate, the normal reception state is set, and when there is an error, the combined data is used to efficiently create a plurality of combinations of the data having the restored data other than the first correction candidate. The FCS of the data portion (restored data) of each block code is selected so that the error syndrome due to the FCS processing of is selected only once.
The syndrome is nested with the code word number, a pointer indicating the order of the code word, and the error syndrome of the entire data calculated so far, and the above-mentioned F of the restored data is created.
When there is only one CS syndrome, the processing is advanced to the next, and the above FCS processing is performed only in other cases, but instead of performing the FCS processing of the entire code, the first FCS processing of the specific block code is performed for the calculated FCS processing. FCS processing is performed by removing the code of the specific block from the overall code by logically ORing the FCS syndromes of the restored data of one candidate, and the error syndrome other than the specific block code is excluded from the first candidate. The FCS of the entire code is obtained by indicating the decoded data with the pointer of the FCS syndrome and performing the exclusive OR operation (XOR) on the decoded data.
The error syndrome calculation is performed so that the processing is performed, and when it is not 0, it is determined that there is an error, and all the combination processing is performed in order. Corrections can be significantly increased.

According to the sixth aspect of the invention, the error patterns divided into groups are corrected 100%, and the error correction for other errors is different from the first FCS processing in the second FCS processing. XOR for the FCS error syndrome of each restored data in the normal reception state in the first FCS processing, to which different error detection codes are added
When the operation result = 0 is obtained, FCS processing is performed again between each restored data at this time and a plurality of restored data that has been error-corrected from the second FCS received word. Is a code error correction method for determining that there was no missed error in the first FCS processing, and therefore, the second FCS processing is added to the first FCS processing to enable highly reliable error correction. Become.

[Brief description of drawings]

FIG. 1 is a diagram showing an error pattern classification example 1;

FIG. 2 is a diagram showing an error pattern classification example 2;

FIG. 3 is a diagram showing an error pattern correction table example 1 of the present invention.

FIG. 4 is a diagram showing an error pattern correction table example 2 of the present invention.

FIG. 5 is a diagram showing a code error correction process in the present invention.

FIG. 6 shows a first code error correction process and F in the present invention.
It is a figure which shows CS processing.

FIG. 7 shows a second code error correction process and F in the present invention.
It is a figure which shows CS processing.

FIG. 8 shows a third code error correction process and F in the present invention.
It is a figure which shows CS processing.

FIG. 9 is a flowchart showing a combination of restored data and FC according to the present invention.
It is a figure of S processing flow.

FIG. 10 is a data flow diagram of a restored data combination process and an FCS process result of the present invention.

FIG. 11 is a diagram showing a code configuration and a plurality of FCS processes according to the present invention.

FIG. 12 is a diagram showing a correction error pattern and S / N improvement of the present invention.

FIG. 13 is a diagram showing a general code transmission function.

FIG. 14 is an encoding / decoding circuit diagram of a general microcomputer.

FIG. 15 is a state transition diagram in the conventional code error correction process.

[Explanation of symbols]

1 transmission data, 2 encoding function, 3 modulation function to carrier path, 4 carrier function on carrier path, 5 demodulation function from carrier path, 6 decoding function, 7 data display / print function, 1
0 central processing unit, 11 read only memory, 12 random access memory, 13 parallel input / output circuit, 14
Serial input / output circuit.

Claims (6)

[Claims] 1. An error correction method for a digital reception code using an error correction code by a cyclic code and a burst error correction code, wherein an error pattern of a real line is a single burst error, a 2-bit random error, a 3-bit random error, etc. Of error patterns, prioritize them, calculate the error syndromes of all these error patterns, expand all error patterns until one or more error patterns are filled, and About error syndrome,
Of the above-mentioned priority order for each error syndrome, one having a higher order is made into a table as an error pattern to be corrected in advance, and after the reception processing, the error syndrome generated by the error syndrome calculation by the code error detection processing A code characterized by extracting the error pattern with the highest priority among error patterns to be corrected for the error syndrome from the error pattern correction table and performing an exclusive OR operation on the received data to correct the error. Error correction method. 2. An error correction method for a digital reception code using an error correction code by a cyclic code and a burst error correction code, wherein an error pattern of a real line is a single burst error, a 2-bit random error, a 3-bit random error, etc. Of the error patterns, prioritize them, calculate all error syndromes of the error patterns, and prioritize one or more error patterns for each error syndrome in order of these error syndromes. A data table in which the first correction pattern, the second correction pattern, and the a-th correction pattern (a is a positive integer) are arranged in advance, is generated by the error syndrome calculation by the code error detection process after the reception process. The error syndrome and the above error pattern If there is one error pattern, the error pattern to be corrected for the error syndrome is immediately passed from the error correction table to the frame error detection process in the frame check sequence process as restoration data to be sequentially corrected according to the priority order. A code error correction method characterized in that a code error for all of the selected error patterns can be corrected by repeating an error pattern until no error is detected and processing the error pattern. 3. When there is a lot of transmission information, the error correction code is used as a plurality of block codes, and the last block code is an error pattern to be corrected for the error syndrome from the error pattern correction table. In the case of one, immediately when there is a plurality, it is passed to the error detection processing of the frame in the frame check sequence processing as restoration data to be sequentially corrected according to the priority order, and the entire error detection processing is performed using the frame check sequence processing. In the transmission code according to claim 1, error detection and error correction processing is performed for each block immediately after reception, and at the time of error detection, correction is performed immediately from the error syndrome and the error pattern correction table, and as a result, all transmission is performed. Restored data is decided for each code That is, the code error correction method according to claim 1, wherein it is determined whether the normal reception state or the non-reception state is performed by the error detection process of the entire data by the frame check sequence process. 4. The received data is temporarily stored as one or a plurality of candidates by using the error pattern correction table capable of correcting all of the certain error pattern classification after reception, and a combination process is performed on these restored data. 3. The code error correction method according to claim 2, wherein the frame check sequence process is performed separately for the normal reception state and the non-reception state. 5. A normal reception state is set when there is no error in the first correction candidate in the frame check sequence processing,
When there is an error, in order to efficiently create a plurality of combinations of data having restoration data other than the first correction candidate by using the above combination processing, only one error syndrome is generated by the frame check sequence processing of these restoration data. Nested the above frame check sequence syndrome of the data part of each block code so that it is selected only once, with the pointer indicating the code word number and the order of the code word, and the error syndrome of the entire data calculated so far. If the number of the frame check sequence syndrome of the restored data is only one, the process is advanced to the next, and the frame check sequence process is performed only in other cases, but instead of performing the frame check sequence process of the entire code, Computation frame check sequence processing First specific block code for
By performing a logical sum of the frame check sequence syndromes of the restored data of the candidates, the frame check sequence processing is performed by removing the code of the specific block from the overall code, and the error syndrome excluding the code of the specific block is processed first. 1 Point to the frame check sequence syndrome of the restored data other than the candidate, and by performing an exclusive OR operation on the decoded data, the frame check sequence processing of the entire code is performed, and the error syndrome operation is performed.
5. The code error correction method according to claim 4, wherein if there is no error, it is determined that there is an error, and all combination processing is performed in order. 6. The grouped error pattern is 100% corrected, and an error different from that of the first frame check sequence process in the second frame check sequence process is applied to miscorrection for other errors. When a detection code is added and an XOR operation result = 0 for the frame check sequence error syndrome of each restored data in the normal reception state in the first frame check sequence processing is obtained, each restored data at this time A frame check sequence process is performed between a plurality of restored data that has been error-corrected from the second frame check sequence received word. If this operation result is 0, a miss error is detected in the first frame check sequence process. Claim to determine that there was no The code error correction method according to item 4 or 5.