JPH09102775A - Symbol clock reproducing method and apparatus - Google Patents

Abstract

(57) Abstract: Conventionally, a transmitting side transmits a synchronization symbol, and based on this, a symbol clock necessary for operating a receiving device is regenerated. It was necessary to provide the OFDM signal with a synchronization symbol that is not required for transmission. SOLUTION: For a sample value obtained by sampling an OFDM signal having a guard interval period by a symbol clock recovery device, an adding unit 4 for adding the sample value over one effective symbol period and an output from the adding unit. A bandpass filter 6 for extracting a symbol clock, a voltage controlled oscillator 7 for extracting a regenerated symbol clock, both the regenerated symbol clock extracted by the voltage controlled oscillator and the symbol clock extracted from the bandpass filter 6. A means for performing phase comparison between the signals and controlling the oscillation output frequency of the voltage controlled oscillator 7 based on the result of the phase comparison.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION The present invention relates to OFDM (Orthog
Onal Frequency Division Multiplexing The present invention relates to a symbol clock regenerating method for regenerating a symbol clock which is one component of a receiving apparatus in a transmission system and a symbol clock regenerating apparatus used therefor.

[0002]

2. Description of the Related Art Conventionally, in a receiving apparatus for receiving an OFDM signal, the symbol timing and the symbol clock required for demodulation are controlled by Ch. Dosch et al "First public demonst
rations of COFDM / MASCAM.A milestone for the futur
e of radio broadcasting ", EBU Review-Technical N
According to o. 232, Dec. 1988, first, on the transmitting side,
Synchronous symbols such as sweep signals are transmitted at fixed time intervals (multi-symbol period), and the receiving side generates the same signal as the signal generated and transmitted at the transmitting side in the receiving device and correlates with the received signal. , Forms a steep pulse signal. Since the formed pulse signal is generated each time a synchronization symbol is received, the symbol timing for operating the receiving apparatus, FFT (Fast), is generated based on this pulse signal.
Fourier Transform: Generates the recovered symbol clock required for windowing and demodulation.

[0003]

However, according to the above-mentioned conventional technique, it is premised that the transmitting side transmits the synchronization symbol, but the synchronization symbol does not contribute to the information transmission. Therefore, in order not to reduce the transmission efficiency, it is necessary to increase the interval between the synchronization symbols. On the other hand, however, if the interval between the synchronization symbols is large, it takes a long time to pull in the PLL (Phase Lock Loop) of the symbol clock, and the time accuracy of the generated symbol clock becomes poor.

An object of the present invention is to use OFDM at the receiving side.
The OFD that carries information without the need for synchronization symbols is used as the symbol clock required to demodulate the signal.
It is to provide a symbol clock recovery method and device that can be obtained from the M signal itself, and thereby to improve the transmission efficiency, shorten the PLL pull-in time of the symbol clock, and improve the followability of clock synchronization. And so on.

[0005]

According to the present invention, as a characteristic peculiar to an OFDM signal, an O signal having a guard interval period is provided.
In the case of an FDM signal, within one transmission symbol period (a period obtained by adding a guard interval period to an effective symbol period),
A symbol clock regenerating method configured to regenerate a symbol clock from an OFDM signal itself, which is not particularly provided with a synchronization symbol described in the prior art, by effectively utilizing the property of integrating a signal having an effective symbol period length to zero. And equipment.

That is, in the symbol clock recovery method of the present invention, for a sample value obtained by sampling an OFDM signal having a guard interval period, the sample value is added over one effective symbol period,
A step of extracting a symbol clock by passing the added result through a band pass filter, a step of performing a phase comparison between both signals of the regenerated symbol clock and the extracted symbol clock, and a voltage based on the result of the phase comparison. Each step of controlling the oscillation output frequency of the controlled oscillator and extracting the regenerated symbol clock from the output side of the voltage controlled oscillator.

Further, in the symbol clock reproducing method of the present invention, a step for obtaining an absolute value of the addition result is interposed between the adding step and the step of extracting the symbol clock by passing through the band pass filter. It is characterized by being.

Further, the symbol clock regenerating apparatus of the present invention, for the sample value obtained by sampling the OFDM signal having the guard interval period, adding means for adding the sample value over one effective symbol period, and the adding means of the adding means. A bandpass filter for extracting the symbol clock from the output, a voltage controlled oscillator for taking out the regenerated symbol lock, both the regenerated symbol lock extracted by the voltage controlled oscillator and the symbol lock extracted by the bandpass filter Means for controlling the oscillation output frequency of the voltage controlled oscillator based on the result of the phase comparison.

Further, in the symbol clock reproducing device of the present invention, an absolute value circuit for obtaining an absolute value of the output signal of the adding circuit is interposed between the adding means and the band pass filter. And

[0010]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, the present invention will be described in detail based on embodiments with reference to the accompanying drawings. Figure 1 shows OF
FIG. 3 is a diagram illustrating a signal waveform of a DM signal and that the signal waveform is formed by combining a large number of modulated waves. As shown in FIG. 1, the OFDM signal has k = 1, k =
This is a combination of a large number of digitally modulated waves composed of 2, ---, k = 20, ---, and data transmission by OFDM is performed using this symbol as a unit. Each symbol is composed of an effective symbol period t _s and a guard interval period, and the guard interval period is formed by repeating the signal waveform at the rear part of the effective symbol period.

Each carrier frequency f _{k of} OFDM (k =
1, k = 2, ---, k = 20, ---), in the baseband f _k = _k / t _s (where, k is defined by 1, 2, ---). Therefore, when the signal within one effective symbol period t _s is integrated, it becomes zero, and when the OFDM signal is sampled at the sampling period T = t _s / N (where N is the number of sample values), then N The sum of the sample values is also zero.

OFDM with guard interval period
In the case of a signal, the signal during the guard interval period is as shown in FIG.
As shown in (a), since the signal in the effective symbol period is cyclically repeated, the signal within the period including this period is integrated over the effective symbol period t _s (FIG. 2 (b )) Also becomes zero, but does not become zero when integrating over two consecutive symbol periods (FIG. 2 (c)).

From this, with respect to the sample values obtained by sampling the OFDM signal at the sampling period T, the period in which the total of N sample values becomes zero is equal to the length of the guard interval period. As a result, the OFD coming
When the addition of N consecutive sample values is successively repeated for the M signal, for example, a signal having a waveform as shown in FIG. 3 is obtained. In addition, since this signal waveform contains a frequency component that matches the symbol timing frequency, the signal obtained by addition is passed through a bandpass filter that passes this frequency component signal to obtain the symbol clock frequency component. Can be extracted.

Next, the symbol clock recovery method and apparatus of the present invention constructed on the basis of the above principle will be described. FIG. 4 is a block diagram showing one embodiment of the symbol clock recovery device of the present invention. In FIG. 4, the symbol clock recovery device according to the present invention is 2 in terms of its signal processing.
It is roughly divided into two blocks. That is, the symbol clock extraction circuit 1 and the PLL circuit 2. In the former,
The OFDM signal input to the input terminal 3 (this signal is sampled at the period T) is first repeatedly and repeatedly added by the adder circuit 4 for one effective symbol period t _s, and the signal having the waveform shown in FIG. Becomes This signal is sent to the absolute value circuit 5, and the signal on the negative side is turned back to the positive side, whereby the signal having the waveform shown in FIG. Absolute value circuit 5
The signal obtained in (1) is passed through a bandpass filter 6 that passes the symbol clock frequency component of the OFDM signal, and the symbol clock frequency component shown in FIG. 5 (b) is extracted at the output side thereof.

In the above, the adder circuit 4 for adding the input OFDM signals over one effective symbol period t _s
Is configured as shown in FIG. 6, for example. Here, FF indicated by reference numeral 11 represents a flip-flop or a 1-clock register (both function as a 1-clock delay element). The shift register 12 configured by using these delay elements shifts the input data arriving at the input terminal 3 and adds all the data in one effective symbol period by the adder 13. As described above, on the output side of the adder 13, the result of adding the input OFDM signals over one effective symbol period can be obtained.

Next, the PLL circuit 2 includes a voltage controlled oscillator 7 oscillating at a frequency (clock frequency) near M times (M is 1, 2, 3, ---) the symbol clock frequency, The oscillation output signal is sent to the frequency divider 8 and the frequency is divided by M to become a signal corresponding to the symbol clock frequency (reproduced symbol clock). This signal and the symbol clock which is the output of the symbol clock extraction circuit 1 are applied to the respective input terminals of the phase comparator 9, the phases of both signals are compared, and a signal (voltage) corresponding to the phase difference is output terminal. Is output from. The output phase difference signal is applied to the control input terminal of the voltage controlled oscillator 7 via the loop filter 10 configured by a low pass filter or the like for absorbing a sudden change.

As described above, the output signal of the frequency divider 8 in the PLL circuit 2 is locked to the symbol clock of the incoming OFDM signal, and the output signal (regenerated clock) of the voltage controlled oscillator 7 is also the incoming OFDM signal. As a result, a regenerated clock having a timing that is an accurate reference for operating the OFDM receiver is obtained.

In the embodiments of the symbol clock regenerator of the present invention described with reference to FIGS. 4 and 6, all of the circuit elements included in the figures are not necessarily required. For example, the absolute value circuit 5, the frequency divider, The device 8 and the loop filter 10 can be omitted depending on the level of circuit design.

In particular, the frequency divider 8 can be omitted by selecting the oscillation frequency of the voltage controlled oscillator 7 as the symbol clock frequency of the incoming OFDM signal. However, since the output signal of the voltage controlled oscillator can be used as the reproduction clock for OFDM demodulation by selecting the oscillation frequency of the voltage controlled oscillator to be M times the symbol clock frequency, it is desirable to use the frequency divider 8. .

[0020]

According to the present invention, in recovering a clock necessary for demodulating an OFDM signal, it is possible to obtain the information from the OFDM signal itself, which does not require a synchronization symbol as in the prior art. Therefore, it is possible to improve the transmission efficiency, shorten the PLL pull-in time when regenerating the symbol clock, expand the pull-in frequency range, and improve the followability of clock synchronization.

[Brief description of the drawings]

FIG. 1 is a diagram illustrating a signal waveform of an OFDM signal and that the signal waveform is formed by combining a large number of modulated waves.

FIG. 2 is a diagram showing a result of an OFDM signal waveform having a guard interval period over an effective symbol period length in one symbol period and in a case of integrating over two symbol periods.

FIG. 3 is a diagram showing a waveform of a signal obtained when successive N sample values are successively added to an incoming OFDM signal.

FIG. 4 is a block diagram showing an embodiment of a symbol clock recovery device of the present invention.

5 is a diagram showing signal waveforms on the output side of an absolute value circuit and a bandpass filter in the symbol clock recovery device shown in FIG. 4, respectively.

6 is a diagram showing an embodiment of an adder circuit in the symbol clock recovery device shown in FIG. 4;

[Explanation of symbols]

 1 Symbol clock extraction circuit 2 PLL circuit 3 Input terminal 4 Addition circuit 5 Absolute value circuit 6 Band pass filter 7 Voltage controlled oscillator 8 Frequency divider 9 Phase comparator 10 Loop filter 11 Flip-flop or 1-clock register 12 Shift register 13 Addition vessel

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Kazuhiko Shibuya 2-2-1 Jinnan, Shibuya-ku, Tokyo Inside the Japan Broadcasting Corporation Broadcasting Center (72) Morihiro Otsuka 2-2-1 Jinnan, Shibuya-ku, Tokyo Japan Broadcasting Corporation Broadcast Center (72) Inventor Tadaaki Tanaka 2-2-1 Jinnan, Shibuya-ku, Tokyo Japan Broadcasting Corporation Broadcast Center (72) Inventor Hiroshi Okamura 2-2-1 Shinnan, Shibuya-ku, Tokyo Within Japan Broadcasting Corporation Broadcasting Center

Claims (4)

[Claims] 1. An OFD having a guard interval period
For sample values obtained by sampling the M signal, adding the sample values over one effective symbol period, extracting a symbol clock by passing the addition result through a bandpass filter, and a recovered symbol clock And a step of performing a phase comparison between the two signals of the extracted symbol clock, controlling the oscillation output frequency of the voltage controlled oscillator based on the result of the phase comparison, and outputting the regenerated symbol clock from the output side of the voltage controlled oscillator. A method for recovering a symbol clock, which comprises each step of extracting. 2. The symbol clock recovery method according to claim 1, wherein a step of obtaining an absolute value of a result of addition between the adding step and the step of extracting the symbol clock by passing through the band pass filter. A method for recovering a symbol clock, characterized in that 3. An OFD having a guard interval period
For a sample value obtained by sampling the M signal, adding means for adding the sample value over one effective symbol period, a band pass filter for extracting a symbol clock from the output of the adding means, and for extracting a regenerated symbol lock Of the voltage-controlled oscillator, and a phase comparison is performed between the regenerated symbol lock signal extracted by the voltage-controlled oscillator and the symbol lock signal extracted from the band-pass filter, and the voltage control is performed based on the result of the phase comparison. A symbol clock recovery device comprising means for controlling an oscillation output frequency of an oscillator. 4. The symbol clock regenerator according to claim 3, wherein an absolute value circuit for determining an absolute value of the output signal of the adder circuit is interposed between the adder means and the band pass filter. A symbol clock regenerator characterized by the above.