JPH09148559A - Bilateral two-terminal thyristor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To improve stability of a bilateral two-terminal thyristor, reduce variation of characteristics with time, decrease breakover current, and improve reliability. SOLUTION: First-sixth semiconductor regions 21-26 are formed on a semiconductor substrate. The second, the third and the sixth semiconductor regions 22, 23, and 26 are formed in ring types. The fourth semiconductor region 24 is arranged being surrounded by the second semiconductor region 22. An electrode 30 is spread on the fourth semiconductor region 24 interposing an insulating film 28. The sixth semiconductor region 26 is arranged in a ring type along the outer periphery of the back of the semiconductor substrate. A bowl type protruding part 30b is formed in the central part of a PN junction 39 of the first semiconductor region 21 and the fifth semiconductor region 25a, 25b. A first part 41 of high impurities and a second part 42 of low impurities are formed on the inner periphery side of the second semiconductor region 22.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a two-way two-terminal thyristor.

[0002]

2. Description of the Related Art FIG. 1 shows a conventional bidirectional 2-terminal thyristor. This is a P-type first semiconductor region 1 and an N-type second semiconductor region.
Semiconductor region 2, a P-type third semiconductor region 3, an N-type fourth semiconductor region 4, and a P-type fifth semiconductor region 5,
First, second, third and fourth semiconductor regions 1, 2, 3, 4
A first thyristor composed of the first, second, and fourth
And a second thyristor composed of the fifth semiconductor regions 1, 2, 4, and 5 is a composite device connected in parallel.

In the two-way two-terminal thyristor shown in FIG.
When a voltage that makes the potential of the second electrode 6 higher than the potential of the second electrode 7 is applied, the PN junction 8 formed at the interface between the first semiconductor region 1 and the second semiconductor region 2 moves in the opposite direction. Be biased. Here, when this applied voltage exceeds the breakdown voltage of the PN junction 8, the breakover current triggers the thyristor and the first thyristor is turned on.

In addition, the potential of the second electrode 7 is changed to the first electrode 6
When a voltage higher than the potential of the first semiconductor region 1 and the fourth semiconductor region 4 is applied, P
N-junction 9 is biased in the reverse direction. Here, when the applied voltage exceeds the breakdown voltage of the PN junction 9, the breakover current triggers the thyristor and the second thyristor is turned on. As a result, the thyristor operates bidirectionally.

This type of two-way two-terminal thyristor may be used for an ignition device of a fan heater or the like. In such a case, it is desired that the breakover voltage of one or both of the first thyristor and the second thyristor does not change over time for a long time. In the two-way two-terminal thyristor shown in FIG. 1, it is difficult to keep the stability of the semiconductor substrate surface good for a long period of time even when highly stable phosphorus glass or the like is used for the protective films 10 and 11. . For this reason, the above demand could not be sufficiently satisfied. In addition, a thyristor with a low on-voltage is required to reduce energy loss.

In order to solve the above-mentioned drawbacks, the applicant of the present application filed Japanese Patent Application No. 5-85489 (Japanese Patent Laid-Open No. 6-27581).
No. 9) proposed a two-way two-terminal thyristor shown in FIG. This two-terminal thyristor includes a P-type first semiconductor region 21, an N-type second semiconductor region 22, and a P-type third semiconductor region 22.
Semiconductor region 23, P-type fourth semiconductor region 24, N-type fifth semiconductor region 25, P-type sixth semiconductor region 26.
And a P-type equipotential ring semiconductor region 27. Third, fourth, sixth and seventh semiconductor regions 23, 24, 2
6, 27 have an impurity concentration higher than that of the first semiconductor region 21.

The second semiconductor region 22 is exposed on one main surface of the semiconductor substrate and is formed in a plane annular shape. The third semiconductor region 23 is exposed on one main surface of the semiconductor substrate, and is formed in an annular shape inside the second semiconductor region 22. The distance between the inner edge of the second semiconductor region 22 and the inner edge of the third semiconductor region 23 is smaller than the distance between the outer edge of the second semiconductor region 22 and the outer edge of the third semiconductor region 23. The second and third semiconductor regions 22 and 23 are connected to the first electrode 30 through an opening 29 provided in an insulating protective film 28 formed on one main surface of the semiconductor substrate and electrically connected to the surface of the substrate. It is short-circuited.

The fourth semiconductor region 24 is arranged in the center of the semiconductor substrate and is surrounded by and adjacent to the second semiconductor region 22. The fourth semiconductor region 24 is exposed on the surface of the substrate, but the protective insulating film 28 is formed on the upper surface thereof and is not connected to the first electrode 30. The first electrode 30 covers the entire upper surface of the fourth semiconductor region 24 via the insulating film 28.

The fifth semiconductor region 25 is adjacent to the first semiconductor region 21 on the side opposite to the second semiconductor region 22. The fifth semiconductor region 25 is exposed on the other main surface of the substrate, and is electrically connected to the second electrode 31.

The sixth semiconductor region 26 is formed in a plane annular shape along the outer edge of the other main surface of the substrate. The sixth semiconductor region 26 is exposed on the other main surface of the substrate, is electrically connected to the second electrode 31, and is electrically short-circuited with the fifth semiconductor region 25 on the substrate surface. When viewed in a plan view, the sixth semiconductor region 26 has an annular portion along the outer edge of the second semiconductor region 22 and overlapping the second semiconductor region 22. This annular portion extends inside the opening 29.

The seventh semiconductor region 27 for the equipotential ring is formed in a plane ring shape along the outer edge of one main surface of the substrate, and the second semiconductor region 22 is formed via the first semiconductor region 21. Siege. The seventh semiconductor region 27 for this equipotential
Has the same p-type as the first semiconductor region 21, but has a higher impurity concentration than the first semiconductor region 21, and its upper surface is exposed on one main surface of the substrate and is covered with the insulating film 28. ing.

Next, the operation of this bidirectional 2-terminal thyristor will be described. The two-terminal thyristor of FIG. 2 has the first, second, third, fourth and fifth semiconductor regions 21, 2
A first thyristor composed of 2, 23, 24, and 25, and first, second, fifth, and sixth semiconductor regions 21, 2;
This is a composite element in which a second thyristor composed of 2, 25 and 26 is connected in anti-parallel.

When a voltage that makes the potential of the first electrode 30 larger than that of the second electrode 31 is applied between the first electrode 30 and the second electrode 31, the first thyristor of the first thyristor is PN junctions 33 and 34 formed at the interface between the semiconductor region 21 and the fourth semiconductor region 24 and the second semiconductor region 22.
Are biased in the reverse direction. As a result, as shown in FIG.
First and second depletion layers 35 and 36 extend from N junctions 33 and 34, respectively. The third depletion layer 37 spreads on the surface side of the fourth semiconductor region 24 due to the electric field effect of the first electrode 30. First depletion layer 35 and second depletion layer 3
Since the sixth and third depletion layers 37 extend continuously from each other, they are not strictly distinguished.

Since the fourth semiconductor region 24 has a higher impurity concentration than the first semiconductor region 21 and has almost no lateral concentration gradient, the second depletion layer 36 extending from the PN junction 34 is shown. As described above, the width of the depletion layer is narrower than that of the first depletion layer 35. Further, the fourth semiconductor region 24
Is formed by diffusion, the impurity concentration increases toward the surface side. However, since the third depletion layer 37 is formed on the surface of the fourth semiconductor region 24, the portion where the width of the second depletion layer 36 is narrowest is slightly larger than the surface of the fourth semiconductor region 24. Formed inside.

When the reverse voltage reaches the breakdown voltage, the critical electric field strength Ecrit is applied to the narrow portion of the second depletion layer 36.
(Electric field concentration point) occurs, and the breakdown is triggered by this portion.

When a breakdown occurs, the PN junction formed at the interface between the second semiconductor region 22 and the third semiconductor region 23 in the forward direction due to the voltage drop due to the current flowing laterally through the second semiconductor region 22. Biased to the first, second, third and fourth semiconductor regions 21, 22, 23, 24
Is turned on. First,
Second, fourth and fifth semiconductor regions 21, 22, 24, 2
5 also conducts, resulting in the first thyristor conducting.

When a voltage which makes the potential of the second electrode 31 higher than the potential of the first electrode 30 is applied between the first electrode 30 and the second electrode 31, the second voltage dv / dt is applied. The thyristor becomes conductive.

According to this two-terminal thyristor, the first electrode 30 is formed on the entire upper surface of the fourth semiconductor region 24 in which the second depletion layer 36 that determines the breakdown voltage is formed. Therefore, the fluctuation of the breakdown voltage due to the ions contained in the resin sealing body covering the thyristor element and the insulating film 28 is effectively prevented. Further, the first electrode 30 also functions as a protective film. For this reason, break
The bar voltage can be kept constant for a long period of time, and high reliability can be obtained. In addition, the second thyristor is arranged so as to surround the first thyristor in a ring shape, and the sixth semiconductor region 26 forming the second thyristor has the second semiconductor region 22 and the opening 29 in plan view. Overlaps with. Therefore, the current path from the second electrode 31 to the first electrode 30 is short and the on-voltage can be made relatively small.

However, the thyristor shown in FIG.
It has a drawback that the over current I _BO is relatively large (about 350 μA). This is because the current amplification factor α of the NPN transistor formed by the second semiconductor region 22, the first semiconductor region 21, and the fifth semiconductor region 25 is small.

In order to solve the above-mentioned drawbacks, the applicant of the present invention further discloses Japanese Patent Application No. 5-350147 (Japanese Patent Application Laid-Open No. 7-20).
No. 2170) proposed a bidirectional two-terminal thyristor shown in FIG. Next, the bidirectional 2-terminal thyristor of FIG. 3 will be described. However, in FIG. 3, the same parts as those in FIG. 2 are designated by the same reference numerals and the description thereof will be omitted. 3 of FIG.
The directional 2-terminal thyristor has a portion 39b in which the PN junction 39 between the first semiconductor region 21 and the fifth semiconductor region 25 projects in the direction of the fourth semiconductor region 24,
2 is different from FIG. 2 in that a conductive layer 40 forming an equipotential ring for improving stability is provided in a ring shape on the semiconductor region 27 for an equipotential ring, but otherwise the same as in FIG. Has been done. More specifically, the fifth semiconductor region 25 has the PN junction 3 parallel to the main surface of the substrate.
A PN junction 39b projecting like a bowl in the direction of the fourth semiconductor region 24 at the center of the substrate and the portion 25a forming 9a.
And a protruding portion 25b that forms In addition, bowl-shaped P
The N junction 39b is the fourth semiconductor region 24 formed in a ring shape.
Is arranged so as to coincide with the center of the sixth semiconductor region 24 and has a size facing the entire fourth semiconductor region 24, but does not deteriorate the characteristics of the second thyristor.
It is arranged inside of 6. The equipotential ring conductive layer 40 is connected to the seventh semiconductor region 27.

In the bidirectional two-terminal thyristor of FIG. 3, when forming the fifth semiconductor region 25 having the bowl-shaped PN junction 39b, first, the N-type impurities are deeply diffused from the center of the bottom surface of the substrate to form the bowl. Regions 25b are formed, and then N-type impurities are shallowly formed over the entire bottom surface of the substrate. As a result, the distribution of the N-type impurity concentration from the bottom surface of the substrate of the projecting portion 25b is gently inclined, which is fifth with respect to the P-type impurity concentration of the first semiconductor region 21 near the PN junction 39b. The N-type impurity concentration of the protruding portion 25b of the semiconductor region 25 does not change sharply. On the other hand, the N-type impurity concentration of the portion 25a forming the parallel PN junction 39a depends on the PN junction 39a.
Changes sharply near.

By providing the bowl-shaped portion 25b, the fifth semiconductor region 22 and the first semiconductor region 21 and the bowl-shaped portion 25b which are formed on the center side of the element forming the first thyristor are included. Of the semiconductor region 25 of
The base width of the N-transistor (the distance between the second semiconductor region 22 and the fifth semiconductor region 25 or the distance between the depletion layer 35 and the fifth semiconductor region 25) is reduced. As a result, this N
The current amplification factor α of the PN transistor can be increased. Further, as shown in FIG. 4, a bowl-shaped portion (central portion) 2
5b has an impurity distribution whose impurity concentration gradually increases as it moves away from the interface with the first semiconductor region 21 as compared with the peripheral portion 25a, forming a so-called graded junction with the first semiconductor region 21. To do. Therefore, under the same forward bias, the bowl-shaped portion 25b and the first semiconductor region 2
The current density at the PN junction 39b formed at the interface of No. 1 is the so-called step junction formed at the interface between the peripheral portion 25a and the first semiconductor region 21 as shown in FIG.
It becomes larger than the current density in the N junction 39a. The effect of increasing the current density and the effect of increasing the current amplification factor described above are combined to significantly reduce the breakover current I _BO .

[0023]

However, in the two-way two-terminal thyristor of FIG. 3, deterioration of the characteristics was observed at a transient on-current value much lower than the target level. It is considered that this is because current concentration occurs in the vicinity of the narrow portion of the second depletion layer 36 in the central portion of the element, causing burnout. Therefore, the present invention provides a two-way two-terminal thyristor that can reduce the breakover current while maintaining high reliability and low on-voltage at a high level, and that transient on-current withstand capability is also greatly improved. With the goal.

[0024]

The present invention for achieving the above object will be described with reference to the reference numerals of the drawings showing the embodiments. First semiconductor region 21 of the first conductivity type and semiconductor substrate A second semiconductor region 22 of a second conductivity type having an annular planar shape adjacent to the first semiconductor region 21 except for an upper surface exposed on one main surface of the semiconductor substrate; A third semiconductor region of a first conductivity type adjacent to the second semiconductor region except for an upper surface exposed on one main surface and having a ring-shaped planar shape; A fourth semiconductor region 24 which is exposed on one main surface and whose lower surface and side surfaces are surrounded by the first semiconductor region 21 and the second semiconductor region 22 respectively, The second semiconductor region 22 with respect to the region 21
A fifth semiconductor region 25 of the second conductivity type, which is adjacent to the opposite side of the semiconductor substrate and is exposed from the other main surface of the semiconductor substrate;
A sixth semiconductor region 26 of the first conductivity type, which is exposed to the other main surface of the semiconductor substrate and has an annular planar shape, and the fourth semiconductor region 24 is the first semiconductor. The impurity concentration is higher than that of the region 21, and the PN junction 39 between the first semiconductor region 21 and the fifth semiconductor region 25 is formed.
The fifth semiconductor region 25 is formed such that a region 39b facing the fourth semiconductor region 24 of the third semiconductor region 23 protrudes toward the fourth semiconductor region 24. The fourth semiconductor region 24 side, the third semiconductor region 23 of the second semiconductor region 22, and the fourth semiconductor region 23.
An insulating film 28 is formed on a portion between the semiconductor regions 24 and on the upper surface of the fourth semiconductor region 24, and the insulating film 28 is formed on the second semiconductor region 22 and the third semiconductor region 23. Is electrically connected to a first electrode 30 covering the upper surface of the first semiconductor region 25, and the fifth semiconductor region 25 and the sixth semiconductor region 26 are electrically connected to a second electrode 31. The semiconductor region 26 of No. 6 has an annular region that overlaps with the outer edge region of the second semiconductor region 22 in plan view, and the third semiconductor region 23 and the fourth semiconductor region 23 of the second semiconductor region 22. 22 between the semiconductor region 24 and
In a, a portion 42 having an impurity concentration lower than that of a region 23b between the surface region of the first semiconductor region 21 and the third semiconductor region 23 of the second semiconductor region 22.
And a two-way two-terminal thyristor. As described in claim 2, it is desirable to provide a plurality of low impurity concentration portions 42 in a ring shape. Further, as shown in claim 3, a plurality of low impurity concentration portions 42 can be radially provided.

[0025]

According to the invention of each claim, since the portion 42 having a low impurity concentration is provided, the resistance value of this portion 42 becomes high, and this portion 42 functions as a ballast resistor for alleviating current concentration. However, it is possible to prevent characteristic deterioration and improve breakdown voltage. The inventions of the respective claims have the same effects as the thyristor of FIG. That is, in the present invention, the first electrode 30 is formed on the fourth semiconductor region 24, which functions as a region that determines breakdown, with the insulating film 28 interposed therebetween. The first electrode 30 prevents the breakdown voltage from varying due to the ions of the insulating film 28 and the resin sealing body,
Reduce the breakover voltage change over time. Moreover, since the sixth semiconductor region 26 is arranged in a ring shape and the second thyristor surrounds the first thyristor in a ring shape, the ON voltage of the second thyristor becomes small. Further, the breakover current I _BO is provided by providing a projecting portion at the PN junction 39 between the first semiconductor region 21 and the fifth semiconductor region 25.
Can be reduced.

[0026]

[First Embodiment] A bidirectional two-terminal thyristor according to a first embodiment of the present invention will now be described with reference to FIGS. 6 and 7. However, in FIG. 6, parts that are substantially the same as those in FIGS. 2 and 3 are given the same reference numerals, and descriptions thereof will be omitted.
In the two-terminal thyristor of FIG. 6, as shown in FIG. 7, the second semiconductor region 22 between the inner edge of the third semiconductor region 23 and the outer edge of the fourth semiconductor region 24 has an annular shape with a relatively high impurity concentration. Has a first portion 41 and an annular second portion 42 having a relatively low impurity concentration, and the conductive layer 40 forming an equipotential ring for improving stability is provided via the insulating film 28. Although it is different from the two-terminal thyristor of FIG. 3 in that the exposed portion of the upper surface of the semiconductor substrate of the first semiconductor region 21 is entirely covered, the other configurations are the same as those of FIG.

As shown in FIG. 7, the second semiconductor region 22 is formed in an annular shape so as to surround and adjoin the fourth semiconductor region 24, as shown in FIG.
The first region 22a disposed inside the third semiconductor region 23, the second region 22b disposed outside the third semiconductor region 23, and the third region 22c disposed below the third semiconductor region 23. Have. The first area 22a and the second area 22b are
Although it is separated in plan view by the third semiconductor region, both regions are separated by the third semiconductor region below the third semiconductor region 23.
Are continuous through the area 22c. The inner edge side of the first region 22a, that is, the fourth semiconductor region 24 side faces the protruding portion 25b forming the PN junction 39b protruding in a bowl shape, but the fourth semiconductor region 24 of the first region 22a. The side most distant from, that is, the boundary between the third semiconductor region 23 and the first region 22a does not face the protruding portion 25b.

Second region 22b of second semiconductor region 22
The impurity concentration of the third region 22c is set to be substantially the same as the impurity concentration of the corresponding region of the two-terminal thyristor in FIG. On the other hand, the first region 22 a includes a first portion 41 having a relatively high impurity concentration and a second portion 42 having a relatively lower impurity concentration than the first portion 41. From the side toward the third semiconductor region 23 side alternately. 6 and 7, the first and second parts 4
The second portion 42 is shaded to distinguish 1, 42. The surface impurity concentration of each region is as follows.
The first portion 41 is 1 × 10 ¹⁷ cm ⁻³ , the second portion 42 is 1 × 10 ¹⁶ cm ⁻³ , and the second region 22b is 1 × 10 ¹⁷ cm ⁻³ .
^-3 , and the third region 22c has a size of 1 × 10 ¹⁶ cm ^-3 .

The first and second portions 41 and 42 in the first region 22a are formed simultaneously with the second and third regions 22b and 22c by a well-known selective diffusion method. That is, these regions 22a, 22b, 22c are formed in the P-type first semiconductor region 21 before the P-type third semiconductor region 23 is formed.
Is formed by selectively diffusing N-type impurities. More specifically, the surface of the region in which the first portion 41 is to be formed in the first region 22a is an opening, the surface of the region in which the second portion 42 is to be formed is covered with a mask, and the second and second regions are formed. A mask for selective diffusion is formed so that the surfaces where the regions 22b and 22c of No. 3 are to be formed are openings and the other surfaces are covered with the mask. When the N-type impurity is diffused into the P-type first semiconductor region with the mask thus provided, the N-type impurity is diffused into the region not covered with the mask and the first portion in the first region 22a is diffused. 41 and the second and third regions 22b and 22c are formed, N-type impurities are diffused in the region covered by the mask in the first region 22a due to the lateral diffusion of the impurities and the impurity concentration is low. An N-shaped second portion 42 is obtained. The width of the mask for obtaining the second portion 42 is set so that the lower side of the mask can be converted into the N type by lateral diffusion when the first portion 41 is formed by impurity diffusion through the opening. The surface impurity concentration in the first region 22a is high in the opening portion and low in the masked portion, and as shown in FIGS. 6 and 7, the first portion 41 having a high impurity concentration and the second portion having a low impurity concentration are used. And 42 are alternately formed.
The second region 22b has the same surface impurity concentration as the first portion 41. The third region 22c has a second region 22c because a P-type third semiconductor region 23 is formed in the next step.
The surface impurity concentration is lower than that of b.

This embodiment has the same effects as the thyristor shown in FIGS. 2 and 3, and also has the following effects. (1) Since the second portion 42 is a low impurity concentration region and has a high resistance value, the first region 2 of the second semiconductor region 22 is
The resistance value of 2a increases, and this high resistance region functions as a ballast resistance for alleviating the concentration of current in the narrow portion of the second depletion layer 36 and in the vicinity thereof, preventing characteristic deterioration and improving the breakdown voltage. Contribute. That is, at the very beginning of conduction of the thyristor, an ON current flows through the narrow PN junction 34, as in the thyristor of FIG. However, since the second portion 42 having a high resistance value is present in the first region 22a of the second semiconductor region 22 which is the path of this on-current, this region has a relatively small on-current (initial current during conduction). A voltage effect occurs that suppresses the flow of the on-current. As a result, while the on-current path is relatively early, P
It is possible to move to a path of the N-junction 33 toward the lower portion (main junction portion) of the third semiconductor region 23, and prevent burnout and characteristic deterioration. (2) Since the second portion 42 of low impurity is formed by lateral diffusion of the N-type impurity, this can be easily obtained. (3) Since the conductive layer 40 forming the equipotential ring is extended over the entire surface of the insulating film 28 covering the surface of the first semiconductor region 21, the surface of the first semiconductor region 21 is stabilized,
Reliability can be improved.

[0031]

[Second Embodiment] Next, a bidirectional thyristor of a second embodiment will be described with reference to FIG. However, in FIG. 8, the substantially same parts as those in FIG. 7 are designated by the same reference numerals, and the description thereof will be omitted. The thyristor shown in FIG. 8 is the second one of the first embodiment.
Instead of the first and second portions 41, 42 of the annular pattern in the first region 22a of the semiconductor region 22, the first and second portions 41, 4 of a radial pattern extending in the radial direction.
The structure is the same as that of the thyristor of the first embodiment except that 2 is provided. The first and second portions 41 and 42 of the radial pattern in FIG. 8 are also formed similarly to the first embodiment by selective diffusion of N-type impurities using the openings of the mask. The thyristor of FIG. 8 has first and second parts 41, 42.
6 is the same as the thyristor of FIG. 6 except for the difference in the pattern of FIG.

[0032]

[Modifications] The present invention is not limited to the above-described embodiment, and for example, the following modifications are possible. (1) A bowl-shaped PN junction 3 is formed by forming a recess at the center of the lower surface of a semiconductor substrate and diffusing N-type impurities in this state.
9b can be obtained. However, in this case, the impurity concentration distribution of the central bowl-shaped portion 25b of the fifth semiconductor region 25 is the same as that of the parallel portion 25a, and the graded junction as in the embodiment cannot be obtained. Therefore, it is more disadvantageous than the embodiment in terms of the effect of increasing the current density. (2) The size of the bowl-shaped portion 25b can be variously changed. However, in order to sufficiently obtain the effect of increasing the current amplification factor, the fourth semiconductor region 24 is arranged so as to coincide with the center of the fourth semiconductor region 24, and has an area of at least ¼ of the fourth semiconductor region 24 in plan view. It is desirable to form them so that they overlap. In addition, it is desirable to dispose the bowl-shaped portion 25b inside the sixth semiconductor region 26 in order not to deteriorate the characteristics of the second thyristor.

[Brief description of the drawings]

FIG. 1 is a central longitudinal sectional view showing a conventional two-way two-terminal thyristor.

FIG. 2 is a central longitudinal sectional view showing the basic structure of a conventional bidirectional two-terminal thyristor previously proposed by the applicant of the present application.

FIG. 3 is a central longitudinal sectional view showing another conventional bidirectional two-terminal thyristor proposed by the applicant of the present application.

4 is a bowl-shaped portion 25b of the fifth semiconductor region 25 of FIG.
FIG. 3 is an impurity concentration distribution diagram of a junction portion with the first semiconductor region 21.

5 is a peripheral portion 25 of the fifth semiconductor region 25 of FIG.
FIG. 6 is an impurity concentration distribution diagram of a junction portion between a and the first semiconductor region 21.

FIG. 6 is a central longitudinal sectional view showing a bidirectional two-terminal thyristor according to the first embodiment of the present invention.

7 is a plan view showing a surface of a semiconductor substrate of the thyristor of FIG.

FIG. 8 is a plan view showing a two-way two-terminal thyristor of a second embodiment similar to FIG.

[Explanation of symbols]

 21-27 1st-7th semiconductor region 28 insulating film 41 1st part of high impurity 42 2nd part of low impurity

Claims (3)

[Claims] A first semiconductor region of a first conductivity type;
1) and a second semiconductor of a second conductivity type having an annular planar shape adjacent to the first semiconductor region (21) except for an upper surface exposed on one main surface of the semiconductor substrate. A region (22) and a first conductive type of a first conductivity type having an annular planar shape adjacent to the second semiconductor region (22) except for an upper surface exposed on one main surface of the semiconductor substrate. Third semiconductor region (23)
A fourth surface whose upper surface is exposed to one main surface of the semiconductor substrate, and whose lower surface and side surfaces are respectively surrounded by the first semiconductor region (21) and the second semiconductor region (22).
And the second semiconductor region (22) is adjacent to the first semiconductor region (21) on the side opposite to the second semiconductor region (22) and is exposed from the other main surface of the semiconductor substrate. A fifth semiconductor region of the second conductivity type (25); and a sixth semiconductor region of the first conductivity type (26) exposed to the other main surface of the semiconductor substrate and having an annular planar shape. )
And the fourth semiconductor region (24) has a higher impurity concentration than the first semiconductor region (21), the first semiconductor region (21) and the fifth semiconductor region (25). The fifth semiconductor region (25) so that a region (39b) of the PN junction (39) facing the fourth semiconductor region (24) between them protrudes toward the fourth semiconductor region (24). ) Are formed, and the third semiconductor region (23) is provided with the fourth semiconductor region (24) side, and the second semiconductor region (22) is provided with the third semiconductor region (22).
Semiconductor region (23) and the fourth semiconductor region (24)
An insulating film (28) is formed on a portion between the second semiconductor region (24) and the upper surface of the fourth semiconductor region (24), and the second semiconductor region (22) and the third semiconductor region (23) The fifth semiconductor region (25) and the sixth semiconductor region (26) are electrically connected to a first electrode (30) covering an upper surface of the insulating film (28). (31), and the sixth semiconductor region (26) is electrically connected to the second semiconductor region (26) in plan view.
Of the third semiconductor region (23) of the second semiconductor region (22) and the fourth semiconductor region (24) of the second semiconductor region (22). In the region (22a) between the first and second semiconductor regions (22)
Is provided with a portion (42) having an impurity concentration lower than the impurity concentration of the region (23b) between the surface region of the semiconductor region (21) and the third semiconductor region (23). Bidirectional 2-terminal thyristor. 2. The bidirectionality according to claim 1, wherein a plurality of said low impurity concentration portions (42) are annularly provided so as to surround said fourth semiconductor region (24). 2-terminal thyristor. 3. The bidirectional two-terminal according to claim 1, wherein a plurality of the low impurity concentration portions (42) are provided radially around the fourth semiconductor region (24). Thyristor.