JPH0917828A - Circuit board - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a circuit board of GBA structure in which the high-density mounting of semiconductor elements is possible and which can be manufactured at low cost. SOLUTION: This circuit board contains, as mandatory conditions, a unit structure A2 consisting of an insulating base material 1, a conductive thin layer (conductor circuit) 2, which is made on one side 1a of the insulating base material 1, a hole 9, which is made, boring, in thickness direction, the insulating base material from the other side 1b of the insulating base material 1 to the interface 2a with the conductive thin layer 2 or to its vicinity, and a conductive material 10 which is charged at least in the base part 9a out of the hole. And, a projection 10c is made by protruding the conductive material 10 from the other side 1b of the insulating base material, and the projection 10c is made to function as a bump electrode.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a circuit board having a novel structure, and more particularly, a highly reliable conductive structure is formed between the input / output terminal portion of the entire circuit board and the conductor circuit, and moreover, it has a high structure. The present invention relates to a circuit board that enables component mounting with high density.

[0002]

2. Description of the Related Art In various electronic devices such as computers, portable communication devices, and liquid crystal panels, semiconductor element packages are mounted on a main circuit board. As this semiconductor element package, at present, a semiconductor element such as an LSI is mounted on a circuit board on which a predetermined conductor circuit pattern is formed, and lead terminals are formed in a gull wing shape from the 4 side of this semiconductor element. A structure in which the parts except the lead terminals and the lead terminals are molded with resin (QFP: Qu
Ad Flat Package) is often used.

The QFP is mounted on the main circuit board by a method in which gull wing-shaped lead terminals are collectively reflow-soldered and connected to the main circuit board as input / output lead terminals of the main circuit board. It is being appreciated. By the way, recently, electronic devices have become smaller and faster,
The demand for multi-functionalization is increasing, and along with this, QFP
It is necessary to further reduce the size of the device and to increase the number of input / output lead terminals of the mounted QFP (increasing the number of pins). For that purpose, the pitch between the lead terminals must be narrowed.

However, if the pitch between the lead terminals is too narrow, the lead terminals adjacent to each other may be electrically connected by the solder flowing to the side during batch reflow soldering, resulting in a defective product. . In order to solve such a problem and realize a multi-pin mounting component, a semiconductor element package having a BGA (Ball Grid Array) structure has recently attracted attention.

An example of the basic structure of this BGA structure will be described with reference to FIG. 63 showing a state of single-sided mounting. In FIG. 63, a conductor circuit 2 wired in a predetermined plane pattern is formed on the upper surface 1a of the insulating base material 1. And the upper surface 1
A predetermined semiconductor element 4 is mounted on a through a die bonding paste 3, and the semiconductor element 4 is electrically connected to the conductor circuit 2 by a bonding wire 5 such as a gold wire.

From the upper surface 1a to the lower surface 1b of the insulating base material 1, through holes 6 are formed as through holes by, for example, drilling, and electroless plating and electrolytic plating are sequentially performed on the wall surface of the insulating base material 1 to form conductive plating. Layer 7 has been formed. Then, on the upper surface 1a of the insulating base material 1, the plating layer 7 is connected to the above-described conductor circuit 2 via the upper through-hole land portion 7a forming a part of the conductor circuit, and
The lower through hole land portion 7b is formed as a pad on the lower surface 1b, and a solder ball is attached as a bump electrode 8 thereto. The portion on which the semiconductor element 4 is mounted is resin-molded and has a sealing structure as a whole.

When manufacturing the above BGA structure,
First, usually, for example, a conductor circuit 2 and lands 7a and 7b are formed on a copper foil surface of a single-sided copper-clad laminate or a double-sided copper-clad laminate by applying a conventional photolithography and etching technique, and then, at predetermined positions. A through hole 6 is bored and a plating layer 7 is formed there. Then, the lower through hole land portion 7
The solder balls are placed one by one on b to perform reflow processing, or the lower surface 1b is screen-printed with a solder paste and then subjected to reflow processing. Land 7b
The bump electrode 8 is formed on the.

[0008]

By the way, in the case of manufacturing the component mounting circuit board having the BGA structure shown in FIG. 63, particularly when attaching a bump electrode or performing wire bonding to the bump electrode, for example, , The following problems occur. That is, in forming the bump electrodes, it is necessary for an operator to place one solder ball on each land portion 7b formed in an array on the lower surface 1b, which makes the work complicated. As a result, the cost is increased, and the pitch between the land portions 7b cannot be made so narrow that there is a problem in that the number of pins is increased.

Further, when the bump electrodes are formed by screen-printing the solder paste, for example, if the pitch between the electrodes is narrower than 0.8 mm, it becomes difficult to uniformly print the required amount of solder. At the time of reflow, it becomes difficult to form a desired bump electrode with a high yield. Furthermore, when manufacturing the circuit board having the BGA structure described above, as described above, a single-sided copper-clad laminate or a double-sided copper-clad laminate having a structure in which a copper foil is attached to an insulating substrate is used as a substrate. There is. Therefore, the adhesive strength between the formed upper through-hole land portion 7a or lower through-hole land portion (pad portion) 7b and the insulating base material 1 is the adhesive strength of the copper foil to the insulating base material when the copper foil is adhered. It is not so big because it relies solely on

Therefore, when the bump electrode 8 attached to the pad portion 7b is subjected to, for example, wire bonding, the adhesion strength between the insulating base material and the pad portion due to various external forces such as thermal fatigue and external vibration or shock. May decrease and the pad portion 7b may be separated from the insulating base material 1 and the bump electrode 8 may be separated, resulting in a decrease in yield.

An object of the present invention is to solve the above-mentioned problems in a circuit board having a BGA structure and to provide a circuit board having a novel structure capable of forming highly reliable bump electrodes with high density.

[0012]

In order to achieve the above object, in the present invention, an insulating base material, a conductive thin layer formed on one surface of the insulating base material, and an insulating base material A hole formed by boring the insulating base material in the thickness direction from the other surface to the interface with the conductive thin layer or in the vicinity thereof, and a conductive material filled in at least the base of the hole. Provided is a circuit board characterized by essentially including a unit structure, in particular, a conductive circuit in which the conductive thin layer in the unit structure is formed in a predetermined plane pattern, the conductive material is A circuit board is provided which protrudes from the other surface of the insulating base material and can function as a bump electrode.

Also, there is provided a multi-layer circuit board, characterized in that two or more unit structures are integrally laminated. Furthermore, there is provided a circuit board in which the hole is expanded to the other surface of the insulating base material, and the circuit board and the holes arranged on the other surface thereof are provided. A circuit board, which is formed by joining a circuit board having terminals arranged in the same pattern as the pattern, and the terminals and the conductive material filled in the holes are electrically connected. Will be provided.

In the above-mentioned unit structure of the circuit board of the present invention, a conductive thin layer, in particular, a conductor circuit having a predetermined pattern is formed on one surface of the insulating base material, and the conductive thin layer and the insulating base material form the interface. A hole having a predetermined diameter is formed on the other surface of the insulating base material, and the hole is filled with a conductive material. Therefore, in the hole, one end of the conductive material forms an integrated conductive structure in contact with the conductive thin layer, and the other end is exposed on the other surface of the insulating base material. is there.

Therefore, if the conductive thin layer is a conductive circuit formed in a predetermined circuit pattern and the other end of this conductive material is projected from the hole, that part can function as a bump electrode, As a result, a circuit board that exhibits a predetermined function can be obtained. In this structure, the conductive material is filled in the hole in an integrated state with the conductive thin layer, and even if the end of the conductive material projects from the hole, the projecting portion is the machine of the conductive material. Since the mechanical strength itself is secured, for example, even if a relatively large mechanical external force is applied to this, the situation where the protrusion (bump electrode) falls off does not occur.

Further, since the conductive structure is formed in the hole in a state of being filled with a conductive material, the current flowing through the hole is different from that of the conventional conductive structure in which a thin plating layer is formed on the wall surface of the through hole. The capacity will be extremely large. Conversely, in order to secure the current capacity necessary to operate the circuit board, it is possible to reduce the diameter of the hole as compared with the case of the conventional through hole structure. This makes it possible to increase the distribution density of the bump electrodes that can be formed on the surface of the circuit board, which in turn enables high-density mounting of semiconductor elements.

Further, in the case of the circuit board of the present invention, it is not necessary to form the through hole and the land portion penetrating the conductor circuit in the conductor circuit, so that the plane pattern of the conductor circuit can be made fine. As a result, high density mounting of semiconductor elements becomes possible.

[0018]

BEST MODE FOR CARRYING OUT THE INVENTION

Example 1 A basic structure of a unit structure that functions as an essential element in a circuit board of the present invention will be described below with reference to the drawings by taking a case where a conductive thin layer is a conductor circuit formed in a predetermined circuit pattern as an example. And will be described in detail.

The unit structure itself can function as an independent circuit board, and can also be a multi-layer circuit board as in the case of the embodiments described later, and when assembling various devices. Can also function as an element of. FIG. 1 shows a unit structure A in which the end portion of the conductive material does not largely protrude from the surface 1b of the insulating base material.
FIG. 2 is a cross-sectional view showing ₁ and FIG. 2 is a cross-sectional view showing a unit structure A _{2 in} which an end portion of a conductive material is projected and can function as a bump electrode.

In the unit structures A ₁ and A ₂ shown in FIGS. 1 and 2, the conductor circuit 2 formed in a predetermined plane pattern is formed on one surface (upper surface in the drawing) 1a of the insulating base material 1. Has been done. Below the conductor circuit 2, there is formed a hole 9 penetrating the insulating base material 1 in the thickness direction from the upper surface 1a of the insulating base material to the other surface (lower surface in the figure) 1b. The portion of the hole 9 on the conductor circuit 2 side, that is, the base portion 9a of the hole 9 is directly connected to the lower surface of the conductor circuit 2, that is, the interface 2a with the upper surface 1a of the insulating base material, and that portion is closed by the conductor circuit 2. And the other surface 1b of the insulating base material of the hole 9
The side portion, that is, the opening 9b of the hole 9 is open to the lower surface 1b of the insulating base material.

The hole 9 is filled with a conductive material 10 which will be described later. Therefore, at the base portion 9a of the hole 9, one end portion 10a (upper end portion in the figure) of the conductive material 10 is integrated in contact with the interface 2a of the conductor circuit 2, and the other end portion (lower end in the figure). End portion 10b has a hole 9
The lower surface 1b of the insulating base material 1 is exposed through the opening 9b.

In the case of the unit structure A ₁ , the case where the conductive material 10 is filled so that the end portion 10b of the conductive material constitutes a surface that is substantially the same as the lower surface 1b of the insulating base material or a surface that slightly protrudes. In the case of the unit structure A ₂ shown in FIG. 2, the lower end portion 10b of the conductive material projects from the lower surface 1b of the insulating base material 1 to form the protruding portion 10c.

Further, as shown in FIG. 3, the end portion 10b of the filled conductive material 10 is the other surface 1b of the insulating base material 1.
It may be the unit structure A ₃ which is in a more depressed state. In the case of the unit structure A ₂ described above, the protrusion 10
c can function as a bump electrode for the conductor circuit 2.

Therefore, the unit structure A ₂ can function as an element of the following device. For example, as shown in FIG. 4, the conductor circuit 2 having a predetermined pattern is formed on one surface 1a of the insulating base material 1, and the protrusions 10c arranged in an array in a predetermined pattern are formed on the other surface 1b. It is formed as a bump electrode, and a semiconductor element (IC chip or IC module) 4 is mounted on the other surface 1b via, for example, a die bonding paste 3, and the semiconductor element 4 and the protrusion (bump electrode) 10c are bonded. A component mounting circuit board can be obtained by connecting the wires 5.

Further, as shown in FIG. 5, the protrusions 10c arranged in an array with a predetermined pattern are subjected to, for example, solder plating to form solder bump electrodes, and the semiconductor elements 4 are mounted on the solder bump electrodes. By performing the reflow process, the semiconductor element 4 can be used as a circuit board for mounting by the COB method. Furthermore,
As shown in FIG. 6, a flexible insulating film is used as the insulating base material 1, and the protrusions 10c are formed so as to be arranged in an array structure in a predetermined pattern. By making contact with the conductor circuits and terminals formed on the board, it is possible to function as an inspection probe for inspecting the connection state of those circuits.

The conductive material 10 is made of a material having good conductivity and suitable hardness such as copper.
If the surface of the protrusion is made to have a high hardness and excellent corrosion resistance by, for example, nickel plating or gold plating on the surface of c, use it as a connector terminal or a contact probe of a disconnection tester. You can also Further, as shown in FIG. 7, a conductor circuit 2A forming a signal circuit and a conductor circuit 2B forming a power supply circuit are formed on one surface 1a of an insulating substrate such as a polyimide film, and the other surface is formed. Protrusions 10c and 10c connected to the conductor circuits 2A and 2B are arranged in 1b in an array structure, and the surfaces of the protrusions are covered with a material having a high melting point and excellent corrosion resistance such as tungsten, When a high voltage can be applied between the adjacent protrusions 10c, 10c, the unit structure 1 can function as a long-life thermal printer head.

These unit structures can be manufactured as follows. One example is as shown in FIG.
The case where the material B _{1 in} which the metal foil 2 ₁ is laminated and integrated on _one surface of the insulating base material 1 is used will be described. In the material B ₁ of FIG. 8, the insulating base material 1 is made of a flexible resin such as polyimide, polyester, polysulfone, polyparabanic acid, fluororesin, phenolic resin, acrylic resin, or epoxy resin. Film is used. Usually, it is preferable to use a film having a thickness of about 12.5 to 200 μm.

A sheet of a composite material obtained by impregnating a resin such as an epoxy resin into a woven or non-woven fabric of inorganic fibers such as glass fibers or a woven or non-woven fabric of organic fibers such as natural fibers or synthetic fibers. Can also be used. The type of the metal layer 2 ₁ laminated on the surface of the insulating base material 1 is not particularly limited, but for example, a layer of a metal simple substance such as copper, aluminum, nickel, iron, titanium, molybdenum, or tungsten; Layers of alloys, such as stainless steel, nichrome, nickel-based alloys such as Inconel (trade name). In that case, the thickness is 0.1-1
It is preferably about 50 μm.

This material B ₁ is a film or sheet of the above-mentioned insulating base material, and a foil made of the above-mentioned metal or alloy, for example, an acrylic resin-based, epoxy resin-based, polyimide-based or polyester-based adhesive or hot-melt adhesive. It can be manufactured by bonding with the adhesive of. Alternatively, they can be manufactured simply by thermocompression bonding. Furthermore, a combination of electroless plating and electrolytic plating, a vapor deposition method, a sputtering method, or the like may be applied to form a metal or alloy layer having a desired thickness on the surface of the insulating base material. In addition, by a molding method, a predetermined resin may be injected into the mold while the metal or alloy foil is placed in the mold for manufacturing.

First, the metal layer 2 of the material B ₁ shown in FIG.
_As shown in FIG. 9, a portion corresponding to a conductor circuit is formed by covering a portion of the conductor circuit to be formed, patterning the resist 11a with a predetermined pattern, and then performing an etching process using a predetermined etchant. the metal layer 2 ₁ outside is removed by etching, to further remove the resist 11a.

As a result, as shown in FIG. 10, the conductor circuit 2 is formed on the one surface 1a of the insulating substrate 1 in a predetermined plane pattern. Then, as shown in FIG. 11, a protrusion (bump electrode) to be formed on the surface of the other surface 1b of the insulating substrate 1 other than the portion corresponding to the hole to be formed.
After patterning the resist 11b with a pattern corresponding to the plane pattern of the array structure, the etching process is performed.

Regarding the etching treatment, for example, a wet etching method, a plasma etching method, or a laser etching method can be adopted. In that case,
The patterning pattern of the resist 11b changes depending on each method. For example, when the wet etching method or the plasma etching method is adopted, it is necessary to cover the entire surface of the insulating base material 1 with the resist 11b except for the portions corresponding to the conductor circuits 2 and the holes to be formed. This is because if such patterning is not performed, the portions other than the portions that intersect the holes to be formed will be removed by etching. In addition, when the laser etching method is adopted, as shown in FIG.
The patterning mode as shown in 1 may be used.
This is because the laser irradiates the surface 1b of the insulating base material vertically from above.

By this etching treatment, as shown in FIG. 12, the portion other than the portion where the resist 11b is patterned is removed by etching from the surface 1b of the insulating base material 1 in the thickness direction of the insulating base material 1, Holes 9 are formed there. The etching depth is the interface 2 of the conductor circuit.
The etching of the insulating base material 1 is stopped at the time point when the process proceeds to a.

Therefore, the hole 9 formed through the insulating base material 1 in the thickness direction has an opening 9b on the surface 1b side of the insulating base material 1 and on the conductor circuit 2 side. ,
That is, the base portion 9a is in a state of being directly connected to the interface 2a of the conductor circuit, and that portion is a hole blocked by the conductor circuit 2. In the etching process,
As described above, the insulating substrate 1 up to the interface 2a of the conductor circuit 2
Without removing all of the
The insulating base material 1 may be left as much as the thickness of about 3 μm. This is advantageous in transferring the conductive material filled in the holes 9 to another circuit board, as will be described later.

When the wet etching method is adopted when forming the holes 9, the etchant used is the material B ₁ shown in FIG.
In the above, it also differs depending on the type of the insulating base material ₁ and the laminated mode of the insulating base material 1 and the metal layer 2 ₁ . For example, when the insulating substrate 1 is composed of one or a plurality of laminated polyimide films, the etchant can be formed by a single system containing only a strong alkaline solution such as a potassium hydroxide solution.

However, in the material B ₁ shown in FIG.
When the insulating base material 1 and the metal layer 2 ₁ are adhered to each other with, for example, an epoxy resin adhesive, an etchant effective for the insulating base material 1 (for example, a hydroxide having a concentration of 10 N or more) is first prepared during the etching process. The holes of the insulating base material 1 are removed by etching using an aqueous sodium solution or an aqueous potassium hydroxide solution, and then bonded with an etchant effective for the epoxy resin adhesive (for example, sulfuric acid having a concentration of 18 N or more). It is necessary to remove the agent layer by etching, and management of the etchant in the etching process becomes complicated.

Thus, considering the process control in the etching process, as the material to be used, the insulating base material 1 is composed of a single resin, and the metal layer 2 ₁ is formed without using an adhesive. preferably has a layered structure that is, in particular, the insulating substrate 1 is composed of a polyimide film, a metal layer 2 ₁ is deposition on the surface, the sputtering method,
A foil formed by a thermocompression bonding method or the like is preferable.

Examples of the material B ₁ include Espanex (trade name, manufactured by Nippon Steel Chemical Co., Ltd.), Piralux AP (trade name, manufactured by DuPont Co., Ltd.), Etcher Flex and Neoflex (all of which are available). Product name, manufactured by Mitsui Toatsu Chemicals, Inc., Sumilite TECA-1 series (product name, manufactured by Sumitomo Bakelite Co., Ltd.), Chisso Flex (product name, manufactured by Chisso Co., Ltd.), Novaclad (product name, Sherdar) A polyimide-based non-adhesive copper-clad laminate such as that manufactured by Co., Ltd. can be mentioned as a preferable example.

When the plasma etching method is adopted, the material patterned with the resist 11b is set in a usual plasma reactor, and holes are formed by plasma of oxygen, nitrogen, argon, hydrogen fluoride or a mixed gas thereof. It suffices to etch the insulating base material in the proper place. Since this method can directly decompose and remove the resin,
For example, even when the material B ₁ has a structure in which an insulating base material and a metal layer are laminated via an adhesive, the insulating base material and the adhesive can be decomposed and removed at the same time, which is preferable.

When the laser etching method is adopted, as the laser, for example, an excimer laser or an impact type carbon dioxide gas laser can be used. The hole formed by this laser etching method has a smooth wall surface,
Moreover, the shape of the formed hole becomes sharp. In the case of this laser etching method, the diameter of the laser beam is narrowed down finely, and the laser beam is directly irradiated to the target hole formation location to control the irradiation area, thereby resisting the insulating base material. It is also possible to form the target hole without patterning 11b.

The planar shape of the hole 9 formed by these etching methods is not particularly limited, and may be, for example, a circular shape, or a polygonal shape such as a quadrangle or a hexagon. Among the holes of these shapes, polygonal holes are preferable because the conductive material can be firmly secured in the holes when the conductive material is filled in the holes, as described later.

As shown in FIG. 11, the hole having such a planar shape is formed on the surface 1b of the insulating substrate 1 with the resist 11b.
It can be formed by patterning a portion of the resist which is not patterned into a plane shape of the hole as described above and performing an etching process. Further, in each of the above-described etching methods, the wall surface shape of the hole 9 formed in the insulating base material 1 can be variously changed by changing the etching conditions or combining the etching methods.

For example, in the case of the wet etching method or the plasma etching method, the hole having the wall surface shape as shown in FIGS. 13 and 14 can be formed. The hole 9 shown in FIG. 13 is wider on the surface 1b of the insulating base material 1, and the shape of the wall surface is from the interface 2a of the conductor circuit 2 to the surface 1 of the insulating base material 1.
This is a case where a taper surface having an angle θ is formed up to b. This angle θ changes depending on the etching conditions. For example, in the case of the wet etching method, when the etchant concentration is high or the etching time is long, the angle θ
Is smaller, on the contrary, the concentration of the etchant is low,
Further, when the etching time is short, the angle θ becomes large.

In the case of the plasma etching method,
For example, the angle θ can be changed by appropriately changing the mixing ratio of plasma gas, the flow rate, the processing temperature, and the like. The wall-shaped hole 9 shown in FIG. 14 is a hole 9 whose center bulges like a vial, and can be formed when the spray pressure of the etchant is increased in the wet etching method, for example. In the plasma etching method, for example, C is used as the plasma gas.
When F ₄ and O ₂ are used, they can be formed when the CF ₄ / O ₂ ratio is high and the etching temperature is high.

Also in the laser etching method, the wall-shaped hole 9 as shown in FIG. 13 can be formed depending on the condition setting. In the case of the wall-shaped hole 9 shown in FIG. 13, the angle θ is 25 in the wet etching method.
It is in the range of 55 ° to 55 ° and is 2 in the plasma etching method.
It is in the range of 0 ° to 40 °, and in the laser etching method, 2 ° to 10 ° when an excimer laser is used, and 10 ° to 25 when an impact type carbon dioxide gas laser is used.
It is usually set to °.

Furthermore, by combining these etching methods and conditions, as shown in FIG. 15 and FIG. 16, a straight wall surface is formed at the height from the interface 2a of the conductor circuit 2, and then the insulating substrate 1 is formed. It is also possible to form a hole 9 having a wall surface shape (FIG. 15) forming a taper wall surface with an angle θ or a wall surface shape (FIG. 16) forming a curved wall wall expanding upwards up to the surface 1b.

Further, as shown in FIG. 17, the conductor circuit 2
It is also possible to form a wall-shaped hole 9 that forms a curved wall surface that immediately expands from the interface 2a to the surface 1b of the insulating base material 1. After the holes 9 are formed in the insulating base material 1 in this manner, the holes 9 are filled with a conductive material.

As a method of filling the conductive material, an electrolytic plating method is applied. For example, as shown in FIG. 18, the hole 9 is formed by masking the insoluble electrode 13 such as a titanium electrode and the conductor circuit 2 with the resist 11c in the plating bath 12 of the conductive material to be filled in the hole 9. The insoluble electrode 1 is immersed in a substrate that has been immersed and is subjected to predetermined plating conditions.
Electroplating is performed with 3 as a positive electrode and the conductor circuit 2 of the substrate as a negative electrode, and then the resist 11c is removed.

In the above electroplating, it is premised that the conductor circuits 2 are all in the conductive state. Therefore, in this case, if one end of the conductor circuit 2 is connected to the negative electrode, the conductive material can be electrodeposited on the interfaces 2b of the conductor circuit in all the holes 9. The filling of the conductive material in the case where all of the conductor circuits 2 are not conductive and some of them are independent conductor circuits will be described later.

In the process of electrolytic plating, as shown in FIG. 19, a predetermined conductive material 10 is electrodeposited on the interface 2a of the conductor circuit 2, and the holes 9 are filled with the conductive material 10. To go. At this time, the filling amount of the conductive material 10 into the holes 9 can be controlled by adjusting the plating time. For example, the filling amount of the conductive material 10 may be the surface 1b of the insulating base material 1.
If controlled up to, the unit structure A ₁ as shown in FIG.
If the plating time is further extended and electrolytic plating is continued, the unit structure A as shown in FIG. 2 can be obtained.
You can get ₂ .

By shortening the plating time so that the filling amount does not reach the surface 1b of the insulating base material 1, the unit structure A ₃ as shown in FIG. 3 can be obtained. In this way, one end of the conductive material 10 filled in the hole 9 is in close contact with the interface 2a of the conductive circuit 2 at the base 9a of the hole 9 with a predetermined plating strength, and the whole is of a predetermined size. Since it is surrounded by the wall surface of the hole 9 having a depth, the conductive material does not fall off from the hole 9 even if a slight external force is applied to the protrusion.

Before performing the electroplating, if a thin conductive layer of, for example, copper is formed on the wall surface of the hole 9 by a conventional electroless plating, a conductive material is also applied to the conductive layer in the electrolytic plating step. Therefore, the filled conductive material 10 is more firmly secured in the holes 9. As the conductive material 10 to be filled, any material can be used as long as it can be formed by electrolytic plating. For example, a single metal such as copper, tin, nickel, gold, tungsten, aluminum or silver, or solder, Alloys such as Nichrome and Inconel can be mentioned.

The conductive material 10 filled in the holes 9 may be composed of only one kind of material, but by changing the plating bath, a plurality of kinds of conductive materials are laminated in layers in the holes 9. It may be configured. In addition, when the conductive material 10 is solder, for example, the holes 9
It is also possible to screen-print the solder paste in the opening 9b of the above and then perform reflow processing to fill the hole,
When the opening 9b of the hole 9 has a relatively large diameter,
It is also possible to fill the holes with solder paste with a dispenser.

In this electrolytic plating step, the shape of the projection 10c in the unit structure A ₂ shown in FIG. 2 is shown by, for example, FIGS. 20 to 22 by changing the opening of the hole 9 and the conditions of electrolytic plating. It can be changed as Further, as shown in FIGS. 23 to 25, the surfaces of these protrusions 10c shown in FIGS. 20 to 22 are further electroplated with, for example, nickel, gold, solder or the like, and the surfaces are subjected to other plating. It can also be covered with layer 14. In addition,
At this time, a plurality of plating layers may be formed.

Further, a solder plating layer having a predetermined thickness is formed on the surface of the protrusion 10c, and then the whole is subjected to a reflow treatment, so that as shown in FIG.
It is possible to form a BGA structure by forming a bump electrode composed of a solder ball 15 on 0. If solder is used as the conductive material 10 to fill the holes 9 and the projections 10c are formed during electrolytic plating, and then reflow treatment is performed on the whole,
As shown in FIG. 27, on the surface 1b of the insulating base material 1, the conductive structure with the conductor circuit 2 is entirely made of solder BG.
An A structure can be formed.

After the unit structure A ₂ shown in FIG. 2 is manufactured, the surface 1b of the insulating base material 1 is removed by a desired thickness to reduce the thickness of the insulating base material 1. 27
The bump electrode can be formed in a state in which the protruding portion as shown in FIG. For example, in the case of the unit structure having the protrusion shown in FIG. 27, a part of the surface 1b of the insulating base material 1 is removed by etching by applying a wet etching method or a plasma etching method. As a result, as shown in FIG. 28, the new surface 1 of the insulating substrate 1 is
From b ′, a part of the conductive material that had been buried in the hole 9 until then is exposed, and the protrusion has a mushroom shape higher than before, so that the bump is bumped from the surface 1b ′ of the insulating substrate 1. It projects as an electrode.

At this time, if the above-mentioned etching treatment is performed by masking a portion other than the vicinity of the protrusion of the conductive material 10,
Only the height of the bump electrode can be increased near the bump electrode. Further, instead of the method of etching the surface 1b of the insulating base material 1, as the insulating base material 1, for example, a peelable resin coating film is previously formed on the surface to be removed by etching, or The height of the bump electrode can also be adjusted by forming a protrusion using a dry film for resist or plating resist, and then peeling off the resin coating film or dry film. Can be higher.

Further, as shown in FIG. 29, the surface of the bump electrode further protruding as described above can be covered with a plating layer 16 made of an appropriate material. When the insulating base material 1 is, for example, a glass fiber-epoxy resin laminated plate or a ceramic plate used as an insulating plate of a normal circuit board, holes may be formed by the above-described etching method. Have difficulty.

In this case, as shown in FIG. 30, the insulating base material 1'is normally drilled to penetrate from the upper surface 1b 'to the lower surface 1a' of the insulating base material 1 ', and , Patterned holes 9 are formed in a desired array arrangement. Then, for example, a copper foil is thermocompression-bonded and laminated on the lower surface 1a ′ of the insulating base material 1, and then the copper foil is
Applying the photolithography and etching technology,
The conductor circuit 2 having a predetermined pattern as shown by 1 is formed. After that, the holes 9 may be filled with a conductive material and the bump electrodes may be formed in the same manner as described above.

In this case, since the holes 9 are formed by drilling, the diameter thereof becomes relatively large, and the distribution density of the bump electrodes becomes coarser than in the case of forming holes by the above-mentioned etching method. Example 2 In Example 1, the unit structure of the present invention and the method for manufacturing the same were described for the case where the material B _{1 in} which the metal layer 2 ₁ is laminated on _one surface of the insulating substrate 1 was used. Insulating base material 1
A case where metal layers are laminated on both surfaces of will be described with reference to the drawings.

First, as shown in FIG. 32, the insulating substrate 1
A material B ₂ having a metal layer 2 ₁ laminated on one surface ₁ b and a metal layer 2 ₂ laminated on the other surface 1 a is prepared. The problems regarding the types of the insulating base material 1, the metal layers 2 ₁ and 2 ₂ and the laminated structure thereof are as described in the first embodiment. The types of the metal layer 2 ₁ and the metal layer 2 ₂ may be the same or different.

Examples of the material B ₂ include Nikaflex (trade name, manufactured by Nikkan Industry Co., Ltd.), Pyralux (trade name, manufactured by DuPont Co., Ltd.), Espanex (trade name, Nippon Steel Chemical ( Commercially available double-sided copper clad laminates such as Neoflex (trade name, manufactured by Mitsui Toatsu Chemicals, Inc.). By applying photolithography and etching technology to the metal layer 2 ₁ of the material B ₂ shown in FIG. 32, as shown in FIG. 33, except the portion 9 ′ corresponding to the hole to be formed in the insulating base material 1. The resist 11d having a plane pattern that covers the area is patterned. In this case, as same in the metal layer 2 _2, patterning the resist 11d 'plane pattern covering the portion of the conductor circuit to be formed.

Then, for example, a wet etching method is applied to the whole to etch the metal layers 2 ₁ and 2 ₂ , and then the resists 11d and 11d ′ are removed. As a result, as shown in FIG. 34, the conductor circuit 2 having a predetermined pattern is formed on the surface 1a of the insulating base material 1, and only the portion 9 "of the hole to be formed is etched and removed on the surface 1b. Thus, the metal layer 2 ₁ remains.

Then, at the place 9 "of the hole to be formed,
The etching process as described in Example 1 is performed. As a result, as shown in FIG. 35, a hole 9 is formed in the insulating base material 1 from one surface 1b thereof to the interface 2a of the conductor circuit 2. Then, by applying the photolithography and the etching technique to the metal layer 2 ₁ , as shown in FIG. 36, the desired circuit pattern 2 ₃ is formed on the surface 1 b of the insulating base material 1. When the circuit pattern 2 ₃ is not necessary, the metal layer 2 ₁ is entirely removed by etching to expose the surface 1b of the insulating base material 1.

After that, as in the case of the first embodiment, the bump electrode is formed by filling the hole 9 with the conductive material and projecting the end portion (the upper end portion in the figure) of the conductive material. As a result, the unit structure A ₄ as shown in FIG.
That is, one surface 1a of the insulating base 1 conductor circuit 2 having a predetermined pattern is formed, also on the other surface has a predetermined circuit pattern 2 _3, and is arranged in a predetermined array structure projections A unit structure A _{4 of} double-sided wiring having a portion (bump electrode) 10c is obtained.

In the second embodiment, the case where the conductor circuit 2 is formed at the same time by etching the metal layers 2 ₁ and 2 ₂ of the material B ₂ has been described. In this conductor circuit 2, the conductive material 10 is provided in the hole 9. It may be formed after filling. In addition, FIG.
In the unit structure A ₄ shown in FIG. 3, the protrusion (bump electrode) 10c is mechanically polished, for example, as shown in FIG.
As shown in FIG. 8, the surface of the conductive material 10 and the circuit pattern 2
It is possible to manufacture a double-sided circuit board A _{5 in} which the _three sides form the same plane.

Example 3 FIG. 39 is a sectional view showing an example of a multilayer (three-layer) circuit board A ₆ manufactured by combining the unit structures A ₁ and A ₂ of the present invention. In the figure, in the multilayer circuit board A ₆ , the end portion of the conductive material 10 is the surface 1 of the insulating base material 1.
On the unit structure A ₁ that forms the same plane as b, another unit structure A ₁ is formed by the conductor circuit 2 and the conductive material 10.
Are laminated so that they are in contact with each other, and the unit structure A
₂ has a structure in which the conductor circuit 2 is laminated so that the conductor circuit 2 is in contact with the conductive material 10 of the unit structure A ₁ located immediately below the conductor circuit 2.

Therefore, the protrusion (bump electrode) 10c
Are connected to the conductor circuits of each unit structure. In the case of manufacturing this multilayer circuit board A ₆ , the unit structures A ₁ and A ₂ are manufactured based on the intended design criteria, and they are laminated as shown in FIG. 39 and, for example, thermocompression bonded. It should be integrated.

Further, by using the unit structure of the present invention, the multilayer circuit board A ₆ shown in FIG. 39 can be manufactured as follows. First, a double-sided circuit board A ₅ having the structure shown in FIG. 38 is manufactured, and the entire surface of the circuit pattern 2 ₃ is covered with an insulating layer 1A having a predetermined thickness (FIG. 4).
0). The insulating layer 1A is, for example, a Pyrax PC.
(Trade name, Du Pont Co., Ltd.) or a plurality lamination on the circuit pattern 2 ₃ a dry film, such as, or, NPR-5, NPR-8 , NPR-200
It can be formed by coating or screen-printing a liquid insulating material such as (both are trade names, manufactured by Nippon Polytech Co., Ltd.) on the circuit pattern 2 ₃ .

It is preferable to use a photosensitive insulating material because it is easy to perform a hole forming operation as a post process. Then, by applying photolithography and etching techniques to the insulating layer 1A, holes 9 are formed in the portions to be filled with the conductive material (FIG. 41). Then, after filling the hole 9 with the conductive material 10 by the method described above, electroless plating is performed on the surface of the insulating layer 1A, and then electrolytic plating is further performed, so that the surface of the insulating layer 1A having a predetermined thickness is formed. The conductive layer 17a is laminated (FIG. 42).

The formation of the conductive layer 17a is not limited to the above-mentioned plating method, but can be formed by, for example, a vapor deposition method or a sputtering method. The conductive layer 1
When 7a is formed by lamination of a conductive foil, the following method is used. First, a double-sided circuit board A ₅ having the structure shown in FIG. 38 is manufactured, and its circuit pattern 2 ₃
A conductive foil 17d is attached to the above using a sheet-shaped adhesive 1D (FIG. 43).

Examples of the sheet-like adhesive agent 1D to be used include adhesive films having good heat resistance such as epoxy resin, acrylic resin, and polyimide resin. A glass fiber-epoxy resin prepreg can also be used. Regarding the sticking mentioned above,
It suffices to use a hot press or a hot roller laminator, and a high-pressure autoclave equipped with a vacuuming function can be used to achieve uniform lamination.

Then, by applying photolithography and etching techniques to the conductive foil 17d, holes 9'are formed in the portions to be filled with the conductive material (FIG. 44). Then, using the conductive foil 17d as a mask, the sheet adhesive 1D is etched to form the holes 9 to be filled with the conductive material (FIG. 45). As an etching method, for example,
Examples include plasma gas etching, various types of laser etching, and chemical etching using concentrated sulfuric acid or the like. However, when the sheet adhesive 1D contains an inorganic material such as a glass fiber-epoxy resin prepreg, it is difficult to form a highly accurate hole by the above-described etching method, and therefore, high frequency It is necessary to combine oscillation YAG laser or mechanical drilling.

Finally, electroplating is performed to fill the holes 9 with a conductive material. As a result, an intermediate member having a structure similar to that shown in FIG. 42 is obtained. When conducting this electroplating, it is necessary to mask the conductive foil 17d. Conductive foil 17d by electroplating
This is because unnecessary electrodeposition occurs. Then, by applying photolithography and etching technique with respect to the conductive layer 17a, to form a conductive circuit 2 ₄ of a predetermined pattern (FIG. 46).

[0075] Then, the conductive circuit 2 ₄ covered with an insulating layer 1B of predetermined thickness, further, after forming the hole 9 to be filled with the conductive material on the insulating layer 1B, there filled with conductive material 10, By projecting the end portion to form the protrusion portion 10c, as shown in FIG.
A multilayer circuit board A ₆ as shown in FIG. 9 can be obtained (FIG. 47). In addition, as shown in FIG. 48, a flexible substrate in which both surfaces of a conductive layer 17b such as a copper foil is covered with a thin insulating layer 1C is used. By doing so, a multi-layer rigid flex circuit board A ₇ can be obtained.

Example 4 Next, the conductor circuit formed on one surface of the insulating substrate was
An example is shown in which the holes do not have a conductive relationship with each other, and therefore the conductive material cannot be partially filled in the holes by the electrolytic plating method described above. In this embodiment, first, as shown in FIG. 49, an insulating substrate 1 having a predetermined pattern of conductor circuits 2 formed on one surface 1a is arrayed in a predetermined plane pattern in the same manner as described above. To form the holes 9 to be arranged.

In this case, all the conductor circuits 2 are not in a conductive relationship with each other. Therefore, even if one end of the conductor circuit 2 is connected to the negative electrode as shown in FIG. 18, a part of the conductor circuit is not energized, and a conductive material cannot be electrodeposited on the interface 2a. Therefore, in this embodiment, as shown in FIG.
As shown by 0, first, for example, by electroless plating,
A thin conductive layer 17c is formed on the other surface 1b of the insulating substrate 1, the wall surface 9c of the hole 9 and the interface 2a of the conductor circuit to form all the holes 9
Have a conductive relationship between.

Then, as shown in FIG. 51, in the conductive layer 17c, the resist 1 is applied to the portion excluding the hole 9 portion.
After patterning 1e, the conductive layer 17c is connected to the negative electrode and electrolytic plating is performed. Since the conductive material can be electrodeposited on all the holes 9, the conductive material is also electrodeposited on the holes 9 located on the conductor circuit 2 which is not in the conductive relationship.

After that, the resist 11e is peeled off, and the conductive layer 17c located under the resist 11e is removed by etching. As a result, as shown in FIG. 52, the conductive material 10 is filled in all the holes 9, and the projections (bump electrodes) 10c are formed by projecting the ends thereof. Example 5 When the conductor circuit is formed by a simple conductive thin layer without forming the conductor circuit on one surface of the insulating base material, the unit structure can also function as a bump carrier tape. This case will be described below.

In the unit structure A ₁ shown in FIG. 1, for example, a polyimide film having excellent heat resistance and good flexibility is selected as the insulating substrate 1, and a conductor circuit (conductive thin film) formed on one surface 1a of the polyimide film is selected. As the layer 2, a thin copper foil, for example, is used as the conductive material 10, and solder is used as the conductive material 10. As a result, as shown in FIG. A tape-shaped unit structure is manufactured.

As shown in FIG. 54, the projecting portion 10c of this unit structure has a pad 18a formed in a predetermined pattern and various rigid circuits in which a solder resist 18b is patterned. The pad 18a and the protrusion 10c are fused by contacting the pad 18a of the substrate 18 and thermocompression bonding the whole. Then, the insulating base material 1 is peeled off from the protrusion 10c, as shown in FIG.
As shown by, the protrusion 10c is transferred onto the pad 18a.

In order to effectively transfer the protrusions 10c, when the holes 9 are formed in the insulating base material 1, the interface 2a of the conductive thin layer 2 shown in FIG. 53 has a thickness of about 2 μm. If the insulating base material 1 is left untouched, the adhesive strength between the conductive material filled in the holes 9 by electrolytic plating and the interface 2a is weakened, and the transfer to the pad 18a can be reliably performed. Target.

Further, as shown in FIG. 56, if the shape of the hole 9 for filling the conductive material is a tapered hole as shown in FIG. 13, the conductive material can be surely transferred to the pad 18a. It is effective. After that, by subjecting the whole to reflow treatment, the solder protrusions 10c are rounded into a ball shape due to the surface tension. As a result, as shown in FIG. 57, the solder bump electrode 1 attached to the pad 18a of the circuit board 18
0d is formed.

Further, instead of the unit structure shown in FIG. 53, as shown in FIG. 58, the conductive thin layer is entirely removed by etching, and the insulating base material 1 and the conductive material 10 held in the hole are removed. Even if a different one is used, another circuit board 18
Bump electrodes can be transferred and formed on the. Example 6 FIG. 59 is a sectional view showing a circuit board A ₈ of the present invention obtained by using the unit structure A ₃ of the present invention.

This circuit board A ₈ is formed by electrically connecting the conductor circuit 2 and the pads (terminals) 18a of the circuit board 18 with the unit structure A ₃ and another circuit board 18 as an intermediary of a conductive material. It is one circuit board. When manufacturing this circuit board A ₈ , first, the circuit board A ₃ as shown in FIG. 60 is prepared.

In this circuit board A ₃ , a conductor circuit 2 made of copper is formed on one surface 1a of a polyimide film 1, and a hole 9 is formed therein. Then, the holes 9 are formed by combining the etching method at the time of forming the holes.
The wall surface of a is a straight wall surface, and the opening 9b side is a curved wall surface whose diameter gradually increases. Then, by applying the electrolytic plating method, the base portion 9a of the hole 9 is first filled with copper 10e by, for example, an electroplating method, and the conductive material 10 is filled by electrodepositing the solder 10f thereon (FIG. 6
0). At this time, the head of the conductive material 10, that is, the tip of the solder 10f is the other surface 1b of the polyimide film 1.
It is in a depressed state.

In the case of this unit structure A ₃ , FIG.
It is not necessary that the head portion 10f of the conductive material 10 is recessed from the surface 1b as shown in, and the volume of the conductive material 10 is smaller than the volume of the hole 9, or the conductive material 10 and the hole 9 It may be in a state in which a void is formed between the wall surface and. On the solder 10f of the unit structures A _3, as shown in FIG. 61, pads arranged in the same pattern as the pattern of the holes 9 are arranged on the surface 1b of the unit structures A ₃ (terminals) 18a Another circuit board 18 having is stacked. As a result, the solder 10f contacts the pad 18a.

After that, by performing a reflow process on the whole, the solder 10f is melted, and a conductive structure is formed between the pad 18a and the conductor circuit 2 by the molten solder, and the circuit board A ₈ shown in FIG. 59 is obtained. . In this case, since the hole 9 has a shape in which the diameter is expanded toward the opening 9b,
Is larger than the volume of the conductive material (solder 10f), the hole 9 has a space capable of receiving the molten solder even when the solder 10f is melted. Therefore, the situation in which the molten solder flows toward the adjacent solder joint and the joints are short-circuited does not occur.

In the production of this circuit board A ₈ , only a polyimide film having high heat resistance and flexibility can be used as the insulating base material 1 of the unit structure A ₃ , and further, in the joint portion. Is composed of only a metal material having no organic material and good thermal conductivity, the unit structure A ₃ and another circuit board 18 are bonded to each other by the conductor circuit 2
It can be performed by directly heating from the person. Further, since the heat resistance of this joint portion is very excellent, not only the solder joint but also the direct nickel / gold structure joint which requires higher temperature joint can be performed.

As shown in FIG. 62, the circuit board A
_{When the} anisotropic conductive sheet 19 having conductivity only in the thickness direction is arranged between the _third circuit board ₃ and another circuit board 18 and the whole is joined, the circuit is joined without performing the high temperature joining as described above. It can be substrate A ₈ . Furthermore, this circuit board A ₈
In even another circuit board 18 is of a different rigid circuit board of the circuit board A ₃ and the thermal expansion coefficient is generated for the circuit board A ₃ rich in flexibility, at the junction (when heated) heat The strain can be absorbed, and the bonding state becomes highly reliable.

That is, even if the other circuit board 18 is a circuit board using glass fiber-epoxy resin, ceramics, glass or the like as an insulating base material, the circuit board A ₃ is directly bonded to this to form the circuit board A ₈ . it is also possible, and may be on the circuit board a ₈ by bonding the semiconductor chip directly to a circuit board a ₃ for example such as a silicon wafer substrate.

Of course, a flexible circuit board using a heat-resistant film such as a polyimide film is replaced with another circuit board 1.
It can also be used as a circuit board A ₈ .

[0093]

As is apparent from the above description, the circuit board of the present invention includes an insulating base material, a conductive thin layer formed on one surface of the insulating base material, and the other of the insulating base material. A unit structure including a hole formed by perforating the insulating base material in the thickness direction from the surface to the interface with the conductive thin layer or in the vicinity thereof, and a conductive material filled in the hole as an essential component Therefore, when the conductive thin layer is formed into a conductor circuit having a predetermined pattern and the conductive material is projected from the other surface of the insulating base material, bump electrodes can be formed in the conductor circuit without forming through holes as in the conventional case. Since it can be formed, the distribution density of the bump electrodes can be increased. And
In response to this, the semiconductor elements can be mounted at high density.

Further, since the conductive material (bump electrode) is filled in the holes of the insulating base material, a large current capacity can be secured even when the diameter of the holes is small.
This also makes it possible to increase the distribution density of bump electrodes, which contributes to high-density mounting of semiconductor elements. Further, in the case of the circuit board of the present invention, all the steps can be chemical treatment steps, and it is not necessary to form a conductive structure by performing mechanical drilling or the like as in the conventional case. By using an insulating film such as polyimide, a so-called roll-to-roll system is adopted, and continuous production is possible even when producing a flexible double-sided circuit board, which was conventionally difficult. It is possible to reduce the manufacturing cost.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view showing a unit structure A ₁ in a circuit board of the present invention.

FIG. 2 is a cross-sectional view showing a unit structure A ₂ in the circuit board of the present invention.

FIG. 3 is a cross-sectional view showing a unit structure A ₃ in the circuit board of the present invention.

FIG. 4 is a cross-sectional view showing a state in which a semiconductor element is mounted on the circuit board of the present invention by wire bonding.

FIG. 5 is a cross-sectional view showing a state in which a semiconductor element is mounted on the circuit board of the present invention by a COB method.

FIG. 6 is a cross-sectional view showing a state in which the circuit board of the present invention is used as an inspection probe.

FIG. 7 is a cross-sectional view showing a state where the circuit board of the present invention is used as a thermal printer head.

FIG. 8 is a cross-sectional view showing an example of a material B ₁ used for manufacturing the circuit board of the present invention.

9 is a cross-sectional view showing a state in which a resist is patterned on the material B ₁ of FIG.

FIG. 10 is a cross-sectional view showing a state in which a conductor circuit is formed on one surface of an insulating base material.

FIG. 11 is a cross-sectional view showing a state in which a resist is patterned on the other surface of the insulating base material.

FIG. 12 is a cross-sectional view showing a state where holes are formed in an insulating base material.

FIG. 13 is a cross-sectional view showing a wall surface shape of a hole formed by etching.

FIG. 14 is a cross-sectional view showing another wall surface shape of the hole.

FIG. 15 is a cross-sectional view showing still another wall surface shape of the hole.

FIG. 16 is a cross-sectional view showing another wall surface shape of the hole.

FIG. 17 is a cross-sectional view showing still another wall surface shape of the hole.

FIG. 18 is a schematic cross-sectional view showing a method of filling a hole with a conductive material by an electrolytic plating method.

FIG. 19 is a cross-sectional view showing an example in which holes are filled with a conductive material.

FIG. 20 is a cross-sectional view showing an example of the shape of a protrusion of a conductive material filled in a hole.

FIG. 21 is a cross-sectional view showing another example of the shape of the protrusion.

FIG. 22 is a cross-sectional view showing still another example of the shape of the protrusion.

23 is a cross-sectional view showing a state in which a plating layer is formed on the protrusion of FIG.

FIG. 24 is a cross-sectional view showing a state in which a plating layer is formed on the protrusion of FIG.

FIG. 25 is a cross-sectional view showing a state where a plating layer is formed on the protrusions of FIG. 22.

FIG. 26 is a cross-sectional view showing a state where solder balls are attached to the protrusions.

FIG. 27 is a cross-sectional view showing a state in which the conductive material and the protrusions are all made of solder.

FIG. 28 is a cross-sectional view showing a state in which the protrusion is further protruded from the insulating base material.

29 is a cross-sectional view showing a state in which a plating layer is formed on the surface of the protrusion of FIG. 28.

FIG. 30 is a cross-sectional view showing a state where through holes are formed in a glass fiber-epoxy resin laminate.

31 is a cross-sectional view showing a state in which a conductor circuit is formed on the laminated board of FIG. 30.

FIG. 32 is a cross-sectional view showing another material B ₂ used in manufacturing the circuit board of the present invention.

FIG. 33 is a cross-sectional view showing a state in which a resist is patterned on the material B ₂ .

FIG. 34 is a cross-sectional view showing a state in which a conductor circuit is formed on one surface of an insulating base material.

FIG. 35 is a cross-sectional view showing a state where holes are formed in an insulating base material by etching.

FIG. 36 is a cross-sectional view showing a state in which a circuit pattern is formed on the other surface of the insulating base material.

FIG. 37 is a sectional view showing a double-sided circuit board A ₄ of the present invention.

FIG. 38 is a sectional view showing another double-sided circuit board A ₅ of the present invention.

FIG. 39 is a sectional view showing a multilayer circuit board A ₆ of the present invention.

FIG. 40 is a cross-sectional view showing a state in which an insulating layer is formed on the upper surface of the double-sided circuit board A ₅ .

41 is a cross-sectional view showing a state in which holes are formed in the insulating layer of FIG. 40.

42 is a cross-sectional view showing a state in which a conductive material is filled in the holes of FIG. 41 and a conductive layer is formed thereon.

FIG. 43 is a cross-sectional view showing a state in which a conductive foil is laminated on the upper surface of the double-sided circuit board A ₅ .

44 is a cross-sectional view showing a state where holes are formed in the conductive foil of FIG. 43.

FIG. 45 is a cross-sectional view showing a state in which holes are formed in the sheet adhesive of FIG. 43.

FIG. 46 is a cross-sectional view showing a state in which a conductor circuit is formed on the conductive layer of FIG. 42.

FIG. 47 is a cross-sectional view of the multilayer circuit board A ₆ .

FIG. 48 is a cross-sectional view showing a multilayer rigid flex circuit board A ₇ including the circuit board of the present invention.

FIG. 49 is a cross-sectional view showing a material B ₃ used in another method for manufacturing a circuit board of the present invention.

50 is a cross-sectional view showing a state in which a conductive layer is formed on the surface of the insulating base material of FIG. 49.

51 is a cross-sectional view showing a state in which a resist is patterned on the conductive layer of FIG. 50.

52 is a cross-sectional view showing a state where the holes in FIG. 51 are filled with a conductive material.

FIG. 53 is a cross-sectional view showing a bump carrier tape made of the circuit board of the present invention.

54 is a cross-sectional view showing a state in which the protrusion of FIG. 53 is fusion-bonded to a pad of another circuit board.

FIG. 55 is a cross-sectional view showing a state where the protrusion is transferred to the pad.

FIG. 56 is a sectional view showing another bump carrier tape made of the circuit board of the present invention.

57 is a cross-sectional view showing a state in which the transfer protrusion portion of FIG. 55 is used as a solder bump electrode.

FIG. 58 is a cross-sectional view showing another bump carrier tape.

FIG. 59 is a sectional view showing another circuit board A ₈ of the present invention.

FIG. 60 is a cross-sectional view showing another unit structure A ₃ of the present invention.

61 is a cross-sectional view showing a state in which a pad of another circuit board is in contact with an electrode of the unit structure A ₃ of FIG. 60.

FIG. 62 is a cross-sectional view showing another method of manufacturing the circuit board A ₈ .

FIG. 63 is a sectional view showing a conventional BGA structure.

[Explanation of symbols]

1, 1'insulating base material 1a, 1a ', 1b, 1'b, 1b' insulating base material 1,
1'Surface 1A, 1B, 1C Insulating layer 1D Sheet adhesive 2 Conductor circuit 2a Interface of conductor circuit 2 2 ₁ , 2 ₂ Metal layer 2 ₃ , 2 ₄ Circuit pattern 3 Die bonding paste 4 Semiconductor element 5 Bonding wire 6 Through hole 7 Plating layer 7a Upper through hole land portion 7b Lower through hole land portion 8 Solder ball 9, 9 ', 9 "hole 9a Hole 9 base 9b Hole 9 opening 9c Hole 9 wall surface 10 Conductive material 10a, 10b End portion 10c of conductive material 10c Projection (bump electrode) 10d Solder ball 10e Copper 10f Solder 10f 'Molten solder 11a, 11b, 11d, 11d, 11d', 11e
Resist 12 Plating bath 13 Insoluble electrode 14 Plating layer 15 Solder protrusion 16 Plating layer 17a, 17b, 17c Insulating layer 17d Conductive foil 18 Circuit board 18a Pad 18b Solder resist 19 Anisotropic conductive sheet

Claims (14)

[Claims] 1. An insulating base material, a conductive thin layer formed on one surface of the insulating base material, and the insulation from the other surface of the insulating base material to an interface between the conductive thin layer and its vicinity A circuit board essentially comprising a unit structure composed of a hole formed by perforating a base material in a thickness direction and a conductive material filled in at least a base portion of the hole. 2. The circuit board according to claim 1, wherein the holes are arranged in a predetermined pattern on the other surface of the insulating base material. 3. The circuit board according to claim 1, wherein the hole has a shape expanding to the other surface of the insulating base material. 4. The circuit board according to claim 1, wherein the volume of the hole is larger than the volume of the conductive material with which the hole is filled. 5. The circuit board according to claim 1, wherein the conductive thin layer is a conductor circuit having a predetermined plane pattern. 6. The circuit board according to claim 1, wherein the hole is formed up to an interface of the conductive thin layer. 7. The circuit board according to claim 1, wherein the conductive material has a head protruding from the other surface of the insulating base material. 8. The circuit board according to claim 1, wherein a head portion of the conductive material is recessed from the other surface of the insulating base material. 9. The circuit board according to claim 1, wherein a circuit pattern is formed on the other surface of the insulating base material in a predetermined plane pattern. 10. The circuit board according to claim 1, wherein the insulating base material is made of a polyimide film, the conductive thin layer is made of copper, and the conductive material is made of solder. 11. The insulating base material is made of a polyimide film, the conductive thin layer is made of copper, and the conductive material has copper located on the base side of the hole, and solder is attached on the copper. The circuit board according to claim 1. 12. The insulating base material is made of a polyimide film, the conductive thin layer is made of copper, and the conductive material has copper positioned on the base side of the hole, and nickel or gold is attached onto the copper. The circuit board according to claim 1, which is provided. 13. A multi-layer circuit board, wherein at least two unit structures are integrally laminated. 14. A circuit board having terminals arranged in the same pattern as the pattern of the holes arranged on the other surface of the circuit board according to claim 1 and the circuit board according to claim 1 are joined together. A circuit board, characterized in that the terminal and the conductive material with which the hole is filled are electrically connected.