JPH0919155A - Power supply - Google Patents

Abstract

PURPOSE: To provide a power supply in which the application of high stress can be prevented while enhancing the input power factor. CONSTITUTION: Output from a DC power supply E including a partial smoothing circuit 5 is fed through a regeneration current blocking means 15, comprising a diode D5 and a capacitor C5, to an inverter circuit where it is converted into high frequency AC power being fed to a discharge lamp. The inverter circuit is a single transistor inverter circuit comprising a main resonance circuit A, a triple resonance circuit, a switching element Q1, a diode D1, and a drive circuit 1. A path for feeding a regenerated current from an inductance element to field capacitors C10, C11 is interrupted by the diode D5 and a regenerated current loop is formed passing through the capacitor C5. This circuitry enhances the input power factor while preventing application of high stress.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a power supply device, and more particularly to a power supply device having a high input power factor.

[0002]

2. Description of the Related Art As a conventional example of the present invention, there is one disclosed in Japanese Patent Application No. 6-276862 filed by the present applicant, and its circuit diagram is shown in FIGS.

A circuit shown in FIG. 7 shows a main circuit configuration in the conventional example, in which a DC power source E is converted into AC high frequency power by an inverter circuit 4 and supplied to a discharge lamp DL, and a switching element Q1 is connected. In synchronization with the rising of the ON signal of the drive signal, the frequency of the inverter circuit 4 is changed from the frequency f2 at the time of pre-heating to the frequency f1 at the time of lighting the inverter circuit 4.
The frequency of is switched.

Here, the inverter circuit 4 is a monolithic inverter circuit, and the main resonance circuit A, the triple resonance circuit B, the switching element Q1, the diode D1 connected in antiparallel to the switching element Q1, and the drive circuit 1 for the switching element Q1. Composed of. The main resonance circuit A is formed by connecting a parallel resonance circuit including an inductance element L1 and a capacitor C1 to a series resonance circuit including an inductance element L2 and a capacitor C2 via a DC component-cutting capacitor C3. Discharge lamp D on both ends of C2
L is connected in parallel. The triple resonance circuit B has a secondary winding n
It is composed of a parallel circuit of an inductance element Ln having 2 and n3 and a capacitor Cn, and is connected in series between one end of the main resonance circuit A and the collector of the switching element Q1.
A series connection including the inductance elements L1 and Ln and the switching element Q1 is connected in parallel to both ends of the DC power source E. The secondary windings n2 and n3 of the inductance element Ln are connected to the filaments x1 and x2 of the discharge lamp DL, and the secondary winding n2 of the inductance element Ln is connected.
Each of the filaments x1 and x2 of the discharge lamp DL is preheated by the secondary voltage generated at 2 and n3.

FIG. 8 shows a switching element Q in the driving circuit 1.
The circuit diagram of the control circuit which supplies the drive signal Vd of 1 is shown.

The control circuit comprises an oscillator circuit 2 and a timer circuit 3. Switching element Q in drive circuit 1
The oscillator circuit 2 for generating the drive signal Vd of 1 is a timer circuit TM including a general-purpose timer IC (for example, μPC5555 manufactured by NEC) and external resistors R1, R2.
It is composed of a capacitor C4. A clock signal as shown in FIG. 9 (a) is output to the output terminal (3rd pin) of the timer circuit TM, which is frequency-divided by the D flip-flop FF1 and then as shown in FIG. 9 (b). The drive signal Vd is obtained.

The timer circuit 3 controls switching from preheating to lighting, and the comparator CP1
And a flip-flop FF2. The reference voltage Vk is input to the positive input terminal of the comparator CP1,
The voltage across the capacitor C5 (hereinafter referred to as voltage) Vc5 is input to the negative input terminal of the comparator CP1. The capacitor C5 is charged through the resistor R6 after the power is turned on, and the voltage Vc5 gradually rises. When the voltage Vc5 exceeds the reference voltage Vk, the output of the comparator CP1 changes from the high (H) level to the low (L) level, which causes the output Q of the flip-flop FF2, that is, the output of the timer circuit 3. The H-level changes to the L-level in synchronization with the rising of the clock input terminal CLK, and the switching element Q2 changes from ON to OFF.

When the switching element Q2 is on, the voltage of the frequency control terminal (pin 5) of the timer circuit TM is
Although it is a low level determined by the voltage division ratio of the resistors R3 to R5,
When the switching element Q2 is turned off, the timer circuit TM
The voltage of the frequency control terminal (Pin 5) is
It changes to a high level determined by the partial pressure ratio of 4. In response to this, the operating frequency f of the output terminal (3rd pin) of the timer circuit TM is switched from 2 × f2 to 2 × f1, and the drive signal Vd of the switching element Q1 is the frequency f at the time of preheating.
The frequency is switched from 2 to the frequency f1 at the time of lighting.

FIG. 9 shows an operation waveform diagram in this conventional example. In the figure, the main resonance circuit A is the voltage of the output signal (3rd pin) of the timer circuit TM, (b) is the drive signal Vd of the switching element Q1, (c) is the output signal of the comparator CP1, and (d) is The output signal of the flip-flop FF2 in the timer circuit 3, (e) shows the voltage V1 across the switching element Q1, and (f) shows the waveform of the current ID1 flowing through the switching element Q1. Since the output of the timer circuit 3 is synchronized with the output signal of the oscillation circuit 2 by the flip-flop FF2, as shown in the main resonance circuits A to (d) of FIG.
Output of timer circuit 3, that is, flip-flop FF2
The output of is switched from the H level to the L level in synchronization with the rising edge of the drive signal of the switching element Q1. That is, the frequency of the drive signal of the switching element Q1 switches from f2 to f1 in synchronization with the rising of the drive signal of the switching element Q1. With this configuration, FIG.
As shown in (e) and (f), the resonance circuit A transiently transitions from the operation during the preheating to the operation during lighting.
Since it does not pass the resonance frequency of B, overvoltage to the switching element Q1 can be prevented.

FIG. 9 (f) also shows the current ID1 flowing through the diode D1, which is the inductance element L1, L.
2 shows the regenerative current to Ln. The route is as follows: inductance element L1 → DC power source E → diode D1 → (capacitor Cn, inductance element Ln) → inductance element L1 and inductance element L2 → (capacitor C
2, discharge lamp DL) → capacitor C3 → DC power source E → diode D1 → (capacitor Cn, inductance element L
n) → inductance element L2 and inductance element Ln → (inductance element L1, capacitor C1) →
DC power supply E → diode D1 → inductance element Ln
And

In order to increase the input power factor, as the DC power source E, for example, an AC power source Vs as shown in FIG.
Diodes D2 to D4, electric field capacitors C10 and C for partially smoothing a half of the maximum value of the DC voltage rectified by B
There is a so-called 1/2 partial smoothing circuit consisting of 11. As shown in FIG. 11B, the output voltage waveform Vo is not completely smoothed, but partially smoothed, and the high voltage period Ta and the low voltage period Tb are alternately repeated. . Output voltage E1 of the DC power supply E during the low voltage period Tb
Is the peak voltage E of the DC power supply E during the high voltage period Ta.
The peak voltage E2 of the DC power supply E during the high voltage period Ta is about 1.41 of the effective voltage of the AC power supply Vs.
It is twice. That is, E1, which is a half of the peak voltage E2 of the DC power source E, is partially smoothed, and is hereinafter referred to as a half valley buried power source. By configuring the DC power supply E in this way, the input power factor becomes higher than that of the perfect smoothing circuit. In addition,
The electric field capacitors C10 and C11 are capacitors for smoothing the power supply and are required to have large capacity. It is common to use an aluminum electrolytic capacitor.

[0012]

However, the following problems occur in the above conventional example.

In a partial smoothing circuit as shown in FIG. 10,
When the performance deterioration of the discharging diodes D2 and D4 for the electric charges charged in the electric field capacitors C10 and C11 occurs, an overvoltage is applied to the electric field capacitors C10 and C11.
That is, when the diodes D2 and D4 are short-circuited, the AC power supply Vs (max) rectified by the rectifier DB is applied to each of the electric field capacitors C11 and C10, and when the diodes D2 and D4 are opened, the electric field capacitors C11 and C10 are opened. An overvoltage equal to or higher than the AC power supply Vs (max) rectified by the rectifier DB is applied to each of C11 and C10.

Here, the reason why when the diodes D2 and D4 are opened, an overvoltage of the AC power supply Vs (max) or more rectified by the rectifier DB is applied to each of the electric field capacitors C11 and C10 will be briefly described below. Describe.

As described above, the inductance elements L1 and L
The energy accumulated in 2, Ln is regenerated in the loop for charging the DC power source E, so that when the diodes D2, D4 are opened, the discharge loop of the electric field capacitors C11, C10 via the diodes D2, D4 is cut off. But,
The electric field capacitors C11 and C10 are continuously charged through the diode D3 by the regenerative current from the load side, and
An overvoltage equal to or higher than the AC power supply Vs (max) rectified by the rectifier DB is applied to each of the electric field capacitors C11 and C10.

As is well known, since the internal temperature of an aluminum electrolytic capacitor rises due to overvoltage, the internal pressure increases and the valve operates, which is not a dangerous mode, but significant smoke is generated.

The present invention has been made in view of the above problems, and an object thereof is to provide a power supply device capable of improving an input power factor and preventing a large stress from being applied. That is.

[0018]

In order to solve the above problems, according to the invention of claim 1, a DC voltage obtained by rectifying an AC power source with a rectifier is partially smoothed, and a plurality of electrolytic capacitors and a plurality of electrolytic capacitors are provided. A power supply device comprising: a DC power supply including a partial smoothing circuit made of a diode; and an inverter circuit unit that converts a DC voltage output of the DC power supply into an AC high-frequency voltage and supplies the load to a load. An output terminal of a DC power supply in a power supply device including at least one switching element and one resonance circuit including at least an inductance element and a capacitor, and connecting the switching element and the load through the resonance circuit When a voltage across both ends of the inverter exceeds a certain value, it is provided with detection means for detecting it and stopping the oscillation of the inverter circuit.

According to a second aspect of the present invention, instead of the detecting means according to the first aspect, when the voltage across the electrolytic capacitor is out of a certain range, it is detected and the oscillation of the inverter circuit is stopped. Is provided.

According to the third aspect of the present invention, instead of the detecting means of the first aspect, when the voltage across the output end of the DC power source becomes a certain value or more, it is detected and transferred from the DC power source to the inverter circuit. It is characterized in that a detection means for cutting off the power supply of is provided.

According to the fourth aspect of the invention, instead of the detecting means of the first aspect, when the voltage across the electrolytic capacitor is out of a certain range, it is detected to supply power from the DC power supply to the inverter circuit. It is characterized in that a detection means for shutting off is provided.

According to a fifth aspect of the present invention, instead of the detecting means according to the first aspect, when the voltage across the output terminal of the DC power source becomes a certain value or more, it is detected and the regenerative current from the inductance element is detected. Is provided with a detecting means for reducing

According to a sixth aspect of the present invention, instead of the detecting means according to the first aspect, when the voltage across the electrolytic capacitor is out of a certain range, it is detected to reduce the regenerative current from the inductance element. It is characterized in that a detecting means is provided.

According to the invention of claim 7, instead of the detecting means of claim 1, a regenerative current blocking means for blocking the regenerative current from the inductance element is provided between the inductance element and the DC power source. It is characterized by

According to the eighth aspect of the present invention, the partial smoothing circuit has m / n of the maximum value of the DC voltage obtained by rectifying the AC power supply.
(N, m are natural numbers, m <n) is an n-valve m-filled power source for smoothing.

According to a ninth aspect of the invention, the load is a discharge lamp.

[0027]

According to the first aspect of the present invention, among the diodes forming the partial smoothing circuit, when the discharging diode of the electric field capacitor forming the partial smoothing circuit is opened, the electric field capacitor that lost the discharge path is removed from the inverter circuit. Is charged by the regenerative current of, and the voltage across it is rising. That is, the voltage across the DC power supply rises.

When the detection means detects that the voltage across the DC power supply exceeds a certain value, the switching element forming the inverter circuit is stopped and the oscillation of the inverter circuit is stopped.

According to the second aspect of the present invention, when the detecting means detects that the voltage across the electric field capacitor forming the partial smoothing circuit is out of a certain range, the switching element forming the inverter circuit is stopped, Stop the oscillation of the inverter circuit.

According to the third aspect of the present invention, when the detection means detects that the voltage across the DC power supply exceeds a certain value, the relay is turned off to cut off the power supply from the DC power supply to the inverter circuit.

According to the fourth aspect of the present invention, when the detecting means detects that the voltage across the electric field capacitor forming the partial smoothing circuit is out of a certain range, the relay is turned off and the direct current power source is switched to the inverter circuit. Cut off the power supply.

According to the fifth aspect of the invention, when the detection means detects that the voltage across the DC power supply exceeds a certain value, the output of the inverter circuit is reduced to reduce the regenerative current.

According to the sixth aspect of the present invention, when the detecting means detects that the voltage across the electric field capacitor constituting the partial smoothing circuit is out of a certain range, the output of the inverter circuit is lowered to generate the regenerative current. Decrease.

According to the present invention, even if the discharging diode of the electric field capacitor forming the partial smoothing circuit among the diodes forming the partial smoothing circuit is opened, the regenerative current from the inverter circuit is regenerated. The element means is prevented from flowing into the DC power supply, and the regenerative current flows through the regenerative current element means.

According to the eighth aspect of the present invention, the m-valve power source for n minutes smoothes the maximum value of the DC voltage obtained by rectifying the AC power source for n minutes, thereby improving the input power factor.

According to the ninth aspect of the present invention, alternating-current high-frequency power is supplied to the discharge lamp from the inverter circuit so that the discharge lamp is lit stably.

[0037]

【Example】

(Embodiment 1) A circuit diagram of a first embodiment according to the present invention is shown in FIG.

The difference from the conventional example shown in FIG. 7 is that a partial smoothing circuit as shown in FIG. 10 is used as a DC power source E, and a capacitor C is provided at the output end of the DC power source E via a diode D5.
5 is connected in parallel, and the regenerative current blocking means 15 is provided by the diode D5 and the capacitor C5. The same configurations as those of the other conventional examples are denoted by the same reference numerals and the description thereof will be omitted.

With this configuration, the path through which the regenerative current from the inductance elements L1, L2, Ln flows into the electric field capacitors C10, C11 is turned off by the diode D5, and a regenerative current loop via the capacitor C5 is formed. Therefore, even if at least one of the diode D2 and the diode D4 is opened, the voltage across the electric field capacitors C10 and C11 is the AC power supply Vs (max).
It can be prevented that the electric field capacitors C10 and C11 are stressed.

The drive signal Vd is applied to the switching element Q1 by the oscillation circuit 8 via the drive circuit 1.

(Second Embodiment) A circuit diagram of a second embodiment according to the present invention is shown in FIG.

The difference from the first embodiment shown in FIG. 1 is that resistors R11 and R12 connected in parallel to the output terminal of the DC power source E are connected.
Of the output voltage Vo of the DC power source E through the series connection of the resistors R11 and R12, the holding circuit 7 that holds the output of the detection circuit 6, and the input via the holding circuit 7. And an oscillating circuit 8 that outputs a drive signal Vd for the switching element Q1 by the output of the detected detection circuit 6, and a detection means 9 that detects the output voltage Vo of the DC power supply E and drives the switching element Q1. Therefore, the same configurations as those of the other first embodiment are denoted by the same reference numerals and the description thereof will be omitted.

When at least one of the diode D2 and the diode D4 is opened, the electric field capacitor C10,
The smoothness at C11 gradually deteriorates, and the voltage waveform of the output voltage Vo of the DC power source E becomes close to the pulsating waveform. Therefore, in this circuit, the minimum value of the output voltage Vo of the DC power supply E is detected, and when it becomes a certain level or less, the oscillation operation by the oscillation circuit 8 is stopped, the switching element Q1 is stopped, and the inverter circuit 4
Stop the oscillation operation of.

Here, the detection circuit 6 compares the voltage V1 obtained by dividing the output voltage Vo of the DC power source E by the series connection of the resistors R11 and R12 with the reference voltage Vk2, and outputs it through the resistor R21. It is composed of CP2. The holding circuit 7 includes switching elements Q21, Q22, resistors R22-
It is a thyristor composed of R24. Oscillation circuit 8
Is a general-purpose timer IC2 (eg NEC μPC
5555), external resistors R25 and R26, and capacitors C21 and C22 to form an unstable oscillation circuit.

Next, the operation will be briefly described. From the 3rd pin of the timer IC2 in the oscillator circuit 8, the frequency f = 1.44 / C2 (R5 + 2 × R6) ... (1) Duty = R6 / (R5 + 2 × R6). The rectangular wave signal (2) is the drive signal Vd for the switching element Q1.
Is output to the switching element Q1 via the drive circuit 1 to drive the switching element Q1 and the inverter circuit 4 oscillates.

When the smoothness of the electric field capacitors C10 and C11 becomes poor and the voltage V1 falls below Vk2, the comparator CP2 outputs a signal of H level and the holding circuit 7 is turned on. When the holding circuit 7 turns on, the resistors R21, R23, R2
Since the voltage between both ends of the series connection of 4 becomes approximately zero, the resistance R2
The contact potentials of R3 and R24 become substantially zero. The 4th pin of the timer IC 2 is a reset terminal and has a certain value or less (for example, 1
When the signal V) is input, the output signal from the 3rd pin becomes L level, the switching element Q1 is stopped, and the oscillation operation of the inverter circuit 4 is stopped. Since the holding circuit 7 constitutes a thyristor, the holding circuit 7 is kept on until a reverse bias is applied to the holding circuit 7. That is, the diodes D2 and D4 are opened and the electric field capacitor C
When the smoothness at 10 and C11 deteriorates and the output voltage Vo of the DC power source E falls below a certain value, the oscillation of the inverter circuit 4 continues to be stopped thereafter.

(Third Embodiment) FIG. 3 shows a circuit diagram of a third embodiment according to the present invention.

The difference from the second embodiment shown in FIG. 2 is that instead of the detection circuit 6 for detecting the output voltage Vo of the DC power source E, a voltage detection circuit 10 for detecting the voltage across the electric field capacitor C11 is provided. Therefore, the same components as those of the second embodiment are denoted by the same reference numerals and the description thereof will be omitted.

Next, the operation will be briefly described. Diode D
When 2 is opened, the voltage across the electric field capacitor C11 (hereinafter referred to as voltage) Vc11 rises, and the diode D4.
The voltage Vc11 drops when the voltage Vc11 is opened. When the voltage Vc11 is out of a certain range, the voltage detection circuit 10 causes the holding circuit 7 to operate.
Then, the holding circuit 7 holds the H level signal. By inputting an H level signal to the oscillation circuit 8, the oscillation circuit 8 outputs an L level signal, and stops the oscillation operation of the switching element Q1 and stops the oscillation of the inverter circuit 4.

(Embodiment 4) A circuit diagram of a fourth embodiment according to the present invention is shown in FIG.

The difference from the first embodiment shown in FIG. 1 is that the DC power source E is used instead of the diode D5 and the capacitor C5.
And a resistor R33 inserted between the inverter circuit 4 and
The relay Ry1 connected in parallel to both ends of the resistor R33 and the voltage across the electric field capacitor C10 (hereinafter referred to as voltage).
The detection circuit 11 for detecting Vc10 and the detection circuit 12 for detecting the voltage Vc11 are provided, and the relay Ry1 is cut off by the rise of the voltage Vc10 or the voltage Vc11. The same configurations will be denoted by the same reference numerals and the description thereof will be omitted.

Here, the detection circuit 11 is an electric field capacitor C.
A resistor R31, a Zener diode ZD1, and a photodiode PD1 of the photocoupler PC1 connected in series at both ends of the photocoupler PC1 and a phototransistor PTr31 of the photocoupler PC1. In addition, the detection circuit 12
Is a resistor R32, a Zener diode ZD2, a transistor Tr connected in parallel to both ends of the electric field capacitor C11.
It consists of 32 serial connections.

Next, the operation will be briefly described. When Vc10 exceeds the Zener voltage of the Zener diode ZD1, the Zener diode ZD1 turns on and the photodiode PD
1, a current flows, the phototransistor PTr31 is turned on, and the relay Ry1 is turned off. Further, when the voltage Vc11 exceeds the Zener voltage of the Zener diode ZD2, the Zener diode ZD1 is turned on to turn on the transistor Tr3.
2 turns on and relay-Ry1 turns off. Relay-Ry1
When is turned off, the power supplied from the DC power source E to the inverter circuit 4 decreases due to the voltage drop of the resistor R33, so that the inverter circuit 4 starts weak oscillation and the inductance elements L1, L2, Ln Regenerative current is reduced.

As described above, the inductance elements L1, L2 and L are constructed by the constitutions shown in the second to fourth embodiments.
Since the regenerative current from n is reduced, even if at least one of the diode D2 and the diode D4 is opened as described above, the voltage across the electric field capacitors C10 and C11 rises only to the AC power supply Vs (max), and It is possible to prevent stress on the capacitors C10 and C11.

(Embodiment 5) A circuit diagram of a fifth embodiment according to the present invention is shown in FIG.

The difference from the first embodiment shown in FIG. 1 is that the DC power source E is a one-third partial smoothing circuit including electric field capacitors C10 to C12 and diodes D11 to D16.
That is, the relay is inserted between the DC power source E and the inverter circuit 4 while being constituted by using the 1/3 valley buried power source.
Ry2, a detection circuit 13 that detects the opening of the diodes D13 to D16 and outputs an H level signal, and a detection circuit 1.
The holding / driving circuit 14 which operates so as to open the relay Ry2 in response to the H level output of No. 3 is added, and the same components as those of the other first embodiment are designated by the same reference numerals. Therefore, the description is omitted.

With this configuration, even if at least one of the diodes D13 to D16 is opened, the power supply from the DC power source E to the inverter circuit 4 is cut off, so that the regeneration from the inductance elements L1, L2, Ln is performed. The current is reduced, the voltage across the electric field capacitors C10 to C12 rises only to the AC power supply Vs (max), and it is possible to prevent the electric field capacitors C10 to C12 from being stressed.

In all of the above embodiments, the inverter circuit 4 may be of the half bridge type as shown in FIG.
Other methods such as a full bridge method may be used. Further, although the regenerative current from the inductance elements L1, L2, and Ln is reduced by stopping the oscillation of the inverter circuit 4, the regenerative current may be reduced by controlling the load. . Further, the DC power source E smoothes m / m of the maximum value of the DC voltage obtained by rectifying the AC power source (n, m is a natural number, m <n), and m / n is a natural number, m. <N) A valley buried power supply may be used.

[0059]

According to the present invention, it is possible to provide a power supply device capable of improving the input power factor and preventing a large stress from being applied.

[Brief description of the drawings]

FIG. 1 is a circuit diagram showing a first embodiment according to the present invention.

FIG. 2 is a circuit diagram showing a second embodiment according to the present invention.

FIG. 3 is a circuit diagram showing a third embodiment according to the present invention.

FIG. 4 is a circuit diagram showing a fourth embodiment according to the present invention.

FIG. 5 is a circuit diagram showing a fifth embodiment according to the present invention.

FIG. 6 shows a circuit diagram of a half-bridge inverter circuit.

FIG. 7 is a circuit diagram showing a conventional example according to the present invention.

FIG. 8 is a circuit diagram showing a control circuit according to the conventional example.

FIG. 9 shows an operation waveform diagram according to the above conventional example.

FIG. 10 is a circuit diagram showing a partial smoothing circuit.

FIG. 11 shows an operation waveform diagram relating to the partial smoothing circuit.

[Explanation of symbols]

 4 Inverter circuit 9 Detection means C Capacitor DL Discharge lamp E DC power supply L Inductance element Q Switching element

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Kishimoto's direct view 1048 Kadoma, Kadoma City, Osaka Prefecture Matsushita Electric Works Co., Ltd.

Claims (9)

[Claims] 1. A DC power supply configured to partially smooth a DC voltage obtained by rectifying an AC power supply with a rectifier, and a DC power supply including a partial smoothing circuit including a plurality of electrolytic capacitors and a plurality of diodes, and a DC voltage output of the DC power supply. A power supply device comprising: an inverter circuit unit that converts the AC high-frequency voltage and supplies the load to a load, wherein the inverter circuit unit includes at least one switching element and one resonant circuit including at least an inductance element and a capacitor. In the power supply device including the switching element and the load via the resonance circuit, when the voltage across the output terminal of the DC power supply becomes a certain value or more, the inverter is detected and detected. A power supply device comprising a detection means for stopping oscillation of a circuit. 2. The detecting means according to claim 1, further comprising a detecting means for detecting the voltage across the electrolytic capacitor outside a certain range and stopping the oscillation of the inverter circuit. The power supply device according to claim 1. 3. In place of the detecting means according to claim 1, when the voltage across the output end of the DC power supply becomes a certain value or more, it is detected and the power supply from the DC power supply to the inverter circuit is cut off. The power supply device according to claim 1, further comprising: 4. A detecting means in place of the detecting means according to claim 1, which detects when the voltage across the electrolytic capacitor is out of a certain range and shuts off the power supply from the DC power supply to the inverter circuit. The power supply device according to claim 1, further comprising: 5. The detecting means in place of the detecting means according to claim 1, wherein when the voltage across the output terminal of the DC power source becomes a certain value or more, it is detected and the regenerative current from the inductance element is reduced. The power supply device according to claim 1, wherein the power supply device is provided. 6. The detecting means according to claim 1 is replaced with a detecting means for detecting when the voltage across the electrolytic capacitor is out of a certain range to reduce the regenerative current from the inductance element. The power supply device according to claim 1, wherein: 7. A regenerative current blocking means for blocking a regenerative current from the inductance element is provided between the inductance element and the DC power source in place of the detection means according to claim 1. The power supply device according to claim 1. 8. The partial smoothing circuit is configured such that m of n of a maximum value of a DC voltage obtained by rectifying the AC power source (n and m are natural numbers,
The power supply device according to any one of claims 1 to 7, wherein the power supply device is an n-valve m-filled power supply for smoothing m <n). 9. The power supply device according to claim 1, wherein the load is a discharge lamp.