JPH09199708A - Semiconductor-coupled single-electron tunneling device and fabrication method thereof - Google Patents

Abstract

(57) 【Abstract】 PROBLEM TO BE SOLVED: To control the electromagnetic field environment that greatly influences the characteristics of a small tunnel junction, and to obtain the ideal characteristics of a small tunnel junction in a superconducting state, Provided are a semiconductor-coupled single-electron tunneling device capable of removing the influence and a method for manufacturing the same. A first heterostructure semiconductor that generates a two-dimensional electron gas at a hetero interface, a minute tunnel junction that enables discrete tunneling of electrons by increasing charging energy, and a two-dimensional electron at a hetero interface. What is claimed is: 1. A semiconductor-coupled single-electron tunneling device in which at least one set or more of a second heterostructure semiconductor that generates gas is sequentially connected in series, the two-dimensional electron gas in the first and second heterostructure semiconductors. And a semiconductor-coupled single-electron tunneling device having a structure for coupling the above-mentioned minute tunnel junction and a method for manufacturing the same.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention produces a circuit element in which a two-dimensional electron gas (2DEG) formed at a semiconductor hetero interface and a minute tunnel junction which causes tunneling of each electron are combined to produce a two-dimensional electron. The present invention relates to a semiconductor-coupled single-electron tunneling element having a structure in which the electromagnetic field environment of a single-electron tunneling element can be freely controlled by adjusting the impedance of a gas region by adjusting a gate voltage, and a method for manufacturing the same.

[0002]

2. Description of the Related Art Due to recent advances in ultrafine processing technology, it has become possible to fabricate minute tunnel junctions having minute dimensions of several tens of nanometers (-10 to ⁸ m). Here, the minute tunnel junction is shown in FIG. The upper electrode 11 composed of two metal electrode thin films and the lower electrode 13 are separated by a tunnel barrier 12 made of an extremely thin insulator of several tens of liters, and electrons are used to separate this insulator (tunnel barrier) 12. Electric current flows by tunneling. This tunnel junction can be regarded as a capacitor because of its structure. Therefore, the junction capacitance C is expressed by the following equation (1). C = ε × S / d (Equation 1) where S is the junction area, d is the tunnel barrier thickness,
ε is a dielectric constant, which is a value specific to the tunnel barrier material. Then, the charging energy E _C of a single electron stored in the minute tunnel junction is expressed by the following equation (2). E _C = e ² / 2C ... (Equation 2) Therefore, according to (Equation 1) and (Equation 2), a small tunnel junction having a small junction area has a large value as shown in (Equation 3). It will have charging energy. E _C = e ² / 2ε × d / S (Equation 3) In a typical micro tunnel junction using aluminum as an electrode material, S = 10000 nm ² , d = 2n
m, ε = 1 × 10 to ¹⁰ , and the charging energy E _C is E
_C = 160 μeV. Converting this energy into temperature gives approximately 1.86K. Therefore, the tunneling of charges due to thermal excitation can be suppressed by setting the cryogenic environment (100 mK or less) using the dilution refrigerator. As shown in FIG. 2, when the ideal current source 23 is connected to the minute tunnel junction 21, polarization is gradually generated at the junction interface due to the injection of current, and the junction voltage increases. When this voltage exceeds a predetermined threshold voltage (V _th ), the number of electrons becomes 1
You can now tunnel, and after tunneling,
The voltage across the junction decreases, the voltage is charged up to V _th again, and the tunneling is repeated. Therefore, in the small tunnel junction, the electrons regularly tunnel one by one. This phenomenon is called SET (Single Electron Tunn)
eling) Called vibration. The threshold voltage (V _th ) is calculated by the following equation (4) considering that the energy change before and after the tunneling of electrons is preserved. V _th = e / 2C (Equation 4) The current-voltage characteristics of the minute tunnel junction are as shown in FIG. Generally, the threshold voltage (V _th ) is called an offset voltage 102. The characteristics of such a small tunnel junction are theoretically shown by Averin a in the mid-1980s.
Although analyzed by nd Likharev et al. [eg DV Av
erin and KKLokharev, J.Low Temp.Phys., 62,345 (198
6)], it was actually observed much later than that in a single micro-tunnel junction. The reason for this is that the microfabrication technology at the time was not sufficient from the viewpoint of device fabrication, but as an essential problem, in order to observe the phenomenon that occurs in the micro tunnel junction,
It was found that the influence from the external electromagnetic environment had to be removed [eg Yu.V.Nazarov, JETP Lett., 49,126 (198
9)]. In order to realize time-ordered electron tunneling such as SET oscillation, the minute tunnel element must be in a current bias state as shown in FIG. However, the capacitance of the device itself is very small [typically 0.5 fF (femto farad: F / 1
0 ¹⁵ )], the stray capacitance of the lead wire itself becomes larger, and even if an ideal current source is connected to the minute tunnel junction, the voltage is actually in a voltage bias state. Therefore, the voltage change before and after the electron tunneling disappears, and the electron tunneling becomes random. Also, the offset voltage becomes very small. Therefore, as a method to prevent the influence of stray capacitance,
It was considered to arrange a high impedance resistor in the vicinity of the element. In practice, methods using junction arrays [eg P. Delsing, KK Likharev, LSKuzmin, and T. Clae
Son, Phys. Rev. Lett., 63, 1180 (1989)] or a method of arranging a high resistance thin film such as Cr (chrome) [eg, LSKu
zmin and DBHaviland, Phys.Rev.Lett., 67,2890 (199
1)] etc. have been proposed. However, when a junction array is used, the external impedance becomes non-linear, making analysis difficult and designing an appropriate value is very difficult. Further, when the Cr thin film is used, the hot electron effect that occurs because the thin film itself has high impedance cannot be ignored. Therefore, it is difficult to obtain an ideal current bias state. As described above, unlike the conventional electronic device, it is necessary to design the micro tunnel junction including the external environment. Recently, further progress has been made in attempts to design an electromagnetic field environment suitable for the characteristics of the device (for example, T. Holst, D. Esteve,
C.Urbina, and MHDevoret, Phys.Rev.Lett., 73,3455 (19
94)]. In addition, micro-tunneling devices in the superconducting state have also been actively studied. In the superconducting microtunneling element, various phenomena occur because there are two types of electric charges for tunneling, a Cooper pair and a quasiparticle. Recently, in the superconducting SET transistor (FIG. 3), the periodical change of the current caused by the change of the gate voltage source 33 changes depending on the magnitude relationship between the superconducting energy gap (Δ) and the charging energy (E _C ). Have been found to be [e.g. KA Matveev, M. Gisselfa
lt, LIGlazman, M.Jonson, and RIShekhter, Phys.Rev.
Lett., 70, 2940 (1993)]. From such a theory, it is considered that an element that selectively tunnels quasi-electrons and Cooper pairs will be possible. However, in order to see the periodicity according to the superconducting energy gap (Δ) and the charging energy (E _C ), the quasi-electrons in the thermally excited state are removed and the entire system is in a thermal equilibrium state. Have to control. Therefore, it has been attempted to place a normal metal instead of a superconductor near the junction (for example, P. Joyez, P. Lafarge, A. Filipe, D. Esteve, and MHDe).
voret.Phys.Rev.Lett., 72, 2458 (1994)]. This normal metal has a function of relaxing the nonequilibrium quasiparticles in the superconductor. Removal of non-equilibrium quasiparticles is an important issue for observing Bloch oscillation, which is tunneling of Cooper pair with time correlation, although it is similar to SET oscillation. In order to observe Bloch oscillation, it is necessary for Cooper pair to move on the ground state band. Therefore, it is important not to give excessive energy to the Cooper pair. When the high resistance element is arranged in the vicinity of the junction, the electrons are heated to have large energy and easily move from the ground state to the band above it. For this reason, it has been pointed out that observation of Bloch oscillation is difficult.

[0003]

The object of the present invention is to control the electromagnetic field environment that greatly affects the characteristics of the micro tunnel junction, and to obtain the ideal characteristics of the micro tunnel junction in the superconducting state. It is another object of the present invention to provide a semiconductor-coupled single-electron tunneling device capable of removing the influence of non-equilibrium quasiparticles and a method of manufacturing the same.

[0004]

In order to achieve the above object of the present invention, the present invention is configured as described in the appended claims. That is, according to the present invention, as described in claim 1, the first heterostructure semiconductor that generates a two-dimensional electron gas at the hetero interface and the minute tunneling electron that can be discretely tunneled by increasing the charging energy. A semiconductor-coupled single-electron tunneling device in which at least one set of a tunnel junction and a second heterostructure semiconductor that generates a two-dimensional electron gas at a hetero interface are sequentially connected in series. The semiconductor-coupled single-electron tunneling device has a structure in which the two-dimensional electron gas in the heterostructure semiconductor of No. 2 and the minute tunnel junction are coupled. In this way, the electromagnetic field environment of the single-electron tunneling device can be artificially controlled by adopting a hybrid device configuration in which the minute tunnel junction and the two-dimensional electron gas formed at the semiconductor hetero interface are coupled. Therefore, the element characteristics can be freely controlled, and there is an effect that it can greatly contribute to the improvement of the accuracy of the single-electron tunneling element circuit design and the current standard. Further, according to the present invention, as described in claim 2, in the first aspect, in each of the first and second heterostructure semiconductors,
Alternatively, at least one gate electrode is added to either one of the above heterostructure semiconductors to form a semiconductor-coupled single-electron tunneling device having means for controlling the concentration of the two-dimensional electron gas. Thus, 2
By providing at least one gate electrode on top of the two-dimensional electron gas, the impedance of the two-dimensional electron gas region can be freely controlled by the gate voltage, and the two-dimensional electron gas is controlled by a plurality of gate electrodes. As a result, it becomes possible to create a spatial distribution of impedance, and it becomes possible to inject a current excluding the effect of excessive heating of electrons (hot electron effect) into the single electron tunneling element, and to improve the hot electron effect in the high resistance region. There is an effect that can be suppressed to the minimum. Further, according to the present invention, as described in claim 3, in claim 1, the first heterostructure semiconductor that generates a two-dimensional electron gas at the hetero interface and the discrete tunneling of electrons by increasing the charging energy. The first micro-tunneling junction that enables the above, the second heterostructure semiconductor that generates a two-dimensional electron gas at the hetero interface, and the second that enables the discrete tunneling of electrons by increasing the charging energy. A semiconductor-coupled single-electron tunneling device in which a minute tunnel junction and a third hetero-structure semiconductor that generates a two-dimensional electron gas at a hetero interface are sequentially connected in series, the first, second, and third A semiconductor-coupled single-electron tunneling device in which a two-dimensional electron gas in a heterostructure semiconductor is coupled to the first and second minute tunnel junctions A. In this way, it is possible to realize a double (plural) single-electron tunneling element in which two or more minute tunnel junctions are connected in series, and the same effect as in claim 1 is obtained. Further, the present invention provides the second heterostructure semiconductor according to claim 3, wherein the second heterostructure semiconductor has at least 1
This is a semiconductor-coupled single-electron tunneling device having means for controlling two-dimensional electron gas concentration by adding two gate electrodes. With such a configuration, for example, a resistance-coupling single-electron transistor having a structure in which the gate-controllable two-dimensional electron gas as described in claim 2 is coupled to the central electrode can be realized. In addition to the common effect of claim 1, the same effect as claim 2 is obtained. Further, as described in claim 5, the present invention provides the semiconductor-coupled single-electron tunneling element according to any one of claims 1 to 4, wherein the minute tunnel junction is made of a superconductor. With such a configuration, the resistance-coupling single-electron transistor that utilizes the quantum mechanical duality of the Cooper pair based on the charge-phase conjugation relationship that can be realized when the single-electron tunneling element becomes the superconducting state. The quantum Hall resistance due to the coexistence of the Josephson effect and Bloch oscillation can be observed. A two-dimensional electron gas having a gate electrode as described in claim 2 is arranged at both ends of the single-electron tunneling element, and a semiconductor-coupled single-electron tunneling element that Bloch oscillates in the superconducting state is formed. There is an effect that can be realized. According to a sixth aspect of the present invention, in the heterostructure semiconductor according to any one of the first to fifth aspects, a magnetic field generator is added, and a magnetic field generated by the magnetic field generator is applied to the heterostructure semiconductor. The two-dimensional electron gas is a semiconductor-coupled single-electron tunneling device that exhibits the quantum Hall effect. With such a configuration, there is an effect that a high magnetic field is applied to obtain an ideal current standard that can be realized when the electrons in the two-dimensional electron gas are in the quantum Hall state. The present invention also provides a method for manufacturing the semiconductor-coupled single-electron tunneling device according to any one of claims 1 to 6, as described in claim 7, comprising a two-dimensional electron gas (2DEG). ) On the reverse heterostructure substrate having an interface, the wiring extraction part is exposed by light and the minute tunnel junction contact part is exposed by electron beam to prepare a resist etching mask, which is processed into a groove by mesa etching, and the wiring extraction part is formed. A step of forming a minute tunnel junction contact portion and a minute tunnel junction forming portion, and applying an electron beam resist to both ends of the minute tunnel junction contact portion, that is, the minute tunnel junction and 2
The contact portion with the DEG and the contact portion with the 2DEG and the wiring are subjected to electron beam exposure to remove the resist, and a clean 2D is obtained by sputter etching with argon.
The step of taking out the EG interface and preventing the contamination of the 2DEG interface, and using the resist as it is, depositing a predetermined metal film on the contact portion between the minute tunnel junction and 2DEG and the contact portion between the 2DEG and the wiring and lift off. And a step of applying an electron beam resist to form an electrode portion and a wiring pattern up to the electrode by exposure, depositing a predetermined metal to form an electrode and a wiring metal film, and a micro tunnel junction. To form a cross-linking portion by electron beam exposure, develop each resist layer using two kinds of developers, and perform electron beam dose and developing solution. A step of forming an undercut portion having a predetermined shape in the lower resist layer by adjusting the type, concentration, and development time, and then, after depositing the lower electrode of the minute tunnel junction, Oxidizing the surface to form a tunnel barrier, then it is an method for manufacturing a semiconductor coupling single electron tunneling device comprising the step of depositing the upper electrode to produce a small tunnel junction. By using such a step, a clean 2DEG interface (for example, InAs layer) is taken out by argon sputter etching without causing a problem of contamination (dirt) at the interface of the contact portion between the 2DEG and the minute tunnel junction. After that, for example, while maintaining a vacuum, a metal such as gold is vapor-deposited so that the 2DEG interface does not come into contact with the atmosphere and the like, so that the excellent characteristics according to claim 1 to claim 6 are achieved. It is possible to manufacture a semiconductor-coupled single-electron tunneling element having a high yield. Here, the basic operation of the semiconductor-coupled single-electron tunneling device of the present invention will be described. The basic configuration of the device of the present invention is a combination of a two-dimensional electron gas formed at a semiconductor hetero interface and a small tunnel junction device formed by sandwiching a thin insulator layer between metal thin films and having a small area. Is. In such a structure, the tunneling property of charges passing through the small tunnel junction is determined by the impedance of the two-dimensional electron gas. The impedance of the two-dimensional electron gas can be controlled by changing the carrier concentration by applying a gate voltage.

[0005]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below in more detail with reference to the drawings. <First Embodiment> FIG. 5 is a perspective view showing a configuration of a semiconductor-coupled single-electron tunneling element exemplified in the present embodiment. In the figure, a molecular beam epitaxy (MB) is formed on an insulating substrate 55 made of indium phosphide (InP).
E) method is used to grow a semiconductor heterojunction 51 including an indium arsenide (InAs) layer that forms a two-dimensional electron gas, and a layer above the InAs layer is removed by etching to form a metal-2D electron gas contact portion 56. To do. For the insulating substrate 55, a material that becomes insulating due to carrier freezing at low temperature is used. In the case of semiconductor substrates,
The adverse effect of leakage current is considered. Lower metal electrode 5
2. Examples of the metal material that forms the metal upper electrode 53 include aluminum and niobium. The problem is the interface resistance between these metal electrodes and the two-dimensional electron gas. It has been reported that InAs can obtain an ohmic contact when it comes into contact with a metal, and since a Schottky barrier such as gallium arsenide (GaAs) is not formed, good conduction characteristics can be obtained. is there. Here, I grown on the InP substrate 68 as shown in FIG.
A reverse HEMT structure substrate with an nAs layer inserted is used. The element manufacturing process is as follows [Fig. 7 (a)-
(D) and FIGS. 8 (e) to 8 (g)]. (1) As shown in FIG. 7A, on the InP substrate 71,
MBE growth film (B) 73 and MBE growth film (A) 72
Using the InAs layer-inserted reverse HEMT structure substrate (see FIG. 6) in which the element was formed, a device outline is formed by light exposure and electron beam exposure. That is, as shown in FIG. 7B, the wiring lead-out portion 74 is exposed to light and the minute tunnel junction contact portion 75 is exposed to electron beam to form resist etching masks. Next, mesa etching is performed using citric acid to remove the MBE growth films (A) and (B) to form a groove. Central micro tunnel junction forming part 76
The groove had a width of 1.5 μm. Then, when the resist is peeled off, it becomes as shown in FIG. (2) As shown in FIG. 7C, the electron beam resist 77 is applied again, and the minute tunnel junction and the 2DEG contact portion 78 and the 2DEG and wiring contact portion 79 are exposed to the electron beam to remove the resist. The MBE growth film (A) 72 is etched with hydrochloric acid. Further, a clean InAs layer is taken out by sputter etching with argon. The portion 78 is for making contact with the minute tunnel junction and the two-dimensional electron gas (2DEG), and the area was 4 μm × 4 μm. The outer portion 79 is a contact portion for wiring up to the electrode pad, 10 μm × 2
It was formed to have a size of 0 μm. (3) Using the resist of FIG.
u) is vapor-deposited at 100 Å to form a gold vapor-deposited film 710 and lift-off is performed to obtain the shape shown in FIG. (4) A resist for light exposure is applied, the pattern for wiring to the electrode portion and the electrode is exposed, 2000 Å of gold is vapor deposited, and a gold vapor deposition film 81 for electrodes and wiring is formed [FIG.
(E)]. (5) Next, a two-layer resist, that is, an upper-layer resist (ZEP: manufactured by Zeon Corporation) for manufacturing a minute tunnel junction.
82 and a lower layer resist (PMGI: made by Japan McDermitt) 83 are formed. First, P as the lower layer resist 83
MGI is spin-coated and pre-baked, and then ZEP, which is the upper resist 82, is spin-coated and pre-baked again. At this time, the pre-baking temperature of the upper layer resist 82 is lower than that of the lower layer resist 83 by about 20 degrees. The thickness of the resist after prebaking is P of the lower layer resist 83.
MGI is 2000Å, ZEP of the upper resist 82 is 50
It was 0 °. Next, electron beam exposure is performed, and FIG.
As shown in, exposure is performed so that a crosslinked portion (width 0.1 μm) can be formed. After the exposure, use two kinds of developers,
Each resist layer is developed. At this time, an appropriate undercut can be formed in the PMGI layer which is the lower resist 83 by adjusting the dose of the electron beam, the type and concentration of the developing solution, and the developing time. The amount of undercut depends on the conditions of oblique vapor deposition when producing a minute tunnel junction, but at least 0.4 μm is necessary. (6) In order to manufacture the minute tunnel junction 84, aluminum (Al) is obliquely vapor-deposited to a thickness of 200 Å at an angle of +10 degrees from the normal to the surface perpendicular to the substrate. After evaporation, 1
Oxygen of 0 mTorr is introduced to oxidize the Al surface and form a tunnel barrier. Next, Al is obliquely vapor-deposited to a thickness of 400 Å at an angle of -10 degrees. The film thickness of the upper Al film (upper electrode) needs to be about twice the thickness of the lower Al film (lower electrode) in order to prevent cutting at the step. Finally, the two-layer resist is peeled off to complete the device of the present invention [FIG. 8 (g)]. In this process,
Contamination (dirt) at the interface of the contact portion 78 between the 2DEG and the minute tunnel junction becomes a problem.
For this purpose, a clean 2DEG interface (InAs layer) is removed using argon sputter etching, and then
Gold is vapor-deposited while maintaining the vacuum so that the 2DEG interface does not come into contact with the atmosphere or the like. Here, the two-dimensional electron gas of the InAs layer is used, but it is also possible to realize, for example, a MOS-FET structure using an inversion layer of silicon. By placing a normal metal region formed of a two-dimensional electron gas in the vicinity of the minute tunnel junction 84, excess quasi-particles can be removed from the junction electrode. Therefore, the behavior of the Cooper pair in the superconducting state can realize a thermal equilibrium state determined by the ground state band.

<Second Embodiment> FIG. 9 shows a semiconductor-coupled single-electron tunneling element having a structure controllable by a gate electrode as illustrated in the present embodiment. Gate electrode 92
It is possible to change the carrier concentration of the InAs layer by applying a negative voltage to, and it is possible to arbitrarily change (control) the resistance of the two-dimensional electron gas region of the InAs layer. Therefore, the IV characteristic of the element changes as shown in FIG. 10 due to the change of the gate voltage. That is, when the gate voltage is not applied, the resistance of the InAs layer region is low and no offset voltage is observed. However, when the gate voltage is applied, the resistance becomes a quantum resistance R _K (= h / e ² = 25.8k).
Ω), the offset voltage becomes clear.
Considering the load line 101 as shown by the broken line in the figure,
It can be seen that it works as a switching element. The equivalent circuit diagram is as shown in FIG. Further, the correlation between the tunneling electrons also changes due to the change in the gate voltage.
That is, when a large gate voltage is applied, the correlation between electrons becomes strong. FIG. 12 shows a schematic diagram of the semiconductor-coupled single-electron tunneling element in the present embodiment. Here, in order to reduce the stray capacitance in the two-dimensional electron gas,
The size of the contact portion between the minute tunnel junction and the heterostructure semiconductor (2DEG) was 4 μm square or less. This is because the stray capacitance of the two-dimensional electron gas (2DEG) needs to be at least equal to or less than the junction capacitance, and the distance from the junction to the two-dimensional electron gas needs to be 1 μm or less. is there. Here, the structure in which one heterojunction semiconductor has two gate electrodes is shown, but when the number of gate electrodes is one, only the gate 1 is used. As a manufacturing process, a process of forming a gate is added to the process shown in the first embodiment. After (4) of the process procedure of the first embodiment, a resist is applied and wet etching is performed to undercut the InAs layer so that the wiring of the gate electrode and the 2DEG layer do not come into contact with each other. Sequentially SiO or Si
Evaporating O ₂ to separate and flatten the elements,
It can be manufactured by vapor deposition of a gate electrode of Al or Au.

<Third Embodiment> In the second embodiment, the carrier concentration in the two-dimensional electron gas region is changed by a single gate voltage. However, as shown in FIG. Consider a structure in which the carrier concentration of the two-dimensional electron gas has a distribution by the gate voltage. With such a structure, the spatial distribution of impedance in the two-dimensional electron gas region can be controlled (variable) by the gate voltage, and impedance matching with the minute tunnel junction can be achieved under appropriate conditions. Therefore, it is possible to prevent the electron temperature from rising excessively, and it is possible to obtain an electron distribution in a thermal equilibrium state.

<Fourth Embodiment> As shown in FIG. 14, a two-dimensional electron gas 142 in which two minute tunnel junctions 141 are connected in series and a gate electrode is arranged at a central electrode
Resistively coupled single-electron transistor (resistively
coupled single electron transistor: Hereinafter, abbreviated as R-SET. )think of. Capacitively coupled single electron transistor, which is commonly used as shown in FIG.
tor: C-SET) controls the current by the charge Q _O induced in the gate electrode, whereas in R-SET, the current is controlled by the charge injected into the base. When the emitter 146 and the collector 147 are biased below the offset voltage, the output resistance becomes infinite due to Coulomb blockade unless current is injected from the base 148. Now, when the base current is injected, the Coulomb blockade is weakened, and the current flows from the emitter 146 to the collector 147. Here, assuming that the base current is I _b , the emitter current oscillates at the frequency f = I _b / e.
In R-SET, the output impedance is much larger than the input impedance, so that a large fan-out can be obtained. Conventionally, in manufacturing an R-SET, the gate resistance had to be strictly controlled, but in the case of this element, an appropriate gate resistance can be easily set by controlling the voltage applied to the 2DEG layer. It is possible.

<Fifth Embodiment> FIG. 15 shows a resistance-coupled single-electron transistor in which two micro tunnel junctions 151 are superconductors. In superconducting R-SET,
Various phenomena are expected. One is the realization of quantum resistance. A superconducting current flows by injecting a current from the base. This current is in a finite voltage state, so AC
It vibrates at the frequency f _J due to the Josephson effect.
On the other hand, the current flowing between the emitter and collector oscillates at f _B due to Coulomb interaction. Therefore, in such an element, the following equation (5) is obtained due to the locking of the Josephson effect and Bloch vibration. the _{nf J = n2e / hV = mI} / 2e = mf B ......... ( number 5) ∴R = V / I = (m / n) h / (2e) 2 = (m / n) R Q. Therefore, it can be seen that the IV characteristic of this element is quantized to a value that is a fractional multiple of the quantum resistance. In this way, one element can realize the voltage reference due to the Josephson effect, the current reference due to Bloch oscillation, and the three standards in the electromagnetism of quantum resistance. Next, consider the case where a voltage is applied to the base. By applying a voltage, the effective Josephson binding energy (E _J *) can be changed even when the base current is not flowing. There is a conjugate relationship [θ, Q] = 2ei between the charge at the central electrode and the phase difference of the junction, and the fluctuation of each variable depends on the ratio of (E _J / E _C ). The fluctuation of the electric charge is reduced by reducing (E _J *) by applying the voltage. Therefore, the value of the superconducting current can be controlled by the base voltage.

<Sixth Embodiment> Consider a case where a high magnetic field is applied to the equivalent circuit as shown in FIG. The quantum Hall state is realized by applying a high magnetic field. In such a situation, the electrons injected from the 2DEG 162 into the minute tunnel junction 161 become correlated with each other, and the tunneling of the electrons becomes very regular. Therefore, S
The noise of ET vibration and Bloch vibration is expected to be significantly reduced. Therefore, the current standard is more accurate than the conventional element.

<Seventh Embodiment> Equivalent as shown in FIG.
Two-dimensional electron gas 15 connected to an island in the circuit
Consider adding a gate voltage to 2. Apply gate voltage
Change the effective Josephson binding energy.
Can be obtained. That is, the gate voltage (negative voltage)
With the increase, the Josephson binding energy (E_J) Is reduced
Less. The behavior of the Cooper pair tunneling through the system is
Husson binding energy and charging energy (E _C) With
Depends on Josephson binding energy is charged
In the region larger than energy, the superconducting current, that is,
A coherent Cooper pair current flows, but Joseph
Cooper pair for a fixed time with decreasing binding energy
You will be tunneling everywhere. Therefore, Joseph
Ratio of binding energy to charging energy, E_J/ E
_CGives the coherence and localization of the wave function of the Cooper pair.
Will decide. In addition, effective Josephson coupling
Changing the energy changes the energy gap Δ
That led to the theory of parity [eg K.A. Matvee
v, M.Gisselfalt, L.I.Glazman, M.Jonson, and R.I.Shekht
er, Phys, Rev. Lett., 70, 2940 (1993). ]]
(Δ) and (E_C) And the size of
The particles can be selectively tunneled. did
Therefore, in the element of FIG. 15, the two-dimensional electron gas 152 is added.
Gate voltage to obtain quasiparticles and Cooper pairs selectively.
It operates as a device for making a tunnel. This is in a sense
Considered as a device utilizing quantum mechanical duality of phase / charge
be able to.

[0012]

As described in detail above, the semiconductor-coupled single-electron tunneling device of the present invention is obtained by combining a single-electron tunneling device and a two-dimensional electron gas.
It is possible to artificially control the electromagnetic field environment of a single electron tunneling element. The characteristics of single-electron tunneling devices are greatly influenced by the electromagnetic field environment. Therefore, it becomes possible to freely control the element characteristics by controlling the electromagnetic field environment of the present invention, and there is an effect that it can greatly contribute to the single electron tunneling element circuit design and the accuracy improvement of the current standard.

[Brief description of drawings]

FIG. 1 is a schematic view showing a structure of a micro tunnel junction.

FIG. 2 is an equivalent circuit diagram of a minute tunnel junction.

FIG. 3 Capacitively coupled single electron transistor (R-SET)
FIG.

FIG. 4 is an illustration of charge transport in a single electron transistor.

FIG. 5 is a perspective view showing the configuration of the semiconductor-coupled single-electron tunneling device illustrated in the first embodiment of the invention.

FIG. 6 shows InAs exemplified in the first embodiment of the present invention.
The schematic diagram which shows the structure of a layer insertion reverse HEMT structure board | substrate.

7A to 7C are process diagrams showing a manufacturing process of the semiconductor-coupled single-electron tunneling element exemplified in the first embodiment of the invention.

FIG. 8 is a process diagram showing a process for manufacturing the semiconductor-coupled single-electron tunneling device exemplified in the first embodiment of the invention. Schematic diagram of a semiconductor-coupled single-electron tunneling device with a gate.

FIG. 9 is a schematic diagram showing the structure of a semiconductor-coupled single-electron tunneling device with a gate, which is exemplified in the second embodiment of the invention.

FIG. 10 is a current-voltage characteristic diagram of the semiconductor-coupled single-electron tunneling element with a gate exemplified in the second embodiment of the invention.

FIG. 11 is an equivalent circuit diagram of a semiconductor-coupled single-electron tunneling device having a gate-controllable two-dimensional electron gas exemplified in the second embodiment of the invention. A bird's-eye view of a semiconductor-coupled single-electron tunneling device.

FIG. 12 is a schematic diagram showing the configuration of a semiconductor-coupled single-electron tunneling device having a gate-controllable two-dimensional electron gas exemplified in the second embodiment of the invention.

FIG. 13 is an equivalent circuit diagram of a semiconductor-coupled single-electron tunneling element in which the variable gate impedance illustrated in the third embodiment of the present invention is arranged at both ends. Resistive coupling single electron transistor (R-SE with variable gate impedance)
The equivalent circuit diagram of T).

FIG. 14 is an equivalent circuit diagram of a resistance-coupled single-electron transistor (R-SET) having gate variable impedance illustrated in the fourth embodiment of the present invention.

FIG. 15 is an equivalent circuit diagram in a superconducting state of a resistance-coupled single-electron transistor (R-SET) having gate variable impedance illustrated in the fifth and seventh embodiments of the invention.

FIG. 16 is an equivalent circuit diagram of a capacitively coupled single electron transistor (C-SET) having gate variable impedance illustrated in the sixth embodiment of the present invention.

[Explanation of symbols]

11 ... Upper electrode 12 ... Tunnel barrier 13 ... Lower electrode 14 ... Substrate 21 ... Micro tunnel junction 22 ... External shunt resistance 23 ... Current source 31 ... Micro tunnel junction 32 ... Gate capacitance 33 ... Gate voltage source 34 ... Voltage source (+) 35 ... Voltage source (-) 41 ... Left lead wire 42 ... Right lead wire 43 ... Central electrode 51 ... Semiconductor heterojunction 52 ... Metal lower electrode 53 ... Metal upper electrode 54 ... Tunnel barrier 55 ... Insulating substrate 56 ... Metal and 2 Dimensional contact part with electron gas 61 ... ud-InAlAs (200Å) 62 ... ud-InGaAs (135Å) 63 ... ud-InAs (40Å ・ 2DEG layer) 64 ... ud-InGaAs (25Å) 65 ... ud-InAlAs (60Å) 66 ... n + InAlAs (70Å) 67 ... ud-InAlAs (2000Å) 68 ... InP substrate 9 ... MBE growth film (A) 610 ... MBE growth film (B) 71 ... InP substrate 72 ... MBE growth film (A) 73 ... MBE growth film (B) 74 ... Wiring extraction part 75 ... Micro tunnel junction contact part 76 ... Minute tunnel junction forming part 77 ... Electron beam resist 78 ... Contact part between minute tunnel junction and 2DEG 79 ... Contact part between 2DEG and wiring 710 ... Gold evaporated film 81 ... Gold evaporated film for electrodes and wiring 82 ... Upper layer resist (ZEP : Made by Zeon Corporation 83 ... Lower layer resist (PMGI: Made by Japan MacDermid) 84 ... Micro tunnel junction 91 ... Micro tunnel junction 92 ... Gate electrode 93 ... MBE growth film (A) 94 ... MBE growth film (B) 95 ... InP substrate 96 ... Upper electrode 97 ... Lower electrode 101 ... Load line 102 ... Offset voltage 111 ... Gate control in Dance 112 ... Micro tunnel junction 113 ... Voltage source 131 ... Gate variable impedance 132 ... Micro tunnel junction 133 ... Voltage source 141 ... Micro tunnel junction 142 ... Two-dimensional electron gas 143 ... Gate voltage source 144 ... Voltage source (+) 145 ... Voltage Source (-) 146 ... Emitter 147 ... Collector 148 ... Base 151 ... Micro tunnel junction 152 ... Two-dimensional electron gas 153 ... Gate voltage source 154 ... Voltage source (+) 155 ... Voltage source (-) 161 ... Micro tunnel junction 162 ... Two-dimensional electron gas 163 ... Gate capacitor 164 ... Voltage source (+) 165 ... Gate voltage source 166 ... Voltage source (-) C ... Junction capacitance _RN ... Tunnel resistance _RS ... Shunt resistance R ... Tunnel resistance _RK ... Quantum resistance

Claims (7)

[Claims] 1. A first heterostructure semiconductor that generates a two-dimensional electron gas at a hetero interface, a minute tunnel junction that enables discrete tunneling of electrons by increasing charging energy, and a two-dimensional hetero interface. What is claimed is: 1. A semiconductor-coupled single-electron tunneling device in which at least one set or more of a second heterostructure semiconductor that generates an electron gas is sequentially connected in series, and two-dimensional electrons in the first and second heterostructure semiconductors. A semiconductor-coupled single-electron tunneling device having a structure in which a gas and the above-mentioned minute tunnel junction are coupled. 2. The method according to claim 1, wherein at least one gate electrode is added to each of the first and second heterostructure semiconductors or to one of the heterostructure semiconductors, whereby a two-dimensional electron gas A semiconductor-coupled single-electron tunneling device comprising means for controlling concentration. 3. The first heterostructure semiconductor according to claim 1, which generates a two-dimensional electron gas at the hetero interface, and the first minute tunnel which enables discrete tunneling of electrons by increasing charging energy. A junction, a second heterostructure semiconductor that generates a two-dimensional electron gas at the heterointerface, a second microtunnel junction that enables discrete tunneling of electrons by increasing the charging energy, and a second heterojunction at the heterointerface. A semiconductor-coupled single-electron tunneling device in which a third heterostructure semiconductor that generates a three-dimensional electron gas is sequentially connected in series, and the two-dimensional electron gas in the first, second, and third heterostructure semiconductors is used. A semiconductor-coupled single-electron tunneling device having a structure for coupling the first and second minute tunnel junctions. 4. The single semiconductor-bonded single structure according to claim 3, further comprising means for adding at least one gate electrode to the second heterostructure semiconductor, thereby controlling the concentration of the two-dimensional electron gas. Electronic tunneling device. 5. A semiconductor-coupled single-electron tunneling device according to claim 1, wherein the minute tunnel junction is made of a superconductor. 6. A magnetic field generator according to any one of claims 1 to 5, wherein a two-dimensional electron gas in the heterostructure semiconductor has a quantum Hall effect by a magnetic field generated by the magnetic field generator. A semiconductor-coupled single-electron tunneling device having the structure shown. 7. A method of manufacturing a semiconductor-coupled single-electron tunneling device according to claim 1, wherein the hetero-heterostructure substrate has a two-dimensional electron gas (2DEG) interface. In addition, the wiring extraction portion is exposed by light, and the minute tunnel junction contact portion is exposed by electron beam to form a resist etching mask, which is processed into a groove shape by mesa etching.
A step of forming a wiring take-out portion, a minute tunnel junction contact portion, and a minute tunnel junction formation portion, and applying an electron beam resist to both ends of the minute tunnel junction contact portion, that is, a contact portion between the minute tunnel junction and 2DEG and 2DEG The contact portion between the wiring and the wiring is exposed to an electron beam to remove the resist, and a clean 2DEG interface is taken out by sputter etching with argon to prevent contamination of the 2DEG interface. Tunnel junction and 2DE
A step of depositing a predetermined metal film on the contact portion with G and the contact portion with 2DEG to perform lift-off, and applying an electron beam resist to form an electrode portion and a wiring pattern up to the electrode by exposure. , A step of depositing a predetermined metal to form a metal film for electrodes and wiring, and applying a two-layer resist for producing a minute tunnel junction, forming a bridge portion by electron beam exposure, and developing two types of Each resist layer is developed using a liquid, and a step of forming an undercut portion having a predetermined shape in the lower resist layer by adjusting the dose of electron beam, the type and concentration of the developing solution, and the developing time, In addition, after depositing the lower electrode of the micro tunnel junction, the surface is oxidized to form a tunnel barrier, and then the upper electrode is vapor deposited to form the micro tunnel junction. The method for manufacturing a semiconductor coupling single electron tunneling element.