JPH09218425A - Liquid crystal display device and method of manufacturing the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To shut off the light falling onto polycrystalline silicon which is an active layer for forming polycrystalline silicon thin-film transistors (TFTs) of a liquid crystal display element and to shut off the light leaking from clearances and to prevent the degradation in display performance at a low cost without lowering the opening rate as a display device. SOLUTION: This liquid crystal display device has pixel electrodes 8 which are arranged in a matrix form on a transparent insulating substrate 18 and drive liquid crystals, the polycrystalline silicon TFTs 6 which are formed on the active layers 21 disposed in correspondence to each of the pixel electrodes 8 in order to impress voltage on the pixel electrodes 8 and amorphous silicon films 19 which are arranged via insulating films 20 under the active layers 21. As a result, the light falling on the active layers 21 are shut off and the light leaking from the clearances is shut off by the amorphous silicon films 19.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device and a manufacturing method thereof, and more particularly to a liquid crystal display device having a structure of an array substrate on which polycrystalline silicon thin film transistors are arranged and a manufacturing method thereof.

[0002]

2. Description of the Related Art In the following description, OD (optical density value) is defined as follows. OD ₁ is a logarithm whose base is the reciprocal of the transmittance for each wavelength of light. OD ₂ is obtained by replacing the transmittance shown in OD ₁ with the average of the transmittance in the visible light region. OD ₃ is obtained by replacing the transmittance appearing in OD ₁ with a value obtained by multiplying the weight of the relative luminous efficiency value of the transmittance and averaging it in the visible light region.

(Equation 3)

In recent years, liquid crystal display devices are thin, have low power consumption,
The demand for high-quality image display devices has been increased, and the technological progress has been remarkable.

FIG. 14 is a schematic view of such a general liquid crystal display device, and particularly illustrates an active matrix type structure. As shown in FIG. 14, the scanning lines 1 and the signal lines 2 are arranged in a matrix on an array substrate (not shown). Then, the thin film transistor 6 is arranged near each intersection. The gate electrode 3 of the thin film transistor 6 is connected to the scanning line 1, and the source electrode 4 is connected to the signal line 2. On the other hand, the drain electrode 5 of the thin film transistor 6 is connected to the auxiliary capacitance 7 and the pixel electrode 8. By the way, the pixel electrode 8 is a transparent electrode,
It is arranged to drive a liquid crystal (not shown).

The scanning line 1 is selectively driven by the Y driver, and the signal line 2 is selectively driven by the X driver.

In the configuration as described above, the scanning line 1
When a voltage is applied to the gate electrode 3 of the thin film transistor 6 connected to the source electrode and also to the source of the thin film transistor 6 connected to the signal line 2, the source electrode 4
A current flows between the drain electrode 5 and the drain electrode 5, the potentials of the auxiliary capacitance 7 and the pixel electrode 8 become equal to the signal potential, and a voltage is applied to the liquid crystal. As a result, a desired display is performed on the pixel corresponding to the liquid crystal on the matrix.

Recently, as a thin film transistor for driving a liquid crystal, a transistor whose active layer is made of polycrystalline silicon has attracted attention. Since this polycrystalline silicon thin film transistor has high mobility and a drive circuit can be incorporated on the substrate, it has an optimal structure for a liquid crystal display device.

On the other hand, the sectional view of FIG. 15 is a sectional view of a general liquid crystal display device. As shown in FIG. 15, the liquid crystal 13 is injected and arranged between the counter substrate 11 and the array substrate 12. The counter electrode 10 is arranged on the surface of the counter substrate 11 facing the liquid crystal 13, and the liquid crystal 1 of the array substrate 12 is arranged.
The thin film transistor 6 is arranged on the surface facing the element 3.
The counter electrode 10 of the counter substrate 11 and the color filter 9 are laminated and arranged. The incident side polarization plate 14 and the emission side polarization plate 15 are arranged so as to sandwich the cell configured as described above. Then, a backlight 16 is installed outside the incident side polarization plate 14.

FIG. 16 is a sectional view showing another example of a general liquid crystal display device. The difference from the configuration of FIG. 15 is that the array substrate 12 on which the thin film transistors 6 are arranged is arranged on the emitting side and the counter substrate 11 is arranged on the incident side, and the basic operation is the same.

In the liquid crystal display device having the above structure, the light emitted from the backlight 16 is guided to the cell through the incident side polarization plate 14, and the liquid crystal 13 driven by the thin film transistor 6 corresponds to the display pattern. Modulates the light,
Display is output by emitting light through the emitting side polarization plate 15.

By the way, in a liquid crystal display element using an amorphous silicon thin film transistor or a polycrystalline silicon thin film transistor, light leaking from a gap between a wiring and a display electrode in a portion other than the display region on the array substrate 12 causes There is a problem that the black display cannot be clearly displayed and the display performance is deteriorated.

As means for solving such a problem, conventionally, as a light-shielding film, a method of arranging an acrylic resin mixed with metal such as chromium oxide or carbon on the counter substrate 11 or the array substrate 12 is used. On the other hand, there is known a method in which a red, blue, and green pigments are mixed in acrylic resin, and a coating type photosensitive resist is arranged.

On the other hand, when the top gate type is considered as the thin film transistor 6, the light incident from the array substrate 12 side hits the active layer, and the gate electrode 3 of the thin film transistor 6 which is a pixel transistor is in the off state. However, there is also a problem that a light leak current flows between the source electrode 4 and the drain electrode 5, the potential of the liquid crystal capacitance changes, and the display performance deteriorates.

In order to solve this, there is also a method of disposing a light shielding film on the array substrate 12 and below the active layer. It is desirable that the light-shielding film has a high resistance and can withstand the temperature required for forming the thin film transistor 6. As such an example, a technique disclosed in Japanese Patent Publication No. 2-12031 is known. This is a method of placing an amorphous silicon film under the active layer of an amorphous silicon thin film transistor.

[0015]

Since the conventional liquid crystal display device is constructed as described above, it has the following problems.

In the case of the light shielding film arranged on the counter substrate 11,
In order to prevent misalignment with the array substrate 12, it is necessary to widen the area of the light shielding film to the extent that it covers the display region, and as a result, there is a problem that the aperture ratio becomes small.

The backlight 1 is provided on the array substrate 12 side.
In the case of the structure in which 6 is arranged and observed from the counter substrate 11 side, that is, in the structure of FIG. 15, when a light shielding film of metal such as chromium oxide is placed on the counter substrate 11, light is reflected from the metal and displayed. There is a problem that it affects performance.

On the other hand, in the case of the structure in which the backlight 16 is arranged on the counter substrate 11 side and the array substrate 12 is observed, that is, in the structure of FIG. 16, the thin film transistor 6 arranged on the array substrate 12 is arranged. Similarly, if the gate electrode 3 is made of metal, the deterioration of the display performance due to the reflection of light cannot be avoided.

On the other hand, when a light-shielding film is arranged on the array substrate 12, a conductive light-shielding material cannot be used,
Currently, only acrylic resin mixed with red, blue, and green pigments can be used. However, in order to prevent light leakage from the gap between the wiring and the display electrode, the optical density OD ₃ value needs to be at least 2.0 or more, and for that purpose, the film thickness is 1.5 to 2 It must be set to 0.0 μm.

Further, in order to prevent light leakage of the amorphous silicon thin film transistor, when the amorphous silicon film is used as the underlying light shielding film, the thickness of 1 μm or more is required by the inventors. Confirmed by experiments.
Therefore, if another film such as the gate insulating film or the gate electrode 3 is laminated on the amorphous silicon film, the problem of poor coverage occurs. In order to avoid such a problem, the film thickness is required to be several 1000 angstroms, preferably 1000 angstroms or less. Further, since it is arranged separately from the film for preventing light leakage, there arises a problem that the number of steps is increased.

The present invention solves the problems of the prior art as described above, makes it possible to block the light that strikes the active layer polycrystalline silicon, and also block the light leaking from the gap, An object of the present invention is to realize a liquid crystal display device capable of preventing a reduction in display performance at low cost without reducing an aperture ratio.

[0022]

In order to achieve the above object, a first electrode substrate having a plurality of polycrystalline silicon thin film transistors, a second electrode substrate having a counter electrode,
A liquid crystal inserted between the first and second electrode substrates, wherein the first electrode substrate is provided with a scanning line and a signal line arranged in a matrix on a transparent insulating substrate; A plurality of pixel electrodes provided at each intersection of the signal lines, a plurality of polycrystalline silicon thin film transistors in which a gate electrode is connected to the scanning line, a source electrode is connected to the signal line, and a drain electrode is connected to the pixel electrode. And a thin film transistor formed on the transparent substrate via an amorphous semiconductor film and an insulating film.

Further, according to the present invention, an amorphous semiconductor film, an insulating film and an amorphous silicon film are formed on an insulating substrate, and the amorphous silicon film alone is converted into a polycrystalline silicon film by laser irradiation. The present invention provides a method for manufacturing a liquid crystal display device, which uses a polycrystalline silicon film as an active layer of a thin film transistor.

[0024]

BEST MODE FOR CARRYING OUT THE INVENTION In the present invention, an amorphous semiconductor film, a polycrystalline silicon film and an amorphous semiconductor film are formed on the array substrate 12 and below the active layer of a top gate type polycrystalline silicon thin film transistor. One feature is that an insulating film for insulation is provided. Amorphous semiconductors are not only easier to form than the black matrix materials described above in the section of the prior art, but also can be deposited.
There is an advantage that it can withstand a process of about 600 ° C. Further, the electric conductivity of the amorphous semiconductor is 10 ⁻⁶ (Ωcm) ⁻¹ or less, and it is a material of a level having no problem in using it in an array substrate even in terms of electric conductivity.

Specific examples of the amorphous semiconductor film that can be used as the light-shielding film include a silicon film formed by a reactive sputtering method using oxygen or nitrogen gas, a germanium cermet (GeSiNO) film, an amorphous silicon film, and the like. can give. These amorphous semiconductors have a larger absorption coefficient for visible light than polycrystalline silicon or single crystal silicon. According to the experiments conducted by the present inventors, in the case of a transistor in which the active layer is polycrystalline silicon, it is assumed that the thickness of the transistor can be practically provided below the active layer, and the light leakage current is reduced in display performance. It can be used as a light-shielding film (OD ₂ needs to be 1 or more) to suppress to a problem-free level. In a liquid crystal display device having a display screen with a brightness of 200 nit, the film thickness required to suppress the light leakage current of a polycrystalline silicon thin film transistor to a level at which there is no problem in display performance, that is, OD ₂ is 1
To achieve the above, 5000 angstrom, 5000 angstrom, and 1000 angstrom, respectively.
It is about Angstrom. In particular, by providing these in the same pattern as the active layer, the active layer, the insulating film, and the amorphous semiconductor film can be etched at the same time, and they can be arranged without increasing the number of steps. In particular, the dehydrated amorphous silicon has a larger absorption coefficient for visible light. The film thickness of the amorphous silicon film is 4000 Å, and OD ₃ is 2 or more. In addition, Japanese Patent Publication 2-12
According to 031 publication, the absorption coefficient of amorphous silicon doped with argon is also large, and the data shows that the film thickness is 25
With an optical density of 00 Å, an optical density OD ₃ of 2 or more can be achieved for light in the visible light region. If this level of optical density can be achieved, that is, optical density OD ₃
If 2 or more can be realized, it can be used not only as a light-shielding film for suppressing a light leak current, but also as a film for preventing light from leaking from a gap between a wiring and a display electrode.

However, the amorphous silicon film has a large transmittance on the red wavelength side. Therefore, red light may leak and the screen may appear reddish. In that case, if a blue filter is further provided in a gap other than the pixel display portion, light leakage can be prevented. In recent years, a technique of forming a color filter on an array substrate has been developed, and if the blue filter is formed at the same time as the color filter of the pixel display section, it is not necessary to increase the number of steps.

As described above, in the liquid crystal display device using the polycrystal silicon thin film transistor, by providing the insulating film and the amorphous silicon film on the array substrate and under the active layer, the parts other than the pixel display portion are provided. By blocking both the light leaking from the gap in the portion and the light that enters from the array substrate side and hits the active layer and causes a leak current, it is possible to prevent the above-mentioned problem of deterioration in display performance. .

Further, as a measure for preventing light leakage on the array substrate which realizes a high aperture ratio, a pixel transparent electrode is formed on the upper layer of the matrix wiring so as to overlap the matrix wiring, thereby forming the thin film transistor. A liquid crystal display device has been developed in which light is prevented from passing through a gap between the matrix wiring and the pixel electrode. In this liquid crystal display device, it is not necessary to form a film for preventing light leakage, but it is necessary to provide a light shielding film having an OD ₂ value of 1 or more for preventing a light leak current. By providing the insulating film and the amorphous semiconductor film in the same pattern as the active layer, it is possible to prevent light leakage current without increasing the number of manufacturing steps.

As described above, according to the present invention, a practical light-preventing film on an array substrate, in which problems such as misalignment, film thickness, and the number of steps are solved, is proposed. If the light from the backlight is applied from the array substrate side and the light is viewed from the counter substrate side, the problem of light reflection by the metal does not occur.

That is, in the liquid crystal display device of the present invention, by providing the insulating film and the amorphous silicon film under the active layer of the array substrate, light leaking from the gaps other than the pixel display portion and the array can be obtained. Incident from the substrate side,
It blocks the light that hits the active layer and causes leakage current,
This is intended to prevent deterioration of display performance.

As described above, according to the present invention, in a liquid crystal display device using a polycrystalline silicon thin film transistor, light leakage current caused by light incident from the array substrate side and striking the active layer, and the light leakage current on the array substrate. It is intended to prevent the deterioration of the display performance caused by the light leaking from the gap in the portion other than the pixel display portion.

In order to achieve the above-mentioned object, according to the present invention, an amorphous semiconductor film is provided under an active layer of a polycrystalline silicon thin film transistor on an array substrate via an insulating film. The light that strikes the active layer, polycrystalline silicon, is blocked (see FIGS. 1 and 1).
1). Further, according to the present invention, an insulating film and an amorphous film are provided under the active layer film of the polycrystalline silicon thin film transistor on the array substrate, except for the pixel display portion, so that the light that hits the polycrystalline silicon which is the active layer is exposed. And the light leaking from the gap can be blocked (FIGS. 3 to 8).

Embodiments of the present invention will be described below with reference to the drawings. (Example 1) Each of the following films, namely, an amorphous silicon film having a film thickness of 1000 angstroms, a silicon film formed by a reactive sputtering method using oxygen or nitrogen gas having a film thickness of 5000 angstroms, and a film thickness of 5000 angstroms All of the germanium cermet (GeSiNO) films can achieve an OD ₂ value of 1 or more.
With each of the above film thicknesses, the value of OD ₃ is 2 or less, and it is not possible to block the light leaking from the gaps in the pixel display region.
However, it can be used as a light-shielding film that suppresses the leak current of the thin film transistor.

Focusing on this point, in Example 1, by providing the above-mentioned amorphous semiconductor below the polycrystalline silicon thin film transistor via the insulating film under the active layer, deterioration of pixel display is prevented. FIG. 9 is a plan view of a pixel portion capable of preventing generation of a light leak current that causes the light leak current, FIG. 1 is a cross-sectional view taken along line B-C in FIG. 9, and a pattern of a light shielding film. Will be described in detail with reference to FIG.

The pixel thin film transistor is an n-type polycrystalline silicon thin film transistor, and only the pixel portion is illustrated and described.

On the glass substrate 18 on which the undercoat film 26 is formed, the amorphous semiconductor film 19 serving as a light-shielding film, the insulating film 20, and the amorphous silicon film serving as the active layer 21 are formed on the glass substrate 18.
E-CVD (plasma chemical vapor deposition)
Method is used to continuously form a film in a vacuum.

After that, heat treatment is performed at 500 ° C. to remove hydrogen existing in the amorphous semiconductor film 19, the insulating film 20 and the active layer 21. Here, as described above, the amorphous semiconductor film 19 serving as the light-shielding film has a thickness of 1000 angstroms as the insulating film and the amorphous silicon film as the active layer has a thickness of It will be 500 Å.

Next, the amorphous silicon film to be the active layer 21 is polycrystallized by ELA (excimer laser annealing). The irradiation power of the laser is 150
~ 400 mJ / cm ² . With the power in this range, the amorphous silicon film on the insulating film can be polycrystallized without causing ablation, and the insulating film 2
It does not affect the amorphous semiconductor film 19 under 0. (The same laser power is used in Examples 2 to 5 described below.) Next, the polycrystalline silicon film (21) and the silicon nitride film (2
0), three layers of amorphous semiconductor (19), CDE (chemical dry etching) using a mixed gas of CF ₄ and O _2.
Process continuously. As a result, an island-like shape is obtained as shown in plan view in FIG.

Next, by AP (normal temperature heat) -CVD method,
An oxide film to be the gate insulating film 22 is formed by 1000 angstrom. After that, the gate electrode 3, the auxiliary capacitance electrode 7, and MoW (molybdenum tungsten alloy) to be the scanning line 2 shown in FIG.
It is processed using the CDE method. The film thickness of MoW is 25
00 angstrom.

Next, PH3 serving as a donor is implanted by using the ion doping method. The injection conditions are acceleration voltage 70
KeV, dose amount 1E16 / cm ² . Here, since the gate electrode 3 serves as a self-alignment mask, the active layer 21 immediately below the gate electrode 3 is not implanted with impurities.

Next, the interlayer insulating film 23 is formed at a film forming temperature of 400 ° C.
To form a film. At this time, the impurities are activated and the drain region 4 and the source region 5 (FIG. 9) of the thin film transistor are formed. The interlayer insulating film 23 is an oxide film and has a film thickness of 5000 angstrom.

Next, after opening the contact hole CH, an ITO film to be the pixel electrode 8 is formed by a sputtering method and processed by a wet method. Then, the signal line 1 having a two-layer structure of Mo (lower layer) and Al (upper layer), the wiring 25 connecting the active layer and the pixel electrode shown in FIG. 9, and the wiring 24 connecting the thin film transistor and the signal line are sputtered. After the film is formed by using the method, it is processed by using the wet method.
In addition, as for the film thickness formed as described above, the Mo film has a thickness of 150.
0 angstrom, Al film is 4500 angstrom.

Next, the protective film 29 of the array is PE-CVD.
After forming the film by the method, a contact hole (not shown) for connecting an external terminal is opened. The protective film is a silicon nitride film and has a film thickness of 2000 angstrom.

Finally, in order to block light leaking from the gaps in the pixel area display region, the light shielding film 27 is formed using a photosensitive organic material having OD ₃ of 2 or more. Here, the light shielding film 2
As shown in FIG. 10, the plane pattern 7 is a pattern in which the pixel display area 17 is omitted. The plane pattern of the light-shielding film for preventing the light that hits the active layer is the same as that of the active layer, and is as shown in FIG.

The first embodiment is characterized in that the film for suppressing the light leak current of the thin film transistor and the film for blocking the light leaking from the gap in the display area of the pixel portion are formed independently. In the former, the number of steps is minimized because the film is formed and processed simultaneously with the active layer. Further, since the latter is formed in the final step of the array, it is not necessary to impose any restrictions on the thin film transistor process. Further, since the light-shielding film is formed on the array side, the line-width of the light-shielding film only needs to consider the alignment accuracy at the time of exposure, and it is not necessary to consider the alignment accuracy with the counter substrate. Therefore, the aperture ratio can be increased. (Embodiment 2) In Embodiment 2, it is possible to prevent two lights, that is, light which is incident from the array substrate side and hits the active layer to cause a leak current, and light which leaks from a gap other than the pixel display portion. That is, FIG. 9 is a plan view of a pixel portion having an amorphous semiconductor (amorphous silicon film) having OD ₃ of 2 or more in the lower layer of a polycrystalline silicon thin film transistor.
3 is a cross-sectional view taken along line A-C in FIG. 9, FIG. 4 is a cross-sectional view taken along line B-C in FIG. 9, and the plane pattern of the light-shielding film and the pixel display region are shown. This will be described with reference to FIG.

In each figure, the same members are designated by the same reference numerals as those in the first embodiment. The description of the same process part is omitted.

An amorphous silicon thin film (amorphous semiconductor film) 1 is formed on the glass substrate 18 on which the undercoat film 26 is formed.
9 is formed by the PE-CVD method. The film thickness is 4000 angstrom which can achieve OD ₃ of 2 or more.
Next, it is processed into a shape having a portion other than the pixel display area 17 shown in FIG. 10 by the CDE method.

Next, an oxide film 20 for insulating the light shielding film layer 19 and the active layer 21 is formed by using the AP-CVD method. The film forming temperature is 400 ° C. and the film thickness is 4000 angstrom.

Next, an amorphous silicon thin film (active layer) 21 to be an active layer is formed by PE-CVD method, and then 5
Heat treatment is performed at 00 ° C. to remove hydrogen existing in the light shielding film 19 and the amorphous silicon thin film 21.

Next, after the amorphous silicon thin film 21 is polycrystallized by the ELA method, the polycrystal silicon thin film is processed by the CDE method into the island shape shown as 21 in FIG. 2 in plan view.

The subsequent manufacturing method is the same as that of the first embodiment, and therefore the description thereof is omitted. However, since the light-shielding film layer 19 can also prevent light leakage, the light-shielding film 27 of the organic material formed in the uppermost layer of the array in Example 1 is not formed.

By using the above structure, the light-shielding film can be formed on the array without considering the manufacturing process of the organic material, that is, the manufacturing equipment. (Embodiment 3) Hereinafter, as Embodiment 3, Embodiment 2 is
9 is a plan view of a case where the shapes of the insulating film between the light-shielding film and the active layer are different, and FIG. 5 is a cross-sectional view taken along line A-C in FIG. 9, and is taken along line B-C in FIG. 9. A description will be given with reference to FIG. 6, which is a cross-sectional view taken along the line, and FIG. 10, which shows a plane pattern of a stripe-shaped light-shielding film and a pixel display region.

An amorphous silicon film 19 and an insulating film 20 are formed on the glass substrate 18 on which the undercoat film 26 is formed.
Continuous film formation is performed in vacuum using the E-CVD method.
After that, the film thickness of the amorphous silicon film 19 is 4000 angstrom, and the film thickness of the insulating film 20 is 400 nm.
0 Angstrom.

Next, an amorphous silicon film to be the active layer 21 is formed by the PE-CVD method, and then heat treatment is performed at 500 ° C. to form the amorphous silicon film 19, the insulating film 20 and the active layer 21. The existing hydrogen is eliminated. The active layer 2
The film thickness of the amorphous silicon film which becomes 1 is 500 angstrom.

Next, after the amorphous silicon film 19 is polycrystallized by the ELA method, the polycrystal silicon film is processed into an island shape by the CDE method.

The subsequent steps are the same as those in the second embodiment and will not be described.

By using this structure, the light-shielding film and the insulating film can be continuously formed. (Example 4) When describing the optical density value of a film for preventing light leakage, wavelength dependency in the visible light range also becomes a problem,
It is desirable that OD ₁ be averaged over all wavelengths. The amorphous silicon film tends to have a small OD _{1 in the} red wavelength region. Therefore, when this amorphous silicon film is used as a film for preventing light leakage, red light may leak and the screen may appear reddish. In order to solve this problem, a method will be described in which the blue color filter 28 that allows only the light having a wavelength away from the red side to pass through is used as an auxiliary light-shielding film and is formed at the same time as the color filter of the pixel portion formed on the array substrate.

FIG. 7 shows a sectional view of a structure corresponding to FIG. 3 of the second embodiment, and FIG. 8 shows a sectional view of a structure corresponding to FIG. 5 of the third embodiment. By adding the blue color filter 28 to the structures of Examples 2 and 3, it is possible to sufficiently prevent light leakage of all visible light wavelengths. (Embodiment 5) In the structures described in Embodiments 1 to 4, since the signal line and the pixel electrode are arranged in the same layer, the distance between the two is so small that the capacitive coupling generated between the two wirings can be ignored. Must be separated. When used in a normal driving method, an interval of about 5 μm is necessary. Therefore, it is impossible to increase the aperture ratio in the area corresponding to this interval.
In order to increase the aperture ratio, there is a liquid crystal display device in which the pixel transparent electrode 8 is in a layer above the signal line 1 and the scanning line 2 arranged in a matrix and overlaps with these. In this structure, there is no gap between the pixel display region and the wiring (see FIGS. 12 and 13), and a light-shielding film for preventing light leakage is not necessary, but a light-shielding film for preventing light hitting the active layer of the polycrystalline thin film transistor is required. Need to be distributed.

Hereinafter, referring to FIG. 11 which is a sectional view taken along the line B--C in FIG. 12, a pixel display section having the above structure and a light shielding film for preventing light which strikes the active layer is formed. Example 5 will be described.

On the glass substrate 18 on which the undercoat film 26 is formed, the amorphous semiconductor film 19 serving as a light-shielding film, the insulating film 20, and the amorphous silicon film serving as the active layer 21 are formed by PE.
-Continuous film formation in vacuum using the CVD method.

Then, heat treatment is performed at 500 ° C. to desorb hydrogen existing in the amorphous semiconductor film 19, the insulating film 20 and the active layer 21. Here, the material and the film thickness of the amorphous semiconductor film 19 serving as the light shielding film are the same as those in the first embodiment. The insulating film 20 is a silicon nitride film having a film thickness of 1000 angstroms, and the amorphous silicon film serving as the active layer 21 has a film thickness of 500.
Angstrom.

Next, the amorphous silicon film to be the active layer 21 is polycrystallized by the ELA method.

Next, three layers of a polycrystalline silicon film, a silicon nitride film and an amorphous semiconductor film are continuously processed by a CDE (chemical dry etching) method using a mixed gas of CF ₄ and O ₂ to form islands. To get the shape of.

Next, by the AP (normal temperature heat) -CVD method,
An oxide film to be the gate insulating film 22 is formed in a thickness of 100 angstrom. After that, the gate electrode 3, the auxiliary capacitance electrode 7, and MoW (molybdenum tung-ten alloy) to be the scanning line 2 shown in FIG.
Process using the method. The film thickness of MoW is 2500 Å.

Next, PH3 serving as a donor is implanted by using the ion doping method. Injection condition is acceleration voltage 70K
eV, dose amount 1E16 / cm ² .

Next, the interlayer insulating film 23 is formed at a film forming temperature of 400 ° C.
To form a film. At this time, the impurities are activated and the drain region 4 and the source region 5 of the thin film transistor are formed. The interlayer insulating film is an oxide film and has a film thickness of 5000 angstrom.

Next, after opening the contact hole CH ₁ , the signal line 1 having a two-layer structure of Mo (upper layer) and Al (lower layer), the wiring 25 connecting the active layer and the pixel electrode shown in FIG. 12, Wiring 24 for connecting the thin film transistor and the signal line
And are formed by a sputtering method and then processed by a wet method. The film thicknesses of the Mo film are 1500 Å, the Al film is 4500 Å,
It is.

Next, the protective film 29 of the array is PE-CVD.
After forming the film by the method, a contact hole CH ₂ is opened.
The protective film 29 is a silicon nitride film and has a film thickness of 2000.
Angstrom.

Next, an interlayer insulating film is formed using the coating type photosensitive organic film 30. The film thickness is 3.0 μm. Since the contact hole CH ₂ is opened in the silicon nitride film before the coating of the coating type photosensitive organic film 30, the contact hole is formed when the patterning of the coating type photosensitive organic film 30 is completed.

Next, an ITO film to be the pixel electrode 8 is formed by a sputtering method and then processed by a wet method.

In Examples 1 to 5 of the present invention described above,
The processing method of each film of the active layer single-layer film, the two-layer film including the insulating film and the light-shielding film, and the three-layer film including the active layer, the insulating film, and the amorphous semiconductor has been described using the CDE method. If a shape that the gate insulating film covers can be obtained, CDE
There is no problem in processing using a plasma etching method or a reactive ion etching method which is a processing method other than the above method.

Further, the etching gas is CF ₄
The present invention is effective even if processing is performed using a combination other than + O ₂ or other gas.

According to the embodiment of the present invention, a realistic light-blocking film on the array substrate is provided, and the light hitting the polycrystalline silicon which is the active layer and the light leaking from the gaps other than the pixel display portion are blocked, thereby displaying It is possible to realize a liquid crystal display device that prevents deterioration of performance at low cost while solving problems such as reflection, film thickness, number of steps, and aperture ratio.

[0074]

As described above, according to the present invention, the amorphous silicon film is provided below the active layer made of polycrystalline silicon for forming the thin film transistor via the insulating film. Therefore, it is possible to block the light that strikes the active layer polycrystalline silicon. Further, since the amorphous silicon film and the insulating film are arranged on substantially the entire surface other than the pixel display region, they can have a role of blocking light leaking from the gap. Further, by disposing a light-shielding film made of an organic material on the upper surface of the array substrate other than the pixel display area,
It is possible to further improve the performance of blocking the leaked light from the gap. As a result, it is possible to prevent the display performance of the liquid crystal display element from deteriorating at a relatively low cost and without lowering the aperture ratio.

[Brief description of drawings]

FIG. 1 is a sectional view of a pixel portion taken along line B-C in FIG. 9 according to a first exemplary embodiment.

FIG. 2 is a plan pattern view of an active layer or a light shielding film in Examples 1 and 5.

FIG. 3 is a sectional view of a pixel portion taken along line A-C of FIG. 9 in Embodiment 2.

FIG. 4 is a sectional view of a pixel portion taken along line B-C in FIG. 9 according to the second embodiment.

FIG. 5 is a sectional view of a pixel portion taken along line A-C in FIG. 9 according to the third embodiment.

6 is a sectional view of a pixel portion taken along line B-C of FIG. 9 in Embodiment 3. FIG.

FIG. 7 is a sectional view of a pixel portion taken along line A-C in FIG. 9 according to a fourth exemplary embodiment.

8 is a sectional view of a pixel portion taken along line A-C in FIG. 9 in Embodiment 4. FIG.

FIG. 9 is a plan view of a pixel portion according to Examples 1 to 4.

FIG. 10 is a plan view showing a light shielding film and pixel display regions of Examples 1 to 4.

FIG. 11 is a sectional view of a pixel portion taken along line B-C of FIG. 12 in Example 5;

FIG. 12 is a plan view of a pixel portion according to the fifth embodiment.

13 is a plan view showing the pixel display electrode in FIG.

FIG. 14 is a schematic diagram of a liquid crystal display device.

FIG. 15 is a layout diagram of cells when a backlight is placed on the array substrate side.

FIG. 16 is a layout diagram of cells when a backlight is placed on the counter substrate side.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 signal line 2 scanning line 3 gate electrode 4 thin film transistor drain 5 thin film transistor source 6 thin film transistor 7 auxiliary capacitance electrode 8 pixel display electrode 9 color filter 10 counter electrode 11 counter substrate 12 array substrate 13 liquid crystal 14 incident side polarization plate 15 output side polarization Plate 16 Backlight 17 Pixel display region 18 Insulating substrate 19 Amorphous semiconductor film 20 Insulating film 21 Active layer 22 Gate insulating film 23 Interlayer insulating film 24 Drain side connecting wiring 25 Source side connecting wiring 26 Undercoat film 27 Organic light shielding film 28 Blue color filter 29 Passivation film 30 Organic interlayer insulation film

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Motoshi Maruno, Motoshi Maruno, 8 Shinsita-cho, Isogo-ku, Yokohama-shi, Kanagawa, Ltd., Toshiba Yokohama Works, Ltd. Address 7 Toshiba Toshiba Engineering Co., Ltd.

Claims (11)

[Claims] 1. A first electrode substrate having a plurality of polycrystalline silicon thin film transistors, a second electrode substrate having a counter electrode, and a liquid crystal inserted between the first and second electrode substrates. The first electrode substrate has a scanning line and a signal line arranged in a matrix on a transparent insulating substrate, a plurality of pixel electrodes provided at each intersection of the scanning line and the signal line, and a gate electrode. A plurality of polycrystalline silicon thin film transistors in which a scanning line, a source electrode is connected to the signal line, and a drain electrode is connected to the pixel electrode, and the thin film transistor is amorphous on the transparent substrate. A liquid crystal display device, which is formed via a semiconductor film and an insulating film. 2. The optical density value OD ₂ of the amorphous semiconductor film is 1 or more in the visible light region, and the optical density value OD ₂ is The liquid crystal display device according to claim 1, wherein 3. The amorphous semiconductor film and the insulating film,
The liquid crystal display device according to claim 1, wherein the liquid crystal display device is formed in the same pattern as the active layer of the thin film transistor. 4. The non-crystalline semiconductor film has an optical density value OD ₃ of 2 or more, and the non-crystalline semiconductor film is provided at least between the lower side of the thin film transistor, the thin film transistor, the matrix wiring and the display electrode. And the optical density value OD ₃ is The liquid crystal display device according to claim 1, wherein 5. A liquid crystal according to claim 4, wherein a blue color filter is formed in a gap between the thin film transistor and the scanning line, the signal line and the pixel electrode as the matrix wiring. Display device. 6. The liquid crystal display device according to claim 1, wherein the pixel electrode is formed in a state of overlapping with the signal lines and the scanning lines arranged in a matrix. 7. An amorphous semiconductor film, an insulating film, and an amorphous silicon film are formed on an insulating substrate, and only the amorphous silicon film is converted into a polycrystalline silicon film by laser irradiation to obtain the polycrystalline silicon film. A method for manufacturing a liquid crystal display device, which comprises using the film as an active layer of a thin film transistor. 8. A pixel electrode for driving a liquid crystal, which is arranged in a matrix on a transparent insulating substrate, and an active layer provided for each pixel electrode in order to apply a voltage to the pixel electrode. 2. A liquid crystal display device, comprising: a polycrystalline silicon thin film transistor formed in the above; and an amorphous silicon film arranged below the active layer with an insulating film interposed therebetween. 9. The liquid crystal display device according to claim 8, wherein the amorphous silicon film is disposed on substantially the entire surface of a region other than the region corresponding to the pixel electrode. 10. The liquid crystal display device according to claim 8, wherein the insulating film is formed over a portion other than the region above the amorphous silicon film. 11. A light-shielding film made of an organic material is provided above the polycrystalline silicon thin film transistor.
Liquid crystal display device.