JPH0922872A - Semiconductor laminated structure, manufacturing method thereof, and semiconductor device using the same - Google Patents

Abstract

(57) [Summary] [Structure] A semiconductor laminated structure consisting of a Si substrate and a GaAs layer is formed, and the surface of the Si substrate is cleaned and terminated with hydrogen to make it inactive, and the generation of dislocations on it is suppressed. Ga layer and GaAs layer are formed for this purpose. Also, a semiconductor device in which a pn structure serving as a photoelectric conversion portion is formed in a GaAs layer thereon. [Effect] A clean surface can be obtained at a low temperature, and the diffusion of impurities from the diffusion layer, the contamination by the processing mask, and the diffusion of impurities can be suppressed. In addition, the generation of dislocations can be suppressed, and GaAs
The layer can be grown epitaxially.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor laminated structure composed of a plurality of semiconductors having different lattice constants, a method for manufacturing the same, and a semiconductor device manufactured using the same.

[0002]

2. Description of the Related Art Conventionally, in order to form a semiconductor laminated structure, the purpose is to remove contaminants on the semiconductor surface to be a substrate. As a pretreatment, the substrate is washed and the surface layer is etched.
After that, usually, a protective film such as an oxide film is formed, and these protective films are removed before the laminated structure is formed. When an oxide film is used as a protective film, the oxide film is decomposed by heat treatment, so by performing heat treatment in vacuum,
It is known that a semiconductor clean surface is obtained and a semiconductor laminated structure having good crystallinity is formed. GaA on Si substrate
In the method of manufacturing a laminated structure in which a compound semiconductor layer such as s is formed, the decomposition temperature of silicon oxide on the Si substrate is 12
Since it is around 00 ° C, it is usually 1100 ° C, and even if a well-controlled thin oxide film of several tens of liters is used,
High temperature heat treatment of about 15 minutes at ℃ is required (for example, Journal of Electrochemical Society, 1
33 (1986) 666 to 671 (J. Electroc
hem.Soc. 133 (1986) pp 666-671)). For this reason, a simple substrate cleaning process protected by an oxide film cannot be used on a patterned substrate covered with a processing mask or the like that is difficult to employ high-temperature heat treatment, or a substrate to which impurities that easily diffuse are added.

Further, since the lattice constants of Si and the compound semiconductor are different, dislocations occur and the characteristics of the semiconductor device formed on the semiconductor laminated structure deteriorate. Various methods have been proposed so far for reducing dislocations. Journal of Crystal Grouse, 115 (1991) 122
Pp.-127 (J. Crys. Growth 115 (1991) p.
p. 122-127), Journal of Crystal Grouse, 128 (1993) pages 527-532.
Page (J. Crys. Growth 128 (1993) pp. 527-5
32), it is known that a GaAs crystal layer structure on a Si substrate has a GaAs amorphous layer inserted between them to reduce dislocations.

[0004] Also, Japanese Journal of Japan
Applied Physics, 30 (1991) L668
Page-L671 (Jpn. J. Appl. Phys. 30 (199
1) pp. L668-L671), thermal cycle annealing method and InGaAs / GaAs
A dislocation density of about 10 ⁵ / cm ³ has been realized by adopting a method of inserting a strained lattice and forming a single crystal layer at a lower temperature at time intervals with a migration enhancement epitaxy method. It is said that 10 ⁴ / cm ³ units are required to realize a semiconductor device having characteristics similar to those on a GaAs substrate.

[0005]

The conventional substrate cleaning treatment requires a high temperature heat treatment at 800 ° C. or higher, and the thermal cycle annealing for reducing dislocations requires a treatment at 900 ° C. For this reason, in a semiconductor device having a pn junction and a heterogeneous semiconductor junction, dopant atoms or semiconductor constituent atoms diffuse and there is a problem that the steepness of the junction cannot be maintained. In addition, since the method of inserting the amorphous layer forms the amorphous layer at a low temperature and the crystal layer at a high temperature, the amorphous layer is converted into the crystal layer during crystal growth,
There was a problem that new dislocations were generated. Further, in the migration enhancement epitaxy method, since the entire semiconductor laminated structure is formed at a low temperature, impurities are easily taken in and it is difficult to obtain a film with good crystallinity. There was a problem that it was inappropriate to use for.

A first object of the present invention is to provide a semiconductor laminated structure in which a high-quality compound semiconductor layer having a lattice constant different from that of the semiconductor substrate is formed on a semiconductor substrate, and a manufacturing method thereof.

A second object of the present invention is to provide a semiconductor device constituted by using a semiconductor laminated structure in which a high quality compound semiconductor layer is formed and a manufacturing method thereof.

[0008]

In order to achieve the first object, a semiconductor structure of the present invention comprises a metal layer formed on a semiconductor substrate whose surface is terminated with hydrogen, and a metal layer laminated on the metal layer. The compound semiconductor layer contains at least one of the constituent elements of the metal layer, and the semiconductor substrate and the compound semiconductor layer have different lattice constants.

When the compound semiconductor is, for example, a III-V group compound semiconductor of the periodic table of elements, the metal layer may be a metal layer of Ga, Al, In or the like which is a constituent element thereof. When the metal layer is Ga, the compound semiconductor is Ga.
As or the like may be used. The method for manufacturing a semiconductor laminated structure according to the present invention comprises forming a predetermined metal layer on a semiconductor substrate whose surface is terminated with hydrogen, and using the metal layer as a constituent element in the surface layer of the metal layer. The step of changing to a compound semiconductor layer having a lattice constant different from the above and further forming a compound semiconductor layer is included.

The surface-terminated semiconductor substrate can be formed by exposing the substrate surface to a hydrofluoric acid aqueous solution. Also,
The metal layer is formed to be 1 atomic layer or more and 50 atomic layers or less. For example, when the metal layer is Ga, if the metal layer is irradiated with As, the surface of the metal changes to a GaAs layer. By irradiating this GaAs layer with Ga and As, a GaAs epitaxial layer can be formed.

In order to achieve the second object of the present invention, the semiconductor device of the present invention has a structure in which any one of the semiconductor laminated structures and a semiconductor element is bonded onto the semiconductor laminated structure. It is a thing. The semiconductor element may be formed on the semiconductor substrate above the semiconductor laminated structure or below the metal layer.

In the method for manufacturing a semiconductor device of the present invention, a bonding portion of a compound semiconductor to be bonded is formed on the semiconductor laminated structure manufactured by any one of the methods for manufacturing a semiconductor laminated structure described above. The bonding portion is configured to be at least a part of the compound semiconductor element.

If, for example, a photoelectric conversion element is formed on a semiconductor substrate by the method for manufacturing a semiconductor device of the present invention, a semiconductor device having photoelectric conversion elements above and below a metal layer can be manufactured.

In the laminated structure of the present invention, the semiconductor substrate is made of Si.
For the compound semiconductor layer, a compound semiconductor made of a III-V group element of the periodic table of elements is used.

[0015]

For convenience of explanation, the operation of the present invention will be described by taking as an example the case where the semiconductor is Si, the compound semiconductor is GaAs, and the metal is Ga.

As described in the prior art, Si and Ga are used.
Since As has a different lattice constant, As is directly on GaAs
The formation of dislocations causes dislocations at the interface between them and in the GaAs layer. Since both have the same crystal system, atoms can be bonded one to one at the interface. When the thickness of GaAs is about several atomic layers, the GaAs atoms are distorted according to the lattice of Si atoms. However, at this time, stress due to strain acts on the GaAs atom. Therefore, if the GaAs layer becomes thicker, the GaAs layer cannot withstand it, the bond is broken, and dislocation occurs.
In the present invention, in order to suppress the generation of this dislocation, Si and G
The binding of aAs was eliminated. That is, the bonds of Si surface atoms were terminated with hydrogen. Further, in order to epitaxially grow the GaAs layer that has lost the bond with Si, Ga
The metal layer was inserted. Ga metal layer is hydrogen-terminated Si
Although it is an amorphous layer above, the surface easily becomes a GaAs layer upon irradiation with As, so that a GaAs crystal layer can be grown on it. Further, since Ga does not crystallize under the GaAs crystal growth conditions, new dislocations do not occur during stack formation.

In practice, the surface atoms can be terminated with hydrogen by exposing the surface of the Si substrate to an aqueous solution of hydrofluoric acid. As a result, the oxide film formed on the surface of the substrate can be removed, contaminants attached to the oxide film can be removed at the same time, and the Si surface is inactivated. Therefore, recontamination due to adhesion of impurities is prevented, and it is not necessary to perform substrate cleaning treatment by high temperature heat treatment before forming the compound semiconductor layer.

For the metal layer, it is optimal to use Ga that can become GaAs by coupling with As. However, Ga
Since it is possible to use AlAs having a lattice constant close to that of As, Al has the same effect.

[0019]

EXAMPLES Example 1 FIG. 1 is a sectional view of a photoelectric conversion element of this example. This photoelectric conversion element includes a p-type Si substrate 1, a Ga layer 2,
GaAs layer 3, high-concentration p-type GaAs layer 4, p-type GaAs
A photoelectric conversion part having a pn structure is formed in the p-type GaAs layer 5 and the high-concentration n-type GaAs layer 6, which has a laminated structure of the layer 5, the high-concentration n-type GaAs layer 6, and the n-type AlGaAs layer 7. Further, the p-type electrode 10 is formed on the p-type Si substrate 1 by the n-type A
A high concentration n-type GaAs layer 8 and an n-type electrode 9 are formed on the surface of the 1GaAs layer 7. The manufacturing method of this semiconductor device will be described below.

The p-type Si substrate 1 has p-type and a resistivity of 0.
5 Ωcm, thickness 0.4 mm, (001) plane orientation,
A substrate inclined by 2 ° off in the <110> direction is used.
Substrates are washed organically and with water, and then washed with 5% hydrofluoric acid in water.
Immerse for 0 seconds, then wash for 10 seconds with water, and immediately carry it into the molecular beam crystal growth apparatus. At this time, the RHEED pattern shows a (1 × 1) pattern showing that it has the same period as the bulk structure, and shows that the rearrangement of the surface atoms has not occurred because the surface Si atoms and the hydrogen atoms are bonded. ing.

Here, the substrate temperature is raised to 300 ° C.,
The RHEED pattern remains unchanged, indicating that the surface is hydrogen terminated. After forming 30 atomic layers of Ga layer 2 on the substrate, the As cell temperature is raised and As irradiation is performed by a shutter operation, so that Ga on the surface layer of Ga layer 2 is Ga.
Change to As layer 3. By forming the Ga layer, the RHEED pattern becomes a halo pattern indicating an amorphous state, but the As irradiation causes overlapping of periodic spot patterns indicating that the surface is crystallized.

After that, the high-concentration p-type GaAs layer 4 is set to 3 μm.
Form. The substrate temperature at this time is 300 ° C. immediately after the growth, and after the growth of about 0.1 μm, it is gradually raised to 600 ° C. GaAs formed so far has a Be concentration of 1
It is a high-concentration p-type of × 10 ¹⁹ / cm ³ . Then, at a substrate temperature of 600 ° C., a p-type GaAs layer (Be concentration; 8 × 10 ¹⁶ /
cm ³ ) 2.5 to 2.5 μm, and a high concentration n-type GaAs layer (Si
Concentration: 3 × 10 ¹⁸ / cm ³ ) 6, 0.5 μm, are sequentially laminated. The laminated structure may be formed in an ultrahigh vacuum of about 10 ^-10 torr, but may be formed in a vacuum of about 10 ^-5 torr by introducing hydrogen into the apparatus.

The half value width of the GaAs (400) diffraction peak was measured by the X-ray diffraction method for the sample having the laminated structure produced by this method.
The full width at half maximum was reduced by about 0%, and the crystallinity was improved. As shown in FIG. 2, it can be seen that the effect is observed when the thickness of the Ga layer is 50 atomic layers or less.

In order to manufacture a photoelectric conversion element, a high concentration n
N-type AlG as a window layer on the n-type GaAs layer 6
aAs layer (Si concentration; 3 × 10 ¹⁸ / cm ³ ) 7 300 Å,
High concentration n-type GaAs layer (Si concentration; 5
× 10 ¹⁸ / cm ³ ) 8 of 1000 Å are laminated. Then n
The high-concentration n-type GaAs layer 8 is etched leaving only the type electrode portion to form an n-type electrode 9 and a p-type electrode 10.

The prepared photoelectric conversion element has a general-purpose dislocation density of 1
The efficiency of the GaAs photoelectric conversion element manufactured on the 0 ⁴ / cm ³ GaAs substrate is 70 to 80%, and the manufacturing cost is reduced by almost one digit.

In this embodiment, the p-type Si substrate 1 is n-type, the high-concentration p-type GaAs layer 4 is high-concentration n-type, and p-type Ga is used.
The As layer 5 is n-type and the high-concentration n-type GaAs layer 6 is high-concentration p.
Type, n-type AlGaAs layer 7 to p-type, high concentration n-type Ga
The same effect can be obtained by using the As layer 8 of high concentration p-type, the n-type electrode 9 of p-type, and the p-type electrode 10 of n-type.

In the present embodiment, the metal layer 2 is Al and G
Even if the aAs layers 3, 4, 5, 6 are AlGaAs layers, the same effect can be obtained.

In the present embodiment, the metal layer 2 is In and G
aAs layers 3, 4, 5, 6, 8 as InP layers, AlGaAs
Even if the layer 7 is an InAlP layer, the same effect can be obtained.

<Embodiment 2> FIG. 3 is a sectional view of a photoelectric conversion element of the present embodiment. A semiconductor device equipped with this photoelectric conversion element has a p-type GaAs layer 5, a high-concentration n-type GaAs layer 6, and a pn layer.
A GaAs photoelectric conversion portion having a structure, a p-type Si substrate 1, and a high-concentration n-type Si layer 11 are formed into a Si photoelectric conversion portion having a pn junction. Hereinafter, a method for manufacturing this semiconductor device will be described.

P is diffused into the p-type Si substrate 1 at 800 ° C.,
A high concentration n-type Si layer 11 having a thickness of 0.4 μm is formed. After that, the high-concentration n-type Si layer formed on the back surface of the p-type Si substrate 1 is etched, Al is vapor-deposited, and heat-treated at about 700 ° C. to form the high-concentration p-type Si layer 12. On this Si substrate, the surface is hydrogen-terminated by the same method as in Example 1, and then a photoelectric conversion element having a GaAs photoelectric conversion portion is manufactured.

The produced photoelectric conversion element absorbs sunlight having wavelengths corresponding to GaAs and Si sequentially from a short wavelength. Therefore, the photoelectric conversion element is 30% more than that of the semiconductor device shown in the first embodiment.
It was possible to obtain a high efficiency.

In this embodiment also, the p-type Si substrate 1 is n-type.
The high-concentration n-type Si layer 11 to the high-concentration p-type
-Type Si layer 12 is n-type, high-concentration p-type GaAs layer 4 is high-concentration n-type, p-type GaAs layer 5 is n-type, high-concentration n-type Ga
The As layer 6 is a high-concentration p-type, the n-type AlGaAs layer 7 is a p-type, the high-concentration n-type GaAs layer 8 is a high-concentration p-type, the n-type electrode 9 is a p-type, and the p-type electrode 10 is an n-type. However, it has the same effect.

Also, in this embodiment, the metal layer 2 is made of Al and G
Even if the aAs layers 3, 4, 5, 6 are AlGaAs layers, the same effect can be obtained.

In the present embodiment, the metal layer 2 is In and G
aAs layers 3, 4, 5, 6, 8 as InP layers, AlGaAs
Even if the layer 7 is an InAlP layer, the same effect can be obtained.

<Embodiment 3> FIG. 4 is a sectional view of a photoelectric conversion element of this embodiment. This photoelectric conversion element is a p-type Si substrate 2
1, pyramidal high-concentration p-type GaAs layer 25, p-type G
aAs layer 26, high-concentration n-type GaAs layer 27, and n-type A
A photoelectric conversion portion having a pn structure is formed in the p-type GaAs layer 26 and the high-concentration n-type GaAs layer 27, which has a laminated structure of the lGaAs layer 28. Furthermore, a p-type electrode 31 is formed on the p-type Si substrate 21, a high-concentration GaAs layer 29 is formed on a flat portion of the surface of the n-type AlGaAs layer 28, and an n-type is formed on the high-concentration GaAs layer 29.
The mold electrode 30 is formed. The manufacturing method of this semiconductor device will be described below.

The p-type Si substrate 21 is p-type, has a resistivity of 0.5 Ωcm, a thickness of 0.4 mm, and has a (001) plane orientation.
A substrate inclined by 2 ° off in the <110> direction is used.
A SiO ₂ film is formed on this substrate at a thickness of 3000 Å, and a quadrangular opening having sides of <110> and <−110> is formed by photolithography. The length of the openings and the distance between the openings can be changed according to the amount of incident light or the specific resistance of the electrode 30 formed by removing the SiO ₂ film region. Here, the length of the openings is 50 μm in both length and width, and the interval between the openings is 10 μm (see FIG. 5). The Si substrate on which the processing mask is formed by this method is immersed in a 5% hydrofluoric acid aqueous solution for 30 seconds, then washed with water for 10 seconds, and immediately introduced into the metal-organic vapor phase crystal growth apparatus. At this time, RHE on the Si surface
If the ED pattern is observed, it is (1 × 1) as in the example.
The pattern is observed.

Here, the substrate temperature was raised to 300 ° C., and 30 atomic layers of the Ga layer 23 was formed on the substrate in the same manner as in Example 1.
After that, raise the As cell temperature and operate As
Irradiation is performed to form a layer 24 in which Ga in the surface layer of the Ga layer 23 is GaAs.

After that, high-concentration p-type GaAs having a Zn concentration of 1 × 10 ¹⁹ / cm ³ is grown. The substrate temperature at this time is 300 ° C. immediately after growth, and 600 ° C. after 0.1 μm growth.
Gradually raise the temperature until. As shown in FIG.
As does not grow on the SiO ₂ film 22, but only on Si (opening), and a pyramidal high-concentration p-type GaAs layer 25 is formed. After this, the SiO ₂ film 22
Of the p-type GaAs layer (Zn concentration: 8 × 10 ¹⁶ / cm
³ ) 26 to 2.5 μm, and a high concentration n-type GaAs layer (S
e Concentration: 3 × 10 ¹⁸ / cm ³ ) 27 is sequentially laminated to 0.5 μm.

In order to manufacture a photoelectric conversion element, a high concentration n
N-type AlG as a window layer on the n-type GaAs layer 27
aAs (Se concentration: 3 × 10 ¹⁸ / cm ³ ) 28 300 Å,
A high-concentration n-type GaAs layer (Se concentration: 5)
× 10 ¹⁸ / cm ³ ) 29 is laminated to a thickness of 1000Å. After that, only the high-concentration n-type GaAs layer 29 in the pyramid portion is etched to form the n-type electrode 30 and the p-type electrode 31 on the back surface of the substrate. The Si substrate treatment with hydrofluoric acid may be performed again before the p-type GaAs layer 26 is formed.

Also in this embodiment, the p-type Si substrate 21 is n-type, the high-concentration p-type GaAs layer 25 is high-concentration n-type, and
N-type GaAs layer 26 and high-concentration n-type GaAs layer 27
To the high-concentration p-type, the n-type AlGaAs layer 28 to the p-type, the high-concentration n-type GaAs layer 29 to the high-concentration p-type, and the n-type electrode 30.
Is also p-type and the p-type electrode 31 is n-type, the same effect is obtained.

Further, in this embodiment, the metal layer 23 is made of Al,
Even if the GaAs layers 24, 25, 26 and 27 are AlGaAs layers, the same effect can be obtained.

In the present embodiment, the metal layer 23 is In,
The same effect can be obtained by using the GaAs layers 24, 25, 26, 27 and 29 as InP layers and the AlGaAs layer 28 as InAlP layers.

[0043]

Since the semiconductor device having the semiconductor laminated structure of the present invention uses the semiconductor substrate whose surface is inactivated by hydrogen termination, it is not necessary to clean the surface of the substrate by high temperature heat treatment, and impurities in the substrate are not required. A GaAs laminated structure can be formed using a Si substrate having a junction with a diffusion layer or a Si substrate on which a processing mask is formed. In addition, the metal surface provided on the substrate is replaced with GaAs, AlAs or In.
By changing to P etc., G which has no bond with Si substrate
Since aAs and InP can be epitaxially grown, it is possible to form a laminated structure in which the generation of dislocations due to lattice mismatch is suppressed.

Therefore, the manufactured photoelectric conversion element is Ga
High performance close to that produced on an As substrate or an InP substrate can be obtained. Moreover, Si is an inexpensive substrate material
Since it uses, the price can be reduced to 1/10 or less of the conventional price.

Since a tandem type photoelectric conversion element in which a GaAs photoelectric conversion element is electrically and crystallographically connected to a Si photoelectric conversion element can be manufactured, the manufacturing process can be simplified and the efficiency is 30 to 30. Improve by 50%.

By covering the surface of the Si substrate with a processing mask, a GaAs photoelectric conversion element having a pyramid structure can be manufactured. This photoelectric conversion element can increase the optical path length by multiply reflecting the incident light in the pyramid, so that the efficiency is improved by 20 to 30%.

[Brief description of drawings]

FIG. 1 is an S-terminated surface of the surface shown in Example 1 with hydrogen.
G formed by forming Ga layer and GaAs layer on i substrate
Sectional drawing of aAs photoelectric conversion element.

FIG. 2 is a characteristic diagram showing the relationship between the thickness of a Ga layer formed on a Si substrate whose surface is terminated with hydrogen and the half width of the X-ray diffraction line from a GaAs layer formed thereon.

FIG. 3 is a cross-sectional view of a photoelectric conversion element in which the GaAs photoelectric conversion element of Example 1 is formed on the Si substrate having the photoelectric conversion portion shown in Example 2;

FIG. 4 is a sectional view of a pyramidal GaAs photoelectric conversion element formed on a Si substrate shown in the third embodiment.

FIG. 5 is a cross-sectional view of a Si substrate on which a pyramidal GaAs layer is formed using a processing mask.

[Explanation of symbols]

1 ... p-type Si substrate, 2 ... Ga layer, 3 ... GaAs layer, 4 ...
High-concentration p-type GaAs layer, 5 ... p-type GaAs layer, 6 ... high-concentration n-type GaAs layer, 7 ... n-type AlGaAs layer, 8 ... high-concentration n-type GaAs layer, 9 ... n-type electrode, 10 ... p-type electrode .

Claims (12)

[Claims] 1. A semiconductor substrate comprising a predetermined metal layer on a semiconductor substrate whose surface is terminated by hydrogen, and a compound semiconductor layer containing at least one of the constituent elements of the metal layer on the metal layer. A semiconductor multi-layer structure having a lattice constant different from that of the compound semiconductor, wherein the metal layer is at least one atomic layer. 2. The semiconductor laminated structure according to claim 1, wherein the compound semiconductor layer is made of a III-V group element of the periodic table of elements. 3. The semiconductor laminated structure according to claim 1, wherein the semiconductor substrate is made of silicon and the surface of which is terminated by hydrogen. 4. The compound semiconductor according to claim 3, wherein the compound semiconductor is G.
The semiconductor layered structure is made of aAs and the metal layer is made of Ga or Al. 5. The compound semiconductor according to claim 3, wherein the compound semiconductor is I.
A semiconductor laminated structure made of nP and the metal layer made of In. 6. The method of claim 1, 2, 3, 4, or 5,
A semiconductor device in which a semiconductor element is disposed on the semiconductor laminated structure. 7. A first step of terminating the surface of a predetermined semiconductor substrate with hydrogen, a second step of forming a metal layer on the semiconductor substrate, and converting the surface of the metal layer into a compound semiconductor. A method of manufacturing a semiconductor laminated structure, comprising: a third step; and a fourth step of forming a compound semiconductor layer on the surface of the compound semiconductor. 8. The method for manufacturing a semiconductor laminated structure according to claim 7, wherein the first step of terminating the surface of the semiconductor substrate with hydrogen includes a step of immersing the semiconductor substrate in a hydrofluoric acid aqueous solution. 9. The method according to claim 7 or 8, wherein the third step of converting the surface of the metal layer into the compound semiconductor comprises forming the metal layer on the metal layer with a constituent element of the compound semiconductor. A method for manufacturing a semiconductor laminated structure, comprising the step of irradiating an element different from the element. 10. The method for manufacturing a semiconductor laminated structure according to claim 7, 8 or 9, wherein the compound semiconductor is a III-V group compound semiconductor of the periodic table of elements. 11. On the semiconductor laminated structure produced by the method according to claim 7,
A method of manufacturing a semiconductor device, wherein a junction of a compound semiconductor element of a different type different from the semiconductor laminated structure is formed, and the junction of the compound semiconductor element is a part of the semiconductor element. 12. A semiconductor device formed by electrically connecting a plurality of types of the semiconductor device according to claim 6.