JPH09230291A - Ultra-high-speed clock extraction circuit - Google Patents

Abstract

(57) Abstract: A clock signal is extracted from an ultrafast optical pulse signal without converting a VCO output into light. An optical intensity modulator is driven by a frequency-shifted signal or a phase-modulated signal of a VCO output,
An optical gate having a pulse width of the optical pulse signal is generated and the optical pulse signal used for clock extraction is passed. P to convert the intensity of the optical pulse signal passing through the optical gate
It is led to the LL circuit, the phase of the VCO is locked to the phase of the optical pulse signal, and the output of the VCO is taken out as a clock signal.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an ultrahigh speed clock extraction circuit for extracting a clock signal obtained by dividing the clock frequency by n from an ultrahigh speed optical pulse signal.

[0002]

2. Description of the Related Art FIG. 8 shows a phase locked loop (PLL: Phase).
A configuration example of a conventional clock extraction circuit using a Locked Loop is shown. In the figure, the optical pulse signal is the photoelectric converter 5
After being converted into an electric signal by 1, the signal is input to a PLL composed of a voltage controlled oscillator (VCO) 52, a multiplier 53, a low pass filter (LPF) 54 and an amplifier 55 which operates at the clock frequency of the optical pulse signal. It The operation of this PLL locks the phase of the VCO 52 with respect to the phase of the optical pulse signal, so that the output of the VCO 52 is obtained as a clock signal. However, in this configuration, the operation speed of the PLL is limited by the response speed of the photoelectric converter 51, and it is difficult to extract the clock signal from the high-speed optical pulse signal.

FIG. 9 shows a configuration example of a conventional clock extraction circuit by a PLL using an optical correlator. In the figure, an optical correlator 61, an optoelectric converter 62, a multiplier 63, a low pass filter (LPF) 64, an amplifier 65, a voltage controlled oscillator (VCO) 66, a mixer 67, an ultrashort optical pulse generator 68.
Are connected in a loop. The output of the oscillator 69 is connected to the mixer 67 and the multiplier 63. The optical pulse signal is input to the optical correlator 61, and the extracted clock signal is VC
It is branched from the output of O66 and taken out.

The output of the VCO 66 operating at the frequency f and the output of the oscillator 69 oscillating at the frequency Δf are input to the mixer 67, and a signal of frequency f + Δf is output. The ultrashort optical pulse generator 41 outputs the ultrashort optical pulse signal modulated at this frequency f + Δf. In the optical correlator 61, the optical pulse signal of the clock frequency f and the ultrashort optical pulse signal of the frequency f + Δf are correlated, and a signal proportional to the phase difference between the two signals is converted into an electric signal by the photoelectric converter 62. . The signal of the frequency Δf and the signal of the frequency Δf of the oscillator 69 are input to the multiplier 63, and the phase error signal is fed back to the VCO 66 via the LPF 64 and the amplifier 65.
With such a PLL configuration, the oscillation frequency of the VCO 66 can be synchronized with the clock frequency of the optical pulse signal.

As the optical correlator 61, four-wave mixing that occurs in an optical fiber having a response speed of picosecond or less or a semiconductor laser amplifier is used (Saito et al., "High-speed clock extraction by optical PLL using four-wave mixing"). , 1993 Autumn Meeting of IEICE B-923). With this configuration, the limitation on the operation speed of the PLL is relaxed, and the clock signal can be extracted from the high-speed optical pulse signal.

[0006]

By the way, the conventional clock extraction circuit shown in FIG. 9 requires an ultrashort optical pulse generator for converting the VCO output into light. However, there is a problem that excessive jitter is superimposed. An object of the present invention is to provide an ultra-high speed clock extraction circuit that can extract a clock signal from an ultra-high speed optical pulse signal without converting the VCO output into light. .

[0007]

FIG. 1 shows the basic structure and operating principle of an ultrahigh speed clock extraction circuit according to the present invention. In the figure, an optical pulse signal is input to the optical intensity modulator.
The optical intensity modulator is driven by a signal obtained by frequency-shifting or phase-modulating an output signal of a voltage controlled oscillator (VCO), generates an optical gate having a pulse width of the optical pulse signal, and uses the optical pulse signal for clock extraction. Pass through. Here, the phase relationship between the optical pulse signal and the VCO output is obtained as the intensity change of the optical pulse signal that has passed through the optical gate. When this intensity change is photoelectrically converted and guided to the PLL circuit, the phase of the VCO is locked to the phase of the optical pulse signal, so that the output of the VCO is obtained as a clock signal.

[0008]

BEST MODE FOR CARRYING OUT THE INVENTION

(First Embodiment) FIG. 2 shows a first embodiment of the present invention. In the figure, as an optical intensity modulator, an absorption type semiconductor modulator 11, a photoelectric converter 12, a multiplier 13, a low pass filter (LPF) 14, an amplifier 15, a voltage controlled oscillator (VCO) 16, an SSB mixer 17, a bias. Circuit 18
Are connected in a loop. The output of the oscillator 19 is S
It is connected to the SB mixer 17 and the multiplier 13 via the multiplier 20. The optical pulse signal is input to the photoelectric converter 12 via the absorption type semiconductor modulator 11, and the extracted clock signal is branched and taken out from the output of the VCO 16.

The output of the VCO 16 operating at the frequency f and the output of the oscillator 19 oscillating at the frequency Δf are the SSB mixer 1.
Bias circuit 1 receives the signal of frequency f + Δf
It is applied to the absorption type semiconductor modulator 11 via 8. The absorption amount of the absorption type semiconductor modulator 11 has a characteristic that it changes non-linearly with respect to the applied voltage as shown in FIG.
It is possible to realize an optical gate as described in.

Here, the clock frequency of the optical pulse signal input to the absorption type semiconductor modulator 11 is nf. In the absorption type semiconductor modulator 11, the input optical pulse signal is intensity-modulated at the frequency nΔf. The phase φ of this nΔf frequency component gives the phase difference between the optical pulse signal and the output of the VCO 16. Therefore, P is set so that this phase φ is locked.
Configure an LL circuit. That is, as shown in FIG. 2, a signal of frequency nΔf output from the photoelectric converter 12,
A signal obtained by multiplying the frequency Δf of the oscillator 19 by n via the multiplier 20 is input to the multiplier 13, and its phase error signal is LP
A circuit that feeds back to the VCO 16 via the F14 and the amplifier 15 is configured. With such a PLL circuit, a clock signal having a frequency f obtained by dividing the clock frequency nf of the optical pulse signal by n can be taken out as the output of the VCO 16.

(Second Embodiment) FIG. 4 shows a second embodiment of the present invention.
An embodiment will be described. The feature of this embodiment is that, in the first embodiment, two absorption type semiconductor modulators 11-1 and 11-2, which are integrated in series, are used, and the output of the bias circuit 18 is divided into two and one of them is used. Delay is given through the delay device 21,
A phase difference from the other output is applied to each electrode of the absorption type semiconductor modulators 11-1 and 11-2. Other configurations are the same as those of the first embodiment. With such a configuration, the absorption type semiconductor modulators 11-1, 1
As shown in FIG. 5, the optical gate set to 1-2 becomes an overlapping portion of the two, and the optical gate width is narrowed to enable clock extraction of the ultrafast optical pulse signal.

(Third Embodiment) FIG. 6 shows a third embodiment of the present invention.
An embodiment will be described. The feature of this embodiment is that the phase modulator 22 driven by the output of the oscillator 19 is used in place of the SSB mixer 17 in the first embodiment, and the output of the VCO 16 is phase-modulated at the output frequency Δf of the oscillator 19. It is in. Thereby, in the absorption type semiconductor modulator 11, the input optical pulse signal is intensity-modulated at the frequency Δf.
The phase φ of this Δf frequency component corresponds to the optical pulse signal and VCO.
The phase difference from the 16 outputs is given. Therefore, the PLL circuit is configured so that this phase φ is locked. That is,
As shown in FIG. 6, the signal of the frequency Δf output from the photoelectric converter 12 and the frequency Δf of the oscillator 19 are input to the multiplier 13, and the phase error signal is input to the VCO 16 via the LPF 14 and the amplifier 15. Configure a feedback circuit. With such a PLL circuit, a clock signal having a frequency f obtained by dividing the clock frequency nf of the optical pulse signal by n can be taken out as the output of the VCO 16.

(Fourth Embodiment) FIG. 7 shows a fourth embodiment of the present invention.
An embodiment will be described. The feature of this embodiment is that, in the third embodiment, two absorption type semiconductor modulators 11-1 and 11-2 integrated in series are used, and the output of the bias circuit 18 is divided into two and one of them is used. Delay is given through the delay device 21,
A phase difference from the other output is applied to each electrode of the absorption type semiconductor modulators 11-1 and 11-2. Other configurations are the same as those of the third embodiment. With such a configuration, the absorption type semiconductor modulators 11-1, 1
As shown in FIG. 5, the optical gate set to 1-2 becomes an overlapping portion of the two, and the optical gate width is narrowed, and the clock extraction of the ultrahigh-speed optical pulse signal becomes possible.

In each of the above embodiments, the absorption type semiconductor modulator is used as the light intensity modulator. In particular, in the first and third embodiments, the absorption type semiconductor modulator 11 is used. Alternatively, a LiNbO ₃ intensity modulator may be used to similarly extract a signal that gives a phase difference between the optical pulse signal and the VCO output.

[0015]

As described above, the ultrahigh-speed clock extraction circuit of the present invention does not need to convert the VCO output into light, so that the circuit configuration is simple and the excess jitter caused by the optical conversion of the VCO output is eliminated. Occurrence can be avoided and a stable clock signal can be obtained.

[Brief description of drawings]

FIG. 1 is a block diagram showing a basic configuration and an operation principle of an ultrahigh speed clock extraction circuit of the present invention.

FIG. 2 is a block diagram showing a first embodiment of the present invention.

FIG. 3 is a diagram showing absorption characteristics of an absorption type semiconductor modulator.

FIG. 4 is a block diagram showing a second embodiment of the present invention.

FIG. 5 is a diagram showing an optical gate formed by a two-stage absorption type semiconductor modulator.

FIG. 6 is a block diagram showing a third embodiment of the present invention.

FIG. 7 is a block diagram showing a fourth embodiment of the present invention.

FIG. 8 is a block diagram showing a configuration example of a conventional clock extraction circuit using a PLL.

FIG. 9 is a block diagram showing a configuration example of a conventional clock extraction circuit based on a PLL using an optical correlator.

[Explanation of symbols]

 11 Absorption Type Semiconductor Modulator 12 Photoelectric Converter 13 Multiplier 14 Low Pass Filter (LPF) 15 Amplifier 16 Voltage Controlled Oscillator (VCO) 17 SSB Mixer 18 Bias Circuit 19 Oscillator 20 Multiplier 21 Delayer 22 Phase Modulator

Claims (4)

[Claims] 1. An ultra-high-speed clock extraction circuit for extracting a clock signal obtained by dividing the clock frequency of an input optical pulse signal by n, wherein a voltage-controlled oscillator and an output signal of the oscillator determine the frequency of the voltage-controlled oscillator. A frequency shift unit that outputs a signal shifted by a predetermined frequency, an optical intensity modulator that intensity-modulates the optical pulse signal according to the output signal of the frequency shift unit, and an output of the optical intensity modulator A photoelectric converter for converting into a signal, and a unit for detecting the phase difference between the electric signal and a signal obtained by multiplying the frequency of the output signal of the oscillator by n times and controlling the frequency of the voltage controlled oscillator according to the phase difference. Phase difference detecting means, and outputs the output signal of the voltage controlled oscillator as a clock signal obtained by dividing the clock frequency of the optical pulse signal by n. An ultra-high-speed clock extraction circuit characterized by the above. 2. The ultrahigh-speed clock extraction circuit according to claim 1, wherein, instead of the optical intensity modulator, two optical intensity modulators integrated in series and an output signal of the frequency shift means are divided into two. And a delay device for giving a predetermined delay to one of the two, and applying a phase difference between the divided output signals of the frequency shift means to each electrode of the light intensity modulator. An ultra high speed clock extraction circuit. 3. An ultra-high-speed clock extraction circuit for extracting a clock signal obtained by dividing the clock frequency of an input optical pulse signal by n, wherein a voltage-controlled oscillator and an output signal of the oscillator adjust the frequency of the voltage-controlled oscillator to Phase modulating means for performing a predetermined phase modulation, a light intensity modulator for intensity modulating the optical pulse signal according to an output signal of the phase modulating means, and an optoelectric device for converting the output of the light intensity modulator into an electrical signal. A converter, and a phase difference detection means for detecting the phase difference between the electric signal and the output signal of the oscillator, and controlling the frequency of the voltage controlled oscillator according to the phase difference, the output of the voltage controlled oscillator An ultrahigh-speed clock extraction circuit having a configuration for outputting a signal as a clock signal obtained by dividing the clock frequency of the optical pulse signal by n. 4. The ultrahigh-speed clock extraction circuit according to claim 3, wherein instead of the light intensity modulator, two light intensity modulators integrated in series and the output signal of the frequency shift means are divided into two. And a delay device for giving a predetermined delay to one of the two, and applying a phase difference between the divided output signals of the frequency shift means to each electrode of the light intensity modulator. An ultra high speed clock extraction circuit.