JPH09232741A - Printed wiring board - Google Patents
Printed wiring boardInfo
- Publication number
- JPH09232741A JPH09232741A JP8061839A JP6183996A JPH09232741A JP H09232741 A JPH09232741 A JP H09232741A JP 8061839 A JP8061839 A JP 8061839A JP 6183996 A JP6183996 A JP 6183996A JP H09232741 A JPH09232741 A JP H09232741A
- Authority
- JP
- Japan
- Prior art keywords
- solder
- wiring board
- printed wiring
- thickness
- dam
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistors
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3421—Leaded components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistors
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits by soldering
- H05K3/3452—Solder masks
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistors
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits by soldering
- H05K3/3465—Application of solder
- H05K3/3485—Application of solder paste, slurry or powder
Landscapes
- Non-Metallic Protective Coatings For Printed Circuits (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
Abstract
Description
【0001】[0001]
【発明の属する技術分野】本発明は、プリント配線板の
改良に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to improvements in printed wiring boards.
【0002】[0002]
【従来の技術】従来、ガルウィング型フラットパッケー
ジICであるQFPやSOPが実装されるプリント配線
板においては、リフローはんだ付け時における電極ラン
ド間のはんだブリッジ不良を防ぐためにソルダーレジス
トエポキシ系樹脂を使用し、プリント回路基板上の35
μm厚銅箔の電極ランド間にソルダーレジストによる障
壁(以下、「ソルダーダム」と称す)を形成していた。2. Description of the Related Art Conventionally, in a printed wiring board on which QFP or SOP which is a gull wing type flat package IC is mounted, a solder resist epoxy resin is used to prevent a solder bridge defect between electrode lands during reflow soldering. , On the printed circuit board
A barrier made of a solder resist (hereinafter referred to as "solder dam") was formed between the electrode lands of the copper foil having a thickness of μm.
【0003】このソルダーダムの形成方法には、
(1)、スクリーン印刷によるレジストインク印刷後、
UV硬化又は熱硬化する方法(最大厚さ20μm)、
(2)、感光性液状レジストインクを全面塗布した後、
露光、現像する方法(最大厚さ20μm)、および
(3)、感光性ドライフィルムレジストを貼り付けた
後、露光、現像する方法(最大厚さ100μm)、の3
方法が用いられ、ソルダーダム厚さは20〜100μm
の範囲にあった。したがって上記厚さ35μmの電極ラ
ンドと比較すると、ソルダーダムは電極ランドよりも最
大で65μm程度背が高いに過ぎない。This solder dam forming method includes:
(1), after printing the resist ink by screen printing,
UV curing or heat curing (maximum thickness 20 μm),
(2), after applying the photosensitive liquid resist ink on the entire surface,
Method of exposing and developing (maximum thickness 20 μm), and (3), method of exposing and developing after applying a photosensitive dry film resist (maximum thickness 100 μm), 3.
The method is used, and the solder dam thickness is 20 to 100 μm.
Was in the range. Therefore, as compared with the electrode land having the thickness of 35 μm, the solder dam is only about 65 μm taller than the electrode land at the maximum.
【0004】[0004]
【発明が解決しようとする課題】図4(a)はプリント
配線板1の銅箔電極ランド2上に、従来の方法でクリー
ムはんだ3を印刷した後の概略平面図である。このクリ
ームはんだ3が150μm以上の厚さで印刷されると、
電極ランド2上に同図に示すごとくほぼ等面積で印刷さ
れても、リフローはんだ付けすれば予備加熱工程でクリ
ームはんだの溶剤分やフラックス、チキソトロピー剤等
の固形分が熱により流動化し、クリームはんだ全体は図
4(b)に示すように崩れて広がってしまうから、隣り
合う電極ランド2上のクリームはんだ3が互いに接触す
るに至り、リフローはんだ付けに際し、はんだブリッジ
不良を効果的に防止することができない。FIG. 4A is a schematic plan view after the cream solder 3 is printed on the copper foil electrode lands 2 of the printed wiring board 1 by the conventional method. When this cream solder 3 is printed with a thickness of 150 μm or more,
Even if printed on the electrode land 2 in substantially the same area as shown in the figure, if the reflow soldering is performed, the solvent content of the flux solder, the flux, and the solid content such as the thixotropic agent are fluidized by heat, and the cream solder is Since the whole is collapsed and spread as shown in FIG. 4B, the cream solders 3 on the adjacent electrode lands 2 come into contact with each other, and solder bridge defects are effectively prevented during reflow soldering. I can't.
【0005】またフラットパッケージICの端子ピッチ
が0.5→0.4→0.3→0.25mmと狭くなるに
つれ、クリームはんだを印刷するためのメタルスクリー
ンの開口部のスリット幅も、0.25→0.2→0.1
5→0.125mmと微細化する必要に迫られる。その
際、はんだ接合に必要なクリームはんだ量を確保するた
めに従来のメタルスクリーンの厚さは変更できないか
ら、スリット幅が0.2mm以下になると目詰まりによ
るクリームはんだの印刷かすれを生じて印刷性が著しく
低下し、その結果、はんだの電極ランド2上への供給が
不足して、良好なはんだ接合を得ることが困難になると
いう問題があった。As the terminal pitch of the flat package IC becomes narrower from 0.5 to 0.4 to 0.3 to 0.25 mm, the slit width of the opening of the metal screen for printing the cream solder also becomes 0. 25 → 0.2 → 0.1
It is necessary to miniaturize from 5 to 0.125 mm. At that time, since the thickness of the conventional metal screen cannot be changed in order to secure the amount of cream solder required for solder joining, when the slit width is 0.2 mm or less, the printability of the cream solder is reduced due to clogging and printability. Was significantly reduced, and as a result, there was a problem that the supply of solder onto the electrode land 2 was insufficient and it was difficult to obtain a good solder joint.
【0006】これを図5で説明すると、メタルスクリー
ン4の開口部4aのスリット幅が例えば0.25mm
(端子ピッチは0.5mm)の場合は、図5(a)に示
すように電極ランド2上のクリームはんだ3はその厚さ
が一様である。次に上記開口部4aのスリット幅が例え
ば0.20mm(端子ピッチは0.4mm)になると、
図5(b)に示すように電極ランド2上のクリームはん
だ3はその厚さが一様でなくなる。さらにメタルスクリ
ーン4の開口部4aのスリット幅が例えば0.15mm
(端子ピッチは0.3mm)になると、上記開口部4a
に目詰まりを生じ、必要量のクリームはんだ3が電極ラ
ンド2上に供給されないことになる。なお図で符号5は
スキージである。To explain this with reference to FIG. 5, the slit width of the opening 4a of the metal screen 4 is, for example, 0.25 mm.
When the terminal pitch is 0.5 mm, the cream solder 3 on the electrode lands 2 has a uniform thickness as shown in FIG. Next, when the slit width of the opening 4a becomes 0.20 mm (terminal pitch is 0.4 mm),
As shown in FIG. 5B, the thickness of the cream solder 3 on the electrode land 2 is not uniform. Further, the slit width of the opening 4a of the metal screen 4 is, for example, 0.15 mm.
When the terminal pitch becomes 0.3 mm, the opening 4a is formed.
This causes clogging, and the required amount of cream solder 3 is not supplied onto the electrode lands 2. In the figure, reference numeral 5 is a squeegee.
【0007】本発明は上述の点に鑑み、0.5mm以下
の端子ピッチを持つフラットパッケージICのリフロー
はんだ付けに際し、電極ランド間ブリッジ形成によるは
んだ付け不良を効果的に防止できるプリント配線板を提
供することにある。In view of the above points, the present invention provides a printed wiring board which can effectively prevent soldering failure due to bridge formation between electrode lands during reflow soldering of a flat package IC having a terminal pitch of 0.5 mm or less. To do.
【0008】[0008]
【課題を解決するための手段】本発明は、その所望の面
に取り付けた2枚のドライフイルム状ソルダーレジスト
を露光、現像することにより、上記所望の面上の所望位
置に厚さ100μm以上のソルダーダムを形成するプリ
ント配線板に係るものである。According to the present invention, two dry film-like solder resists attached to a desired surface thereof are exposed and developed to form a film having a thickness of 100 μm or more at a desired position on the desired surface. The present invention relates to a printed wiring board forming a solder dam.
【0009】上記プリント配線板は、上記所望の面に第
1のフイルム状ソルダーレジストを張り付けて露光、現
像を行うと共に、この第1のソルダーレジスト上に第2
のフイルム状ソルダーレジストを張り付けて露光、現像
を行うことにより、上記所望の面上の所望位置に厚さ1
00μm以上のソルダーダムを形成してよく、また上記
所望の面に第1のフイルム状ソルダーレジストを張り付
け、この第1のソルダーレジスト上に第2のフイルム状
ソルダーレジストを張り付けて、 その後の露光、現像
により上記所望の面上の所望位置に厚さ100μm以上
のソルダーダムを形成してもよい。なお上記フイルム状
ソルダーレジストは、アルカリ現像型または水溶性型の
感光性を備えることができる。In the printed wiring board, a first film-like solder resist is attached to the desired surface for exposure and development, and a second film is formed on the first solder resist.
The film-like solder resist of No. 1 is attached, and the film is exposed and developed to have a thickness of 1 at a desired position on the desired surface.
A solder dam having a size of 00 μm or more may be formed, a first film-shaped solder resist may be adhered to the desired surface, and a second film-shaped solder resist may be adhered to the first solder resist, followed by exposure and development. Thus, a solder dam having a thickness of 100 μm or more may be formed at a desired position on the desired surface. The film-shaped solder resist may have an alkali developing type or water-soluble type photosensitivity.
【0010】次に上記ソルダーダムにて囲繞させた電極
ランド間に、フラットパッケージICをリフローはんだ
付けで実装してよく、またこの場合、上記電極ランドを
囲繞させたソルダーダム内にクリームはんだを直接に穴
埋め印刷し、フラットパッケージICをリフローはんだ
付けにて実装してよい。なお上記フラットパッケージI
Cの端子ピッチは0.25〜0.5mmの範囲にあるこ
とができる。Next, the flat package IC may be mounted by reflow soldering between the electrode lands surrounded by the solder dam. In this case, the cream solder is directly buried in the solder dam surrounding the electrode lands. The flat package IC may be printed and mounted by reflow soldering. The above flat package I
The C terminal pitch can be in the range of 0.25 to 0.5 mm.
【0011】[0011]
【作用】本発明によればソルダーダムの厚さが100μ
m以上であるから、プリント配線板電極ランド(厚さ3
5μm)の約3倍以上の厚さを持つソルダーダムの形成
が可能になる。したがって端子ピッチが0.25〜0.
5mmであるフラットパッケージIC用のプリント配線
板の電極ランド間および各電極ランドの周囲にこのよう
なソルダーダムを設けることによって、リフローはんだ
付け時の電極ランド間はんだブリッジ形成に起因する絶
縁不良を防止することができ、高品質のはんだ付けによ
る高密度な実装基板の提供が可能となる。According to the present invention, the thickness of the solder dam is 100 μm.
m or more, the printed wiring board electrode land (thickness 3
It is possible to form a solder dam having a thickness of about 3 times the thickness of 5 μm). Therefore, the terminal pitch is 0.25 to 0.
By providing such a solder dam between electrode lands of a printed wiring board for a flat package IC having a size of 5 mm and around each electrode land, insulation failure due to formation of a solder bridge between electrode lands during reflow soldering is prevented. Therefore, it is possible to provide a high-density mounting board by high-quality soldering.
【0012】[0012]
【発明の実施の形態】厚さ100μm以上のソルダーダ
ムをプリント配線板に形成する方法については、以下の
2方法を提案することができる。先ず第1の方法は図1
に示すごとく、アルカリ現像型又は水溶性型感光性ドラ
イフィルム状ソルダーレジスト6aをプリント回路基板
7上に貼り付け(図1(a))、露光(図1(b))・
現像してソルダーダム8aを形成した後(図1
(c))、このソルダーダム8a上に再び上記レジスト
6aと同じ材料から成るソルダーレジスト6bを貼り付
けて(図1(d))、露光(図1(e))・現像を行な
ってソルダーダム8bを形成し(図1(f))、ソルダ
ーダム8を完成させるものである。なお図で符号2は、
上記プリント回路基板7の電極ランドである。BEST MODE FOR CARRYING OUT THE INVENTION As a method for forming a solder dam having a thickness of 100 μm or more on a printed wiring board, the following two methods can be proposed. First, the first method is shown in FIG.
As shown in Fig. 1, an alkali development type or water-soluble type photosensitive dry film solder resist 6a is attached on the printed circuit board 7 (Fig. 1 (a)) and exposed (Fig. 1 (b)).
After development to form the solder dam 8a (see FIG.
(C)) Then, a solder resist 6b made of the same material as the resist 6a is attached again on the solder dam 8a (FIG. 1 (d)), and exposure (FIG. 1 (e)) and development are performed to form the solder dam 8b. It is formed (FIG. 1 (f)) to complete the solder dam 8. In the figure, reference numeral 2 is
It is an electrode land of the printed circuit board 7.
【0013】すなわちサブトラクト工法による銅箔エッ
チングまたはアディティブ工法による無電解めっきで銅
箔パターンニングを行って電極ランド2を形成した後、
感光性樹脂レジスト層(厚さ50〜100μm)とこの
層を保護するPEまたはPETカバーフィルムおよびキ
ャリアフィルムとから成る構成物を使用してドライフィ
ルム状ソルダーレジスト6aをプリント回路基板7上に
公知の手法により貼り付け、露光、現像して第1層のソ
ルダーダム8aを形成する。That is, after copper foil patterning is performed by copper foil etching by the subtraction method or electroless plating by the additive method to form the electrode land 2,
A dry film solder resist 6a is formed on the printed circuit board 7 by using a composition composed of a photosensitive resin resist layer (thickness: 50 to 100 μm), a PE or PET cover film protecting the layer, and a carrier film. The solder dam 8a of the first layer is formed by pasting, exposing and developing by a method.
【0014】この場合の貼り付けは、真空ラミネート若
しくは常圧ラミネートによって行い、90〜110℃程
度の温度で圧力3〜5kgf/cm2 の下にラミネート
する。露光にはUV平行光による400mJ/cm2 以
上の露光量が必要である。露光後、アルカリ現像型のレ
ジストの場合は1%Na2 CO3 溶液で現像するが、水
溶性現像型のレジストの場合は水、ジエチレングリコー
ルモノブチルエーテル、ほう酸等から成る現像液で現像
する。なお感光性ドライフィルム状ソルダーレジストと
しては、例えば日立化成工業製SR2300G、SR3
000が適している。またこれによって、最小125μ
mまでのダム幅が得られる。The pasting in this case is carried out by vacuum laminating or atmospheric laminating, and laminating at a temperature of about 90 to 110 ° C. and a pressure of 3 to 5 kgf / cm 2 . The exposure requires an exposure amount of 400 mJ / cm 2 or more by UV parallel light. After exposure, in the case of an alkali development type resist, development is carried out with a 1% Na 2 CO 3 solution, whereas in the case of a water-soluble development type resist, development is carried out with a developing solution containing water, diethylene glycol monobutyl ether, boric acid or the like. As the photosensitive dry film solder resist, for example, SR2300G, SR3 manufactured by Hitachi Chemical Co., Ltd.
000 is suitable. This also allows a minimum of 125μ
Dam widths up to m can be obtained.
【0015】次に上記第1層のソルダーダム8a上に、
第1層の場合と同じ材料及び同じ方法を使用して第2層
のソルダーダム8bを形成し、最小幅125μm、全厚
さ100〜200μmのソルダーダム8を完成する。Next, on the first layer solder dam 8a,
The solder dam 8b of the second layer is formed using the same material and the same method as in the case of the first layer to complete the solder dam 8 having a minimum width of 125 μm and a total thickness of 100 to 200 μm.
【0016】次に第2の方法は図2に示すごとく、上記
第1の方法と同様に銅箔パターニングされたプリント回
路基板7上に、やはり同様なラミネート条件下で同じ材
料から成る2枚の感光性ドライフィルム状ソルダーレジ
スト6a、6bを重ねて貼り付け(図2(a))、露光
量を1200mJ/cm2 以上にして一工程で露光し、
現像を行う。これにより第1の方法と同様に、最小幅1
25μm、厚さ100〜200μmのソルダーダム8を
完成させる(図2(b))。The second method is as shown in FIG. 2, in which two sheets of the same material are formed on the printed circuit board 7 on which the copper foil is patterned in the same manner as in the first method, also under the same laminating conditions. Photosensitive dry film solder resists 6a and 6b are laminated and attached (FIG. 2 (a)), the exposure amount is 1200 mJ / cm 2 or more, and exposure is performed in one step,
Perform development. This allows a minimum width of 1 as in the first method.
The solder dam 8 having a thickness of 25 μm and a thickness of 100 to 200 μm is completed (FIG. 2B).
【0017】次に上記何れかの方法により、図2(b)
に示すごとく厚さ150μm、幅150μm、間隔35
0μmのソルダーダムが形成されたプリント配線板7
に、図3に示すごとく端子ピッチ0.5mmのガルウイ
ング型フラットパッケージIC(例えばQFP)をリフ
ローはんだ付けで実装する場合を述べる。なお上記プリ
ント配線板の電極ランドは、図2(b)に示すごとくそ
の厚さが35μm、幅が250μm、間隔が250μm
であった。Next, by any one of the above methods, FIG.
Thickness 150 μm, width 150 μm, spacing 35
Printed wiring board 7 with 0 μm solder dam
3 shows a case where a gull-wing type flat package IC (for example, QFP) having a terminal pitch of 0.5 mm is mounted by reflow soldering as shown in FIG. The electrode lands of the printed wiring board have a thickness of 35 μm, a width of 250 μm, and an interval of 250 μm as shown in FIG.
Met.
【0018】ところでこのような場合に良好なはんだ付
け接合を得るためには、従来、クリームはんだ3は図5
aに示す電極ランド2の頂面積と、メタルスクリーン4
の厚さ150〜180μmとの積(=体積)に相当する
量が必要されている。しかるに本発明の場合は、上記ソ
ルダーダム8と電極ランド2との厚さの差が(150−
35=)115μmであるために、この差で生じる凹部
9のなかにクリームはんだ3を、メタルスクリーン4な
しに穴埋め印刷することによって、上記必要とされるは
んだ量を確保することができる。なお図5に示すよう
に、場合によつてメタルスクリーン4を使用するときで
も、このメタルスクリーン4の厚さは従来に較べてはる
かに薄くできるから、前述のメタルスクリーンの目詰ま
りが起こり難いという長所がある。By the way, in order to obtain a good soldering joint in such a case, conventionally, the cream solder 3 is formed as shown in FIG.
The top area of the electrode land 2 shown in a and the metal screen 4
The amount corresponding to the product (= volume) with the thickness of 150 to 180 μm is required. However, in the case of the present invention, the difference in thickness between the solder dam 8 and the electrode land 2 is (150-
Since 35 =) 115 μm, the necessary solder amount can be secured by performing the fill-in printing of the cream solder 3 in the concave portion 9 generated by this difference without the metal screen 4. As shown in FIG. 5, even when the metal screen 4 is used depending on the case, the thickness of the metal screen 4 can be made much thinner than the conventional one, so that the above-mentioned clogging of the metal screen is unlikely to occur. There are advantages.
【0019】次に上記穴埋め印刷後、端子ピッチ0.5
mmのQFPの端子10を所定の電極ランド2上に図3
に示すごとく搭載する。この例では厚さ120〜130
μm、幅180μmの端子10を、深さが115μmの
凹部9中に置くことになるから、この凹部9よりも寸法
がやヽ小さい上記端子10は、上記凹部9に嵌入されて
ソルダーダム8で囲まれた形となる。従って部品の位置
ずれに由来する不良が発生しにくい。またこのように位
置ずれを生じないから、端子ピッチ0.5mmのフラッ
トパッケージICは、自動装着設備を使わずに手作業で
上記電極ランド2上に搭載することも可能になる。Next, after the above hole filling printing, the terminal pitch is 0.5.
3 mm of the QFP terminal 10 on the predetermined electrode land 2.
Install as shown in. In this example, the thickness is 120 to 130.
Since the terminal 10 having a width of 180 μm and a width of 180 μm is placed in the recess 9 having a depth of 115 μm, the terminal 10 having a size slightly smaller than the recess 9 is fitted into the recess 9 and surrounded by the solder dam 8. It will be shaped like Therefore, it is difficult for defects to occur due to displacement of parts. Further, since such positional deviation does not occur, the flat package IC having a terminal pitch of 0.5 mm can be manually mounted on the electrode land 2 without using automatic mounting equipment.
【0020】上記搭載後、クリームはんだ3は150℃
で予備加熱したあと、240℃のリフロー加熱を行う。
この場合本発明では、クリームはんだ3の隣接電極ラン
ド2への流動がソルダーダム8によりブロックされるた
め、図4(b)に示したように、隣接するランド間でク
リームはんだ同士が互いに接触し、ブリッジを形成する
ような不都合は生じない。したがってはんだブリッジ不
良の確率は著しく低減される。After the above mounting, the cream solder 3 is at 150 ° C.
After preheating at, reflow heating at 240 ° C. is performed.
In this case, in the present invention, the flow of the cream solder 3 to the adjacent electrode land 2 is blocked by the solder dam 8. Therefore, as shown in FIG. 4B, the cream solders contact each other between the adjacent lands, The inconvenience of forming a bridge does not occur. Therefore, the probability of solder bridge failure is significantly reduced.
【0021】下表は、上述した例の場合と、従来の方法
によった場合との端子数当たりの不良発生率を比較した
ものである。 上表から本発明の不良発生率が、従来のプリント配線板
に較べて格段に低いことが、明瞭に看取できるであろ
う。The table below compares the defect occurrence rate per the number of terminals between the case of the above-mentioned example and the case of the conventional method. It can be clearly seen from the above table that the defect occurrence rate of the present invention is significantly lower than that of the conventional printed wiring board.
【0022】[0022]
【発明の効果】本発明は上述のような構成であるから、
0.5mm以下の端子ピッチをもつフラットパッケージ
ICを、高いリフローはんだ付け品質でプリント配線板
に実装することができる。それ故、実装工程におけるは
んだ付け不良箇所修正工数が削減可能である。Since the present invention has the above configuration,
A flat package IC having a terminal pitch of 0.5 mm or less can be mounted on a printed wiring board with high reflow soldering quality. Therefore, it is possible to reduce the number of man-hours for correcting the defective soldering portion in the mounting process.
【0023】またプリント配線板に、0.5mm以下の
端子ピッチをもつフラットパッケージICを高品質で実
装できるから、電子回路実装基板の小型化を図ることが
できる。したがって基板材料の低コスト化のみならず、
配線長を短くすることによる電磁ノイズの低減化や電気
信号伝搬特性の向上が可能になる。Further, since the flat package IC having a terminal pitch of 0.5 mm or less can be mounted on the printed wiring board with high quality, the electronic circuit mounting board can be downsized. Therefore, not only cost reduction of substrate material,
By reducing the wiring length, it is possible to reduce electromagnetic noise and improve electric signal propagation characteristics.
【0024】さらにクリームはんだをメタルスクリーン
を使用することなく、プリント配線板に供給できるか
ら、メタルスクリーンの材料費、加工費が不用になる。Furthermore, since the cream solder can be supplied to the printed wiring board without using a metal screen, the material cost and processing cost of the metal screen become unnecessary.
【0025】またメタルスクリーンを使用する場合で
も、ソルダーダムにより生じる深さ65〜165μmの
凹部の存在により、メタルスクリーン自体の厚みを85
μm以下に薄くすることかできるため、メタルスクリー
ン開口部のクリームはんだの通過性、塗布性が良好にな
り、クリームはんだの印刷性が大幅に向上する。Even when a metal screen is used, the thickness of the metal screen itself is 85 due to the presence of the recesses having a depth of 65 to 165 μm caused by the solder dam.
Since the thickness can be made as thin as μm or less, the passability and the coating property of the cream solder in the opening of the metal screen are improved, and the printability of the cream solder is significantly improved.
【図1】2枚のドライフィルム状ソルダーレジストを順
に重ね、厚さ100μm以上のソルダーダムを形成する
第1の方法を示した本発明に係るプリント配線板の側部
断面図である。FIG. 1 is a side sectional view of a printed wiring board according to the present invention showing a first method of forming two solder resists in the form of dry films in order to form a solder dam having a thickness of 100 μm or more.
【図2】2枚のドライフィルム状ソルダーレジストを同
時に重ね、厚さ100μm以上のソルダーダムを形成す
る第2の方法を示した本発明に係るプリント配線板の側
部断面図である。FIG. 2 is a side sectional view of a printed wiring board according to the present invention showing a second method of forming two solder resists in the form of dry films at the same time to form a solder dam having a thickness of 100 μm or more.
【図3】図1または2に示すプリント配線板にガルウイ
ング型フラットパッケージICを実装した状態を示す一
部切断側部断面図である。FIG. 3 is a partially cut side sectional view showing a state in which a gull wing type flat package IC is mounted on the printed wiring board shown in FIG. 1 or 2.
【図4】電極ランド間にソルダーダムを設けないため、
はんだブリッジ不良が生じた場合の説明図である。[Fig. 4] Since a solder dam is not provided between the electrode lands,
It is an explanatory view when a solder bridge defect occurs.
【図5】電極ランド上のクリームはんだの形状が、メタ
ルスクリーン開口部の狭幅となるにつれて不良になる状
況を示す説明図である。FIG. 5 is an explanatory diagram showing a situation in which the shape of the cream solder on the electrode land becomes defective as the width of the metal screen opening becomes narrower.
1 プリント配線板 2 電極ランド 3 クリームはんだ 4 メタルスクリーン 4a 開口部 5 スキージ 6a 第1層のソルダーレジスト 6b 第2層のソルダーレジスト 7 プリント回路基板 8 ソルダーダム 8a 第1層のソルダーダム 8b 第2層のソルダーダム 9 凹部 10 端子 1 Printed Wiring Board 2 Electrode Land 3 Cream Solder 4 Metal Screen 4a Opening 5 Squeegee 6a First Layer Solder Resist 6b Second Layer Solder Resist 7 Printed Circuit Board 8 Solder Dam 8a First Layer Solder Dam 8b Second Layer Solder Dam 9 recess 10 terminal
Claims (7)
イルム状ソルダーレジストを露光、現像することによ
り、上記所望の面上の所望位置に厚さ100μm以上の
ソルダーダムを形成したプリント配線板。1. A printed wiring board in which a solder dam having a thickness of 100 μm or more is formed at a desired position on the desired surface by exposing and developing two dry film-like solder resists attached to the desired surface.
レジストを張り付けて露光、現像を行うと共に、この第
1のソルダーレジスト上に第2のフイルム状ソルダーレ
ジストを張り付けて露光、現像を行うことにより、上記
所望の面上の所望位置に厚さ100μm以上のソルダー
ダムを形成した請求項1記載のプリント配線板。2. A first film-shaped solder resist is adhered to the desired surface for exposure and development, and a second film-shaped solder resist is adhered on the first solder resist for exposure and development. The printed wiring board according to claim 1, wherein a solder dam having a thickness of 100 μm or more is formed at a desired position on the desired surface.
レジストを張り付け、この第1のソルダーレジスト上に
第2のフイルム状ソルダーレジストを張り付けて、その
後の露光、現像により上記所望の面上の所望位置に厚さ
100μm以上のソルダーダムを形成した請求項1記載
のプリント配線板。3. A first film-shaped solder resist is adhered to the desired surface, a second film-shaped solder resist is adhered to the first solder resist, and the desired surface is then exposed and developed. The printed wiring board according to claim 1, wherein a solder dam having a thickness of 100 μm or more is formed at a desired position of the above.
リ現像型または水溶性型の感光性を備える請求項1、2
または3記載のプリント配線板。4. The film-shaped solder resist has an alkali developing type or water-soluble type photosensitivity.
Or the printed wiring board described in 3.
ド間に、フラットパッケージICをリフローはんだ付け
で実装した請求項1、2、3または4記載のプリント配
線板。5. The printed wiring board according to claim 1, wherein a flat package IC is mounted by reflow soldering between the electrode lands surrounded by the solder dam.
内にクリームはんだを直接に穴埋め印刷し、フラットパ
ッケージICをリフローはんだ付けにて実装した請求項
5記載のプリント配線板。6. The printed wiring board according to claim 5, wherein cream solder is directly buried and printed in a solder dam surrounding the electrode land, and a flat package IC is mounted by reflow soldering.
は0.25〜0.5mmの範囲にある請求項5または6
記載のプリント配線板。7. The terminal pitch of the flat package IC is in the range of 0.25 to 0.5 mm.
The printed wiring board as described.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8061839A JPH09232741A (en) | 1996-02-23 | 1996-02-23 | Printed wiring board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8061839A JPH09232741A (en) | 1996-02-23 | 1996-02-23 | Printed wiring board |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH09232741A true JPH09232741A (en) | 1997-09-05 |
Family
ID=13182672
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8061839A Pending JPH09232741A (en) | 1996-02-23 | 1996-02-23 | Printed wiring board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH09232741A (en) |
Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2003043392A1 (en) * | 2001-11-12 | 2003-05-22 | Array Ab | Method and assembly for producing a printed circuit board |
| JP2008004809A (en) * | 2006-06-23 | 2008-01-10 | Mitsubishi Electric Corp | Mounting board |
| JP2008210993A (en) * | 2007-02-26 | 2008-09-11 | Nec Corp | Printed wiring board and method of manufacturing the same |
| JP2012033785A (en) * | 2010-07-31 | 2012-02-16 | Kyocer Slc Technologies Corp | Wiring board and method of manufacturing the same |
| KR101229258B1 (en) * | 2011-07-01 | 2013-02-04 | 대덕전자 주식회사 | Method of manufacturing a pad for chip-embedded printed circuit board |
| KR20130112736A (en) * | 2012-04-04 | 2013-10-14 | 산에이카가쿠 가부시키가이샤 | Solder-mounted board, production method therefor, and semiconductor device |
| CN105338755A (en) * | 2015-11-23 | 2016-02-17 | 深圳崇达多层线路板有限公司 | Fabrication method of circuit board solder mask layer |
| JPWO2016185607A1 (en) * | 2015-05-21 | 2017-06-01 | 株式会社メイコー | Printed wiring board and method for manufacturing printed wiring board |
| WO2023191037A1 (en) * | 2022-03-31 | 2023-10-05 | 太陽ホールディングス株式会社 | Laminate cured body, printed wiring board having same, and laminate cured body manufacturing method |
-
1996
- 1996-02-23 JP JP8061839A patent/JPH09232741A/en active Pending
Cited By (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2003043392A1 (en) * | 2001-11-12 | 2003-05-22 | Array Ab | Method and assembly for producing a printed circuit board |
| JP2008004809A (en) * | 2006-06-23 | 2008-01-10 | Mitsubishi Electric Corp | Mounting board |
| JP2008210993A (en) * | 2007-02-26 | 2008-09-11 | Nec Corp | Printed wiring board and method of manufacturing the same |
| JP2012033785A (en) * | 2010-07-31 | 2012-02-16 | Kyocer Slc Technologies Corp | Wiring board and method of manufacturing the same |
| KR101229258B1 (en) * | 2011-07-01 | 2013-02-04 | 대덕전자 주식회사 | Method of manufacturing a pad for chip-embedded printed circuit board |
| JP2013232617A (en) * | 2012-04-04 | 2013-11-14 | Sanei Kagaku Kk | Solder mounting board, method for manufacturing the same, and semiconductor device |
| KR20130112736A (en) * | 2012-04-04 | 2013-10-14 | 산에이카가쿠 가부시키가이샤 | Solder-mounted board, production method therefor, and semiconductor device |
| TWI501369B (en) * | 2012-04-04 | 2015-09-21 | 山榮化學股份有限公司 | Solder mounting substrate and method of manufacturing the same, and semiconductor device |
| US9565754B2 (en) | 2012-04-04 | 2017-02-07 | San-Ei Kagaku Co., Ltd. | Solder-mounted board, production method therefor, and semiconductor device |
| JPWO2016185607A1 (en) * | 2015-05-21 | 2017-06-01 | 株式会社メイコー | Printed wiring board and method for manufacturing printed wiring board |
| CN105338755A (en) * | 2015-11-23 | 2016-02-17 | 深圳崇达多层线路板有限公司 | Fabrication method of circuit board solder mask layer |
| CN105338755B (en) * | 2015-11-23 | 2018-04-24 | 深圳崇达多层线路板有限公司 | A kind of production method of wiring board solder mask |
| WO2023191037A1 (en) * | 2022-03-31 | 2023-10-05 | 太陽ホールディングス株式会社 | Laminate cured body, printed wiring board having same, and laminate cured body manufacturing method |
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