JPH09269476A - Liquid crystal display device - Google Patents

Abstract

(57) Abstract: A liquid crystal display device capable of minimizing the residual charges of liquid crystal and active elements when the power is off. In an active matrix type liquid crystal display device using a two-terminal active element (MIM), a capacitor holding a logic voltage for controlling the MIM element and a detection unit for detecting OFF of a power switch. When,
When the detection unit 3 detects that the power switch 2 is off, the control unit 4 gradually decreases the drive voltage supplied to the scanning line drive circuit 6 according to a predetermined curve.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device using a 2-terminal active element.

[0002]

2. Description of the Related Art In recent years, liquid crystal display devices have been widely used in liquid crystal televisions, personal word processors, personal computers and the like as low power consumption and lightweight display devices. In order to display more image information in the future, it is expected that the number of pixels and the number of gradations will increase.
Such an increase in the number of pixels and the number of gradations means an increase in the capacity of display image information. As a result, the scanning period of one line of the liquid crystal display device is gradually shortened, and gradations are controlled more finely. It was

As a method for controlling the gradation of such a liquid crystal display device, a frame modulation method for controlling the gradation between a plurality of frames and a control of the pulse height and the pulse width of the data signal within the selection period are performed. The pulse height modulation method and the pulse width modulation method have been conventionally used. Among them, the pulse width modulation method divides the horizontal selection period into a plurality of periods according to the number of gradations, and changes the write pulse width during which the ON component is added to the data line in the horizontal selection period. This is a method of displaying gradation.

Further, an active matrix type liquid crystal display device is one of the liquid crystal display devices which meet the above-mentioned demand for increasing both the number of pixels and the number of gradations. One of the features of the active matrix liquid crystal display device is that an active element is provided for each pixel to store image information. The active element used in the active matrix liquid crystal display device is amorphous silicon T
3 terminal type element represented by FT element, and MIM (conductor-
There is a two-terminal element represented by an insulator-conductor element.
In both cases, by using the switching function of the active element, the number of drive lines is increased and a large amount of image information is displayed as compared with a simple matrix liquid crystal display device.

The two-terminal type element includes the MIM element described above, a back-to-back diode element, a diode ring element, a varistor element, and the like, all of which have nonlinear current-voltage characteristics. There is. FIG. 9 is a diagram showing the current-voltage characteristics of the MIM element most widely used as the two-terminal active element. The horizontal axis represents the voltage applied to the MIM element and the vertical axis represents the current, and it can be seen that the current-voltage characteristics are non-linear. FIG. 10 is a diagram showing an equivalent circuit of one pixel of the liquid crystal display device using the MIM element. The drive voltage is V _D , the voltage applied to the liquid crystal layer is V _LC , MI
The voltage applied to the M element is V _MIM . R _LC and C _LC represent the resistance value and the capacitance value of the liquid crystal layer, respectively, and R _MIM and C _MIM
Indicates the resistance value and the capacitance value of the MIM element. In the liquid crystal display device, the equivalent circuit shown in FIG. 10 is arranged in a matrix. Any one of a plurality of scanning lines and data lines is connected to each equivalent circuit, and a pixel to be driven is selected by selecting a predetermined scanning line and data line. .

FIG. 11 is a diagram showing an ideal waveform when driving a liquid crystal panel using a two-terminal active element. Pulse width modulation is performed by using four-valued voltage levels (V _{Y1 to} V _Y4 ) on the scanning side to suppress leakage during the non-selection period and using two-valued voltage levels (V _X1 , V _X2 ) on the data side. It is an ideal waveform when performing. Further, as the alternating method, in this example, frame inversion and one line inversion are adopted. The data line drive signal SEG is set to a waveform that gives an intermediate value. As the scanning signal COM, the voltage level of V _Y4 is output when the alternating signal (FR) is at the high level and the voltage level of V _Y2 is output when the alternating signal (FR) is at the low level during the selection period (T _S ). In the non-selection period (T _ns ),
V _Y1 or V _Y3 is output. When such a voltage is applied to the scan line and the data line, the difference voltage (SEG-COM) between the scan electrode and the data electrode is the drive voltage V applied between the liquid crystal element and the MIM element shown in FIGS. It becomes _D.

FIG. 12 shows the drive voltage (V _D ), the voltage applied to the liquid crystal layer (V _LC ), and the voltage applied to the MIM element (V _MIM ) when the gradation data is halftone data. When displaying the grayscale data, a period in which the voltage applied to the MIM element is high is a portion in which the data voltage is switched to the ON voltage level. In this portion, a current flows due to the non-linear characteristic of the MIM element, and the voltage rapidly increases in the liquid crystal element. Be charged.

[0008]

By the way, in the above-mentioned conventional liquid crystal display device, when the power is turned off, the logic voltage which is the terminal voltage of the power supply for driving the internal logic section becomes equal to the capacitance of the power supply and the load current. The driving circuit of the panel stops its operation when the voltage drops below a certain voltage value. Although the voltage applied to the panel at this point is indefinite, any one of the voltages V _{Y1 to} V _Y4 is applied to each scan electrode and V _X1 is applied to each data electrode. Alternatively, V _X2 is continuously applied. In this state, the MIM of each pixel
Since the element becomes constant in the off or on state, the voltage of the liquid crystal layer is charged in the direction in which the absolute value becomes larger,
Either the state in which the voltage once charged continues to be retained during operation.

In any case, a direct current voltage is continuously applied to the liquid crystal and the MIM element, which is a cause of deterioration of characteristics for both, as is well known. In addition, the application of the DC voltage generated when the power is turned off causes problems such as the generation of black lines along the scan line and the display just before the power is turned off. It is also known to cause flicker.

The present invention has been made under such a background, and an object thereof is to provide a liquid crystal display device capable of minimizing the residual charges of the liquid crystal and the active element when the power is off.

[0011]

In order to solve the above-mentioned problems, the invention according to claim 1 is for controlling an active matrix type liquid crystal display device using a plurality of two-terminal active elements. The control voltage holding means for holding the control voltage, the detection means for detecting the interruption of the power supply, and the voltage control means for starting to gradually decrease the voltage applied to the active element after the detection means detects the interruption of the power supply It is characterized by doing.

According to a second aspect of the present invention, the active element is arranged at the intersection of the scanning line and the signal line, and the applied voltage is controlled by the scanning line driving means and the signal line driving means. And further comprising signal generating means for generating a selection instruction signal for instructing the scanning line driving means to select a plurality of scanning lines at the same time when the detection means detects a power interruption. There is.

According to the above structure, when the cutoff of the power supply is detected, the voltage applied to the two-terminal active element starts to be gradually reduced while the control voltage is held. Therefore, the active element in the active matrix type liquid crystal display device is activated. The power supply will not be interrupted while the liquid crystal connected to the device and the element itself are still charged. Further, by simultaneously selecting a plurality of scanning lines, it becomes possible to discharge the electric charges stored in the liquid crystal in a short time.

[0014]

DETAILED DESCRIPTION OF THE INVENTION An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing a liquid crystal display device which is an embodiment of the present invention. In the figure, reference numeral 1 denotes a DC / DC converter, which converts a DC voltage supplied from a DC power supply V _B configured by a commercial power supply, a battery, etc., via a power switch 2, to a liquid crystal drive voltage V _It is converted into _Y2a and V _Y4a and a logic voltage V _DD and output. Note that the logic voltage V _DD is not the one described here,
It may be supplied from an external device. Reference numeral 3 denotes a power-off detector, which sets the control signal OFF to the high level when detecting that the logic voltage V _DD has dropped. Four
Is a liquid crystal drive power supply control unit, and the control signal is OFF
_Becomes high level, the liquid crystal drive voltage V _Y2a
While gradually decreasing V _Y4a and V _Y4a ,
Output as _Y2 and V _Y4 .

Reference numeral 5 denotes a panel. In this embodiment, an MIM element similar to that described with reference to FIGS. 9 and 10 is an active matrix type in which pixels composed of active elements and liquid crystals are arranged in a matrix. I am using a liquid crystal panel. _{Reference numeral} 6 denotes a scanning line drive circuit, which is a liquid crystal drive voltage V _Y1 , V
_{Using Y2} , _VY3 and _VY4 , a predetermined voltage waveform is applied to the plurality of scan electrodes connected to the plurality of scan lines of the panel 5. 7 is a data line drive circuit, which is a liquid crystal drive voltage V
_X1 and V _X2 (in this case, logic voltage V _DD and ground potential GN
D) is used to apply a predetermined voltage waveform to the plurality of data electrodes connected to the plurality of data lines of the panel 5.

Reference numeral 8 denotes a logic control unit, which is composed of a plurality of logic circuits that operate using the logic voltage V _DD as a power supply voltage, and based on a video signal or the like supplied from the outside, a scanning line drive circuit 6 and a data line. The drive circuit 7 is controlled. 9 is a capacitor, in order to normally stabilize the logic voltage V _DD during, also used to hold the logic voltage V _DD predetermined time when the power switch 2 is turned off.

With the above structure, in the liquid crystal display device shown in FIG. 1, when the power switch 2 is normally turned on,
The logic control unit 8 controls the scanning line driving circuit 6 and the data line driving circuit 7 based on the video signal, and controls the driving voltage V _D of each liquid crystal pixel provided on the panel 5 (FIG. 1).
0). 2 above n lines (n is a natural number) is a timing chart showing a driving voltage V _{D Roh} waveform applied to the liquid crystal pixels in the liquid crystal pixel and n + 1 line on with. Since a voltage of the difference between the applied voltages of the scanning line and the data line is applied to each pixel, in this case, V _DD -V _{Y4 and} -V _Y2 (= 0-V
_Y2 ) will be applied. Further, the voltage value of the liquid crystal voltage V _LC is controlled by controlling the length of T _on by the pulse width control (curve indicated by the dotted line in the figure). Further, the waveform is inverted for each frame to make alternating current, and the polarity of the applied voltage is inverted even during one selection period.

On the other hand, when the power switch 2 is turned off,
The power-off detection unit 3 detects it, and while the logic voltage V _DD is being held, the liquid crystal drive power supply control unit 4 drops the liquid crystal drive voltages V _Y2 and V _Y4 along an optimum curve unique to the panel 5. Then, the voltage V _{LC of the} liquid crystal layer is gradually discharged. Then, the voltage V _{LC of the} liquid crystal layer is lowered to a voltage at which there is no problem until the driving circuits 6 and 7 stop operating. FIG. 3 shows the drive voltage V of one pixel when the power is off.
₆ is a timing chart showing waveforms of _D and a liquid crystal voltage V _LC . In this case, instead of the normal driving method when the power is off, a driving method in which all the scanning lines are selected is adopted. In this method, the time from when the power is turned off until the drive circuits 6 and 7 of the panel 5 stop operating,
That is, it is possible to shorten the time required to sufficiently drop the voltages of all the liquid crystal layers. Then, when the logic control unit 8 stops operating, the change in the waveform of the drive voltage V _D stops. The time from when the power is turned off until the logic control section 8 stops operating is
It can be adjusted by appropriately setting the capacitance of the capacitor 9, and is set to be sufficiently longer than the time required for the liquid crystal voltage V _LC to drop to a predetermined value. As a driving method when the power is off, it is not always necessary to use a method in which all the scanning lines are selected, and the voltage of the liquid crystal may be lowered while driving by the same driving method as in the normal case.

The configuration and operation of each section shown in FIG. 1 will be described in detail below. FIG. 4 is a circuit diagram showing the internal configuration of the power-off detector 3. In FIG. 4, 41 is a PNP transistor, 42 is a capacitor, and 43 is a logic voltage V _DD.
The diodes 42 and 45 for charging the capacitor 42 are resistors connected to the collector and base of the transistor 41. The control signal OFF is taken out from the collector of the transistor 41. With this configuration, when the logic voltage V _DD drops by about 0.7 V from the steady state, the control signal OFF becomes High level, and the power off is detected. Note that as the power-off detection unit 3, a general-purpose voltage detection IC or the like may be used instead of the one shown in this figure. In addition, in a device including a battery, a switch is separately provided for instructing power on / off, and when the switch is operated, the power of each unit can be controlled to be turned off according to a predetermined sequence. That is, the OFF signal is not generated by detecting the decrease of the logic voltage V _DD , but the OFF signal is generated when the switch operation for instructing the power-off is detected, and the drive voltage is gradually reduced, and then, for a predetermined time. It is possible to turn off the logic voltage V _DD later.

FIG. 5 is a circuit diagram showing the configuration of the liquid crystal drive power supply control section 4. In FIG. 5, 51 and 52 are PNP transistors, 53 and 54 are NPN transistors, 55 is an inverter, 56 to 59 and R2 and R4 are resistors, and C2 and C4 are capacitors. In this configuration, when the control signal OFF becomes the high level, the four transistors 51 to 54 are turned off and the voltage supply to V _Y2 and V _Y4 is turned off. After that, the voltages V _Y2 and V
_Y4 decreases in accordance with the size of the capacitor C2 and the resistor R2, the capacitor C4 and the resistor R4, and the load applied by each voltage. Therefore, by setting the capacitor C1 (see FIG. 1) between V _{DD and} GND to a certain value or more and optimizing the time constants of the capacitor C2 and the resistor R2, and the capacitor C4 and the resistor R4, the liquid crystal drive voltage is set to a predetermined value. It is possible to descend along the curve. In addition, V _Y2
The supply of the voltage to V _Y4 and V _Y4 can be turned off by stopping the operation of the DC-DC converter 1 instead of turning off by the switching means such as a transistor as shown in FIG. .

In the circuit shown in FIG. 5, the voltages V _Y2 and V _Y4 are always applied to the resistors R2 and R4.
By inserting transistors one by one in series with 2 and R4, keeping them off during normal operation, and turning on those transistors wp only when the OFF signal becomes high level, the power consumption during normal operation is reduced. It is also possible to let.

FIG. 6 is a circuit diagram showing another example of the configuration of the liquid crystal drive power source control section 4, and elements having the same operations as those shown in FIG. 5 are designated by the same reference numerals. The circuit shown in FIG. 6 is used when the operation of the DC / DC converter 1 is stopped when the power is off. Further, the transistors 61 and 62 have the above-mentioned resistors R2 and R4 during normal operation.
This is to reduce the power consumed by the.

Next, with reference to FIG. 7, a configuration for selecting all the scanning lines when the power is off will be described. Figure 7
2A, a control signal (shift pulse, which is supplied from the logic control unit 8 to the scanning line driving circuit 6 is
DY, SEL), and (b) and (c) are logical values stored in a shift register provided internally in the scanning line driving circuit 6 based on the control signal shown in (a). Is represented. The shift registers shown in (b) and (c) are ones in which the same number of registers as scan electrodes are connected in series, and the outputs of the registers are the scan signals COM1, COM2, ..., COM240.
Becomes However, in this case, the number of scanning lines of the panel 5 is 240.

The scanning line drive circuit 6 shifts the level input by the control signal DY on the internal shift register according to the shift pulse, and performs each scanning according to the polarity signal FR (see FIG. 11) and the level of the shift register. The output level applied to the electrodes is set to one of V _{y1 to} V _y4 (see the same figure). During normal driving, a voltage is applied to the scan electrodes so that only one of the scan lines is selected. FIG. 7B shows the state of the shift register at the time t ₁ shown in FIG. 7A, which shows the state at the normal time. On the other hand, FIG. 7C shows time t ₂
Shows the state of the shift register when one frame period has elapsed since the power-off was detected. In this case, the High level is stored in all the registers. This is done by fixing the signal DY to the High level after detecting that the OFF signal has become the High level in the logic control unit 8. When all the registers of the shift register are set to the high level, all the scanning lines are selected, and the voltages V _y2 and V _y4 are alternately applied to all the scanning lines for each shift pulse (see FIG. 3). .
When all the scanning lines are selected, the load on the capacitor C2 or C4 shown in FIG. 5 or 6 becomes larger, so that the voltage of the liquid crystal layer can be lowered more quickly than in the case where no selection is made. .

As described above, in the configuration shown in FIG. 7, all the scanning lines are selected only by fixing the signal DY when the power is off, so that the existing scanning line driving circuit can be used as it is. There is an advantage that you can. In the example shown in FIG. 7, the frequency of the shift pulse is not changed between the normal time and the power off, but it is also possible to operate so that the frequency of the shift pulse is increased only when the power is off. In this case, some circuit change is required for the logic control unit 8, but by increasing the frequency of the shift pulse, the time required for full selection can be shortened.

FIG. 8 is a block diagram showing another structure for selecting all the scanning lines. In the configuration shown in this figure, each output of the shift register is input to a two-input OR gate newly provided corresponding to each output. The newly provided signal SEL is input to the other input terminal of each OR gate. Then, each scanning signal COM1
~ COM 240 is obtained as the output of each OR gate. With this configuration, the signal SEL is set to High when the power is off.
By setting to the h level, it becomes possible to instantly select all the scanning lines. Therefore, as compared with the example shown in FIG. 7, the voltage of the liquid crystal layer can be lowered more quickly.

In the above description of the embodiment, the liquid crystal display device using the MIM element is described as a representative example, but the present invention can be applied to other two-terminal active elements. . It can also be applied to the so-called "shaking power supply".

[0028]

[Embodiment] According to the result confirmed by the experiment using the configuration shown in FIG. 1, when all the scanning lines are not selected,
In a liquid crystal display device using 0 × 240 dots, about 5 inches MIM, when the frame cycle is 60 Hz, C1
= 470 μF, C2 = C4 = 10 μF, R2 = R4 =
The time from the detection of OFF to the stop of the operation of the panel drive circuit is 70 ms, and V _Y2 and V _Y4 are respectively set to V _DD when the operation of the panel drive circuit is stopped.
When the voltage was lowered along the curves such as + 3V and GND-3V, each circuit operated in a desired sequence, and the charge of the liquid crystal layer could be sufficiently discharged.

When all the scanning lines are selected and the frequency of the shift clock is not changed, 960 ×
In a liquid crystal display device using MIM of 240 dots and about 5 inches, C1 = 2 when the frame cycle is 60 Hz.
20 μF, C2 = C4 = 3.3 μF, R2 = R4 = 4.
It is set to 7 kΩ, the time from the detection of OFF to the stop of the operation of the panel drive circuit is 30 ms, and V _Y2 and V _Y4 are respectively V _DD +3 when the operation of the panel drive circuit is stopped.
When descending along a curve such as V and GND-3V, the same good result as in the case of not performing full selection in a short time operation could be obtained.

Further, when the logic control unit 8 inputs a shift pulse having a frequency twice as high as that in the normal state to the scanning line drive circuit 6 when the power is off, C1 = 100 μ
F, C2 = C4 = 1.0 μF, R2 = R4 = 4.7 kΩ
With the value of, it was possible to obtain the same result as when inputting the shift pulse of the normal frequency.

[0031]

As described above, according to the present invention, the voltage applied to the two-terminal active element starts to be gradually reduced while the control voltage is maintained when the power-off is detected. In the liquid crystal display device, the liquid crystal connected to the active element and the element itself do not shut off the power while the electric charges are still charged. Further, by simultaneously selecting a plurality of scanning lines, it becomes possible to discharge the electric charges stored in the liquid crystal in a short time. Therefore, according to the present invention, it is possible to suppress the residual charge of the element and the liquid crystal when the power is turned off to a minimum, and it is possible to suppress the flicker when the element is deteriorated and the power is turned on again.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration of a liquid crystal display device according to an embodiment of the present invention.

FIG. 2 is a timing chart showing a waveform of a driving voltage in the liquid crystal display device shown in FIG. 1 at a normal time.

3 is a timing chart showing a waveform of a drive voltage when the power supply is turned off in the liquid crystal display device shown in FIG.

FIG. 4 is a circuit diagram showing a configuration example of a power-off detection unit 3 shown in FIG.

5 is a circuit diagram showing a configuration example of a liquid crystal drive power supply control section 4 shown in FIG.

6 is a circuit diagram showing another configuration example of the liquid crystal drive power supply control section 4 shown in FIG.

7 is a timing chart (a) for explaining the operation of the shift register in the scanning line driving circuit 6 shown in FIG. 1, a state (b) of the shift register in a normal state, and a state of the shift register when the power is off. It is a figure which shows (c).

8 is a block diagram showing a modification of the shift register shown in FIG.

FIG. 9 is a diagram showing current-voltage characteristics of an MIM element.

FIG. 10 is an equivalent circuit diagram of one pixel including an MIM element and a liquid crystal layer.

FIG. 11 is a timing chart showing operation waveforms of a conventional liquid crystal display device.

FIG. 12 is a diagram showing measured waveforms of operation waveforms of a conventional liquid crystal display device.

[Explanation of symbols]

 3 Power supply off detection unit 4 Liquid crystal drive power supply control unit 5 Panel 6 Scan line drive circuit 7 Data line drive circuit 8 Logic control unit

Claims (2)

[Claims] 1. An active matrix type liquid crystal display device using a plurality of two-terminal active elements, a control voltage holding means for holding a control voltage for controlling the active elements, and a detection means for detecting a power cutoff. And a voltage control means for starting to gradually reduce the voltage applied to the active element after the detection means detects the interruption of the power supply. 2. The liquid crystal display device according to claim 1, wherein the active element is arranged at an intersection of a scanning line and a signal line,
The applied voltage is controlled by the scanning line driving means and the signal line driving means, and further, from the time when the detection means detects the interruption of the power source,
A liquid crystal display device comprising: a signal generating unit for generating a selection instruction signal for instructing the scanning line driving unit to simultaneously select a plurality of scanning lines.