JPH09298254A - Semiconductor device and manufacturing method thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent metal bumps from cracking because of the linear expansion coefficient difference between an insulation substrate and the mother board, by placing the insulation substrates apart and electrically connecting the mother board having a different linear expansion coefficient from those of the insulation substrates to the substrates through metal bumps. SOLUTION: An insulation substrate 1 is divided into four equal parts at lines passing the cross point of the diagonal lines on the substrate 1 to apparently reduce the solder bump spacing in appearance into one half the conventional one. When a semiconductor chip 3 is mounted on the center of the substrate 1, the thermal expansions of this substrate 1 and the mother board 10 increase from the ends to the centers. This suppresses the stress applied to high m.p. solder bumps 8 at the corners of the substrate. Thus, it is possible to prevent the solder bumps 8 from cracking to break wires due to the temp. change in the atmosphere surrounding the semiconductor device.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, in particular, a semiconductor device in which an insulating substrate and a mother board are directly mounted via metal bumps, and a manufacturing method thereof.

[0002]

2. Description of the Related Art A conventional semiconductor device will be described with reference to FIG. FIG. 8A is a sectional view of a conventional semiconductor device, and FIG. 8B is a bottom view of a conventional insulating substrate having metal bumps formed thereon.

First, a semiconductor element 102 is fixed to a ceramic insulating substrate 101 such as alumina, aluminum nitride, or glass ceramic with a mount resin 103 such as epoxy or polyimide. Next, the insulating substrate 101 and the semiconductor chip 102 are electrically connected by a wire 104 of gold, aluminum or the like. After that, the semiconductor element 102 and the wire 104 are sealed with a sealing material 105 such as epoxy or polyimide. The electrode portion 10 on the back surface of the insulating substrate 101 on which the semiconductor chip 102 is mounted and sealed.
6, solder bumps 107 are formed in a grid pattern, the electrode portions 106 of the semiconductor substrate 101 and the electrode portions of the mother board 108 are combined and heated, and the electrode portions 106 of the insulating substrate 101 and the mother board are connected via the solder bumps 107. The electrode portion 108 is electrically connected.

[0004]

Problems of the conventional semiconductor device will be described with reference to FIG. FIG. 9 is a perspective view of a conventional semiconductor device.

For example, the insulating substrate 101 is mounted on the mother board 108 like a BGA (Ball Grid Array) type package.
In the case of a semiconductor device that is directly mounted on a semiconductor device, since the insulating substrate 101 and the mother board 108 are made of different materials, temperature changes in the atmosphere surrounding the semiconductor device and heat generated from the semiconductor chip 102 during operation of the semiconductor device may occur. Due to the difference in linear expansion coefficient between the two caused by
1 has a problem that stress is applied to the solder bumps 107 that electrically connect 1 and the motherboard 108, and the solder bumps 107 are cracked and broken.

For example, the insulating substrate 101 is an alumina ceramic having a 25 mm square and a linear expansion coefficient of 7 × 10 −6, and the mother board 108 is glass epoxy having a linear expansion coefficient of 15 × 10 −6, which is formed on the back surface of the insulating substrate 101. When the pitch of the solder bumps is 1 mm, the distance 109 between the solder bumps at the diagonal corner on the back surface of the insulating substrate 101 is
It is 16.3 mm. When this semiconductor device is subjected to a temperature cycle test under the conditions shown in the temperature cycle diagram of FIG. 5, the solder bump distance 109 at the diagonal corner is due to the difference in linear expansion coefficient between the insulating substrate 101 and the mother board 108. It increases by 0.013 mm, and as shown in the correlation diagram of the cumulative defective rate of the semiconductor device with respect to the temperature cycle of FIG.
There is a problem that the solder bump 107 formed at the corner portion of 01 is cracked and the wire is broken.

In consideration of the above circumstances, the present invention relates to a semiconductor device in which an insulating substrate and a mother board are mounted via metal bumps, and a linear expansion between the insulating substrate and the mother board caused by a temperature change in an atmosphere surrounding the semiconductor device. The purpose is to prevent cracks in metal bumps caused by the difference in coefficient and improve the reliability of the semiconductor device.

[0008]

In order to achieve the above-mentioned object, a semiconductor device of the present invention comprises a plurality of insulating substrates arranged apart from each other, and a semiconductor chip mounted over the plurality of insulating substrates. A metal bump formed on an electrode portion on each back surface of the insulating substrate, and a mother board electrically connected to each of the insulating substrates via the metal bump and having a material having a linear expansion coefficient different from that of the insulating substrate. It is characterized by having done.

Furthermore, it is desirable that the metal bumps are formed in a grid pattern on the electrode portions on the respective back surfaces of the divided insulating substrate.

Further, it is desirable that the insulating substrates have the same area and shape.

Further, it is desirable that the insulating substrates are squares each having an equal area, and that each of the insulating substrates is four vertically and horizontally arranged at equal intervals.

Further, the semiconductor chips are arranged 4
It is desirable to be mounted at the center of one of the insulating substrates.

Further, it is desirable that the insulating substrates are fixed to each other with a resin.

Further, the material of the insulating substrate may be ceramic, and the material of the mother board may be glass epoxy.

Further, a step of disposing a plurality of insulating substrates apart from each other and fixing a semiconductor chip over the plurality of insulating substrates, and a step of forming a metal bump on an electrode portion on each back surface of the insulating substrate, And a step of electrically connecting the insulating substrate and the mother board made of a material having a different linear expansion coefficient to each other through the metal bump.

Further, in the method of manufacturing a semiconductor device, the insulating substrates are fixed to each other in the step of disposing the insulating substrates.

Further, it is desirable to seal the insulating substrates with a resin after the step of fixing the semiconductor chip to the divided insulating substrates.

Furthermore, it is desirable to use a film type adhesive in the step of fixing the semiconductor chip to the insulating substrate.

[0019]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a semiconductor device according to a first embodiment of the present invention and a method for manufacturing the same will be described with reference to the drawings.

FIG. 1 is a perspective view of a semiconductor device according to an embodiment of the present invention, FIG. 2 is a sectional view of a semiconductor device according to an embodiment of the present invention, and FIG. 3B is a bottom view of the semiconductor substrate according to the exemplary embodiment of the present invention, and FIG. 4 is a semiconductor substrate according to the exemplary embodiment of the present invention in which a semiconductor element is mounted. It is a top view at the time of doing.

For example, it is made of 35 mm square aluminum nitride, the number of external terminals is 676, the terminal pitch is about 1.27 mm, tungsten is used for the wiring material, and nickel is about 1.27 μm on this tungsten. Gold 0.3μ
The insulating substrate 1 plated with about m is used. This insulating substrate 1 is divided into four equal parts along a line that passes through the intersections of the diagonal lines of the semiconductor substrate 1, and an epoxy resin adhesive 2 is used to pass through a reflow furnace under the conditions of temperature: 150 ° C., time: 2 hours, and division. The insulating substrates 1a, 1b, 1c and 1d are fixed to each other. At this time, adjacent insulating substrates (for example, 1a, 1
The distance b) is about 0.3 mm, and the electrodes 7 of the insulating substrate 1a and the adjacent electrode 7 of the insulating substrate 1b are bonded so that the distance between them is about 1.27 mm, which is the same as the terminal pitch.
Further, the external terminal 12 connected to the semiconductor chip 3 on the upper surface of the divided substrates 1a, 1b, 1c, 1d and the electrode portion 7 on the back surface are connected to the inside of each of the insulating substrates 1a, 1b, 1c, 1d. They are connected in a one-to-one correspondence.

Next, the epoxy resin is used as the mount resin 4, and the semiconductor chip 3 of about 8 mm square is mounted on the insulating substrate 1.
It is mounted on top and the mount resin 4 is cured by passing through a reflow oven under the conditions of temperature: 150 ° C., time: 2 hours, and the insulating substrate 1 and the semiconductor chip 3 are bonded. Thereafter, as shown in FIG. 4, bonding is performed with a gold wire 5 of 30 μm to electrically connect the insulating substrate 1 and the semiconductor chip 3, and potting is performed with an encapsulant 6 which is an epoxy resin, and the temperature is 15
The sealing material 6 is cured by passing through a reflow furnace under the conditions of 0 ° C. and time: 2 hours to seal the semiconductor chip 3 and the gold wire 5.

Next, a high melting point solder bump 8 having a composition of Pb 90% and Sn 10% and a diameter of about 0.9 mm is formed on the electrode portion 7 on the back surface of the insulating substrate 1 with eutectic solder 9 having a composition of Sn 63% and Pb 37%. Adhesively fixed in a grid pattern. After that, the electrode part 7 of this insulating substrate 1 and the mother board 1 made of glass epoxy
The insulating substrate 1 and the mother board 10 are electrically connected to each other by applying heat in correspondence with the electrode portion of 0. With the above, the manufacturing process of the semiconductor device according to the first exemplary embodiment of the present invention is completed.

By dividing the insulating substrate 1 into four equal parts along a line passing through the intersections of the diagonal lines of the insulating substrate 1, the insulating substrate 1
The distance 11 between solder bumps at the diagonal corners on a, 1b, 1c and 1d is apparently shortened to about half the distance in the conventional case. When the semiconductor chip 3 is mounted in the center of the insulating substrate 1, the insulating substrate 1 and the mother board 10
Thermal expansion increases from the center to the edge, and the distance from the center is shortened, so that the insulating substrate 1a,
The stress applied to the high melting point solder bumps 8 at the corners of 1b, 1c, 1d can be suppressed, and the high melting point solder bumps 8 can be prevented from cracking and breaking due to temperature changes in the atmosphere surrounding the semiconductor device. You can

Further, since the insulating substrates 1a, 1b, 1c and 1d are fixed to each other by the adhesive 2 of the soft epoxy resin, the expansion is absorbed by the epoxy resin and is generated in one insulating substrate (for example, 1a). The expansion due to the heat does not affect the adjacent insulating substrate (for example, 1b).

In addition, the size of the insulating substrate 1 is reduced by making the distance between the electrode portions 7 adjacent to each other with the adhesive 2 interposed therebetween equal to the terminal pitch of the electrode portions 7 adjacent in the insulating substrate 1. The same can be maintained, and there is no fear of hindering miniaturization of the semiconductor device.

FIG. 6 shows the result of a temperature cycle test conducted on the semiconductor device according to the first embodiment of the present invention under the conditions shown in the temperature cycle diagram of FIG. The horizontal axis of FIG. 6 is the number of cycles [cycles], and the vertical axis is the cumulative defective rate [%].

As shown in FIG. 6, in the prior art b, defects due to cracks formed in the high melting point solder bumps 8 are seen in about 400 cycles, but in the case of the present invention a, defects occur up to around 800 cycles. Therefore, the stable operation of the semiconductor device can be maintained.

In general, the strain applied to a metal bump is
It is expressed as the following Expression 1.

Ε = (ΔT × L × Δα) / h Equation 1 ε: Strain applied to metal bump ΔT: Temperature change [° C.] L: Distance between solder bumps at diagonal corners Δα: Difference in linear expansion coefficient h: Distance between Insulating Substrate and Motherboard When the distance L between the solder bumps on the diagonal corner is reduced to about half, the stress applied to the high melting point solder bumps 8 is reduced, and the strain ε is reduced. Therefore, the diameter of the high melting point solder bump 8 can be reduced to about half that of the conventional one, and the distance h between the insulating substrate and the mother board can be reduced to be used. As a result, the height of the entire semiconductor device can be suppressed, so that the semiconductor device can be manufactured to be thin.

Next, a semiconductor device and a method of manufacturing the same according to a second embodiment of the present invention will be described with reference to FIGS.

The same insulating substrates 1a, 1b, 1c and 1d as in the case of the first embodiment are used. This insulating substrate 1a,
1b, 1c and 1d are arranged with a gap of about 0.3 mm each. Next, the semiconductor chip 3 is mounted on the insulating substrates 1a, 1b, 1c and 1d, and the temperature is 150 ° C. and the time is:
The insulating resin 1a, 1b, 1 is cured by passing through a reflow furnace for 2 hours to cure the mount resin 4 which is an epoxy resin.
The semiconductor chip 3 is fixed to c and 1d, and the insulating substrates 1a and 1
Temporarily fix b, 1c and 1d to each other. After that, bonding is performed with the gold wire 5, and the insulating substrates 1a, 1b, 1c,
1d and the semiconductor chip 3 are electrically connected. Next, the epoxy resin sealing material 6 is applied to the insulating substrates 1a, 1b, 1c, 1d.
Mount so that it soaks into the gap of, temperature: 150 ℃,
Time: The sealing material 6 is cured by passing through a reflow furnace under the condition of 2 hours, the semiconductor chip 3 and the gold wire 5 are sealed, and the insulating substrates 1a, 1b, 1c, 1d are fixed to each other. After that, in the same process as in the first embodiment, the insulating substrate 1 and the mother board 10 are electrically connected via the high melting point solder bumps 8. Thus, the manufacturing process of the semiconductor device according to the second embodiment of the present invention is completed.

The process is advanced without fixing the insulating substrates 1a, 1b, 1c and 1d, and when the semiconductor chip 3 is fixed and the semiconductor chip 3 and the gold wire 5 are sealed, the insulating substrates 1a, 1b are simultaneously formed. , 1c, 1d are fixed to each other, the step of adhering the insulating substrates 1a, 1b, 1c, 1d to each other is unnecessary, and the increase in the number of manufacturing steps can be suppressed to a minimum.

The present invention is not limited to the above-mentioned second embodiment, but the semiconductor chip 3 is replaced by the insulating substrates 1a, 1b, 1
When fixing to c, 1d, instead of mount resin 4,
A polyimide film type adhesive may be used.
By using this film type adhesive, dripping of the mount resin 4 that may occur when the mount resin 4 is used when fixing the semiconductor chip 3 onto the insulating substrates 1a, 1b, 1c, 1d There is no need to consider.

The present invention is not limited to the first and second embodiments, and the insulating substrate 1 does not affect the connection between the external terminals 12 on the upper surface of the insulating substrate 1 and the electrode portion 7 on the back surface. In order to reduce the distance 11 between the solder bumps at the diagonal corners within the range, for example, the solder bumps may be divided as shown in the division diagram of the insulating substrate according to the embodiment of the present invention in FIG. And the shapes of the insulating substrates 1a, 1b, 1c, 1d are not limited.

It is also possible to prepare the insulating substrates 1a, 1b, 1c, 1d of a predetermined size and shape in advance and omit the step of dividing the insulating substrate 1.

Further, the insulating substrate 1 and the semiconductor chip 3 can be used in any size.

When considering the heat from the semiconductor chip 3 among the heat, the semiconductor chip 3 is placed at the center of the insulating substrate 1 so that the heat is evenly conducted to each of the insulating substrates 1a, 1b, 1c and 1d. It is desirable to mount it on.

It is also possible to use materials other than those mentioned above for the insulating substrate 1 and the mother board 10.

It is also possible to use ceramics such as alumina and glass ceramics as the material of the insulating substrate 1, polyimide as the material of the mount resin 4 and the sealing material 6, and aluminum as the material of the wire 5. Further, instead of the high melting point solder bumps 8, other metal bumps may be used.

[0041]

According to the present invention, the difference in expansion between the insulating substrate and the mother board due to the temperature change in the atmosphere surrounding the semiconductor device is reduced by using a plurality of insulating substrates which are spaced apart from each other, and the difference occurs in the metal bumps. A disconnection due to a crack can be prevented and a highly reliable semiconductor device can be provided.

[Brief description of drawings]

FIG. 1 is a perspective view of a semiconductor device according to an embodiment of the present invention.

FIG. 2 is a sectional view of a semiconductor device according to an embodiment of the present invention.

FIG. 3A is a top view of an insulating substrate according to an embodiment of the present invention. (B) The bottom view of the insulating substrate concerning embodiment of this invention.

FIG. 4 is a top view when a semiconductor chip is mounted on the insulating substrate according to the embodiment of the present invention.

FIG. 5 is a temperature cycle diagram.

FIG. 6 is a correlation diagram of a cumulative defective rate of a semiconductor device with respect to a temperature cycle.

FIG. 7 is a divided view of an insulating substrate according to an embodiment of the present invention.

FIG. 8A is a sectional view of a conventional semiconductor device. (B) The bottom view of the conventional insulating substrate.

FIG. 9 is a perspective view of a conventional semiconductor device.

[Explanation of symbols]

1, 1a, 1b, 1c, 1d, 101 ... Insulating substrate, 2 ... Adhesive agent, 3,102 ... Semiconductor chip, 4,103 ... Mount resin, 5 ... Gold wire, 6,105 ... Encapsulating material, 7,106 ... electrode part, 8 ... high melting point solder bump, 9 ... eutectic solder, 10,108 ... motherboard, 11,109 ... distance between solder bumps on diagonal corners, 12 ... external terminal, 104 ... metal wire, 107 ... solder bump

Claims (17)

[Claims] 1. A plurality of insulating substrates arranged apart from each other, semiconductor chips mounted over the plurality of insulating substrates, metal bumps formed on electrode portions on each back surface of the insulating substrate, A semiconductor device comprising: a motherboard that is electrically connected to each of the insulating substrates via metal bumps and has a material having a linear expansion coefficient different from that of the insulating substrate. 2. The semiconductor device according to claim 1, wherein the metal bumps are formed in a grid pattern on an electrode portion on each back surface of the insulating substrate. 3. The semiconductor device according to claim 1, wherein the insulating substrates have the same area and shape. 4. The semiconductor device according to claim 3, wherein each of the insulating substrates is a square having an equal area, and four insulating substrates are arranged at equal intervals, two vertically and horizontally. 5. The semiconductor device according to claim 4, wherein the semiconductor chip is mounted at the center of the four arranged insulating substrates. 6. The semiconductor device according to claim 1, wherein the insulating substrates are fixed to each other with a resin. 7. The semiconductor device according to claim 1, wherein the material of the insulating substrate is ceramic, and the material of the mother board is glass epoxy. 8. A step of arranging a plurality of insulating substrates apart from each other, fixing a semiconductor chip over the plurality of insulating substrates, and a step of forming a metal bump on an electrode portion on each back surface of the insulating substrate, And a step of electrically connecting the insulating substrate and the motherboard made of a material having a different linear expansion coefficient to each other via the metal bump. 9. The method of manufacturing a semiconductor device according to claim 8, wherein the metal bumps are formed in a grid pattern on the electrode portion on each back surface of the insulating substrate. 10. The method of manufacturing a semiconductor device according to claim 8, wherein the insulating substrates have the same area and shape. 11. The method of manufacturing a semiconductor device according to claim 10, wherein each of the insulating substrates is a square having an equal area, and four insulating substrates are arranged at equal intervals in two rows and two columns. 12. The method of manufacturing a semiconductor device according to claim 11, wherein the semiconductor chip is mounted at the center of the four arranged insulating substrates. 13. The method of manufacturing a semiconductor device according to claim 8, wherein the material of the insulating substrate is ceramic, and the material of the mother board is glass epoxy. 14. The method of manufacturing a semiconductor device according to claim 8, wherein the insulating substrates are fixed to each other in the step of disposing the insulating substrates. 15. The method of manufacturing a semiconductor device according to claim 14, wherein the insulating substrates are fixed to each other with a resin. 16. The method of manufacturing a semiconductor device according to claim 8, wherein the insulating substrates are sealed with resin after the step of fixing the semiconductor chip to the insulating substrate. 17. The method of manufacturing a semiconductor device according to claim 8, wherein a film type adhesive is used in the step of fixing the semiconductor chip to the insulating substrate.