JPH0964407A - Semiconductor light receiving element - Google Patents
Semiconductor light receiving elementInfo
- Publication number
- JPH0964407A JPH0964407A JP8149272A JP14927296A JPH0964407A JP H0964407 A JPH0964407 A JP H0964407A JP 8149272 A JP8149272 A JP 8149272A JP 14927296 A JP14927296 A JP 14927296A JP H0964407 A JPH0964407 A JP H0964407A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- conductivity type
- inp
- receiving element
- light receiving
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 23
- 230000031700 light absorption Effects 0.000 claims abstract description 33
- 229910000530 Gallium indium arsenide Inorganic materials 0.000 claims abstract description 30
- 239000000758 substrate Substances 0.000 claims abstract description 20
- 101150054880 NASP gene Proteins 0.000 claims description 3
- 238000004891 communication Methods 0.000 abstract description 12
- 230000003287 optical effect Effects 0.000 abstract description 12
- 229910001218 Gallium arsenide Inorganic materials 0.000 abstract description 6
- 239000000835 fiber Substances 0.000 abstract description 5
- 238000012544 monitoring process Methods 0.000 abstract description 5
- 238000006243 chemical reaction Methods 0.000 abstract 1
- 238000000034 method Methods 0.000 description 21
- 238000010521 absorption reaction Methods 0.000 description 8
- 238000009792 diffusion process Methods 0.000 description 8
- 239000000969 carrier Substances 0.000 description 7
- 230000000694 effects Effects 0.000 description 7
- 230000035945 sensitivity Effects 0.000 description 7
- 238000000098 azimuthal photoelectron diffraction Methods 0.000 description 6
- 229910000673 Indium arsenide Inorganic materials 0.000 description 5
- 238000001947 vapour-phase growth Methods 0.000 description 5
- 238000005229 chemical vapour deposition Methods 0.000 description 4
- 230000005684 electric field Effects 0.000 description 4
- 238000010438 heat treatment Methods 0.000 description 4
- 238000007740 vapor deposition Methods 0.000 description 4
- RPQDHPTXJYYUPQ-UHFFFAOYSA-N indium arsenide Chemical compound [In]#[As] RPQDHPTXJYYUPQ-UHFFFAOYSA-N 0.000 description 3
- 238000005468 ion implantation Methods 0.000 description 3
- 239000000463 material Substances 0.000 description 3
- 239000013307 optical fiber Substances 0.000 description 3
- 238000000253 optical time-domain reflectometry Methods 0.000 description 3
- 230000005540 biological transmission Effects 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 239000013078 crystal Substances 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- 238000005259 measurement Methods 0.000 description 2
- 238000002488 metal-organic chemical vapour deposition Methods 0.000 description 2
- 230000002040 relaxant effect Effects 0.000 description 2
- 229910004298 SiO 2 Inorganic materials 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 238000012423 maintenance Methods 0.000 description 1
- 238000007726 management method Methods 0.000 description 1
- 238000007789 sealing Methods 0.000 description 1
- 230000003595 spectral effect Effects 0.000 description 1
Landscapes
- Solid State Image Pick-Up Elements (AREA)
- Light Receiving Elements (AREA)
Abstract
(57)【要約】
【課題】 光通信用ファイバ網の回線監視用としての半
導体受光素子において、波長1.65μmの光に対し、
高い量子効率と、低い暗電流と、高い電流増倍率とを得
ることを目的とする。
【解決手段】 本発明の半導体受光素子は、InP基板
1上にInP緩衝層2と、n−InAsP緩衝層3と、
波長1.85μmの歪みInGaAs光吸収層4と、波
長1.85μmから1.67μmまで変化させたInG
aAsリニアステップ層5と、InGaAs中間層6
と、n−InP増倍層7と、InP窓層8とから構成さ
れる。窓層8側から入射した1.65μmの光は歪みI
nGaAs光吸収層4内で吸収され光電変換によりキャ
リアとなり外部回路へと流れる。またInPと歪みIn
GaAsとの間の格子不整合により生じる暗電流の発生
は、InAsP層を間に挟むことで低く抑えることがで
きる。
(57) Abstract: In a semiconductor light receiving element for line monitoring of a fiber network for optical communication, for a light of wavelength 1.65 μm,
The purpose is to obtain high quantum efficiency, low dark current, and high current multiplication factor. A semiconductor light receiving element of the present invention comprises an InP buffer layer, an n-InAsP buffer layer, and an InP buffer layer on an InP substrate.
Strained InGaAs light absorption layer 4 having a wavelength of 1.85 μm and InG having a wavelength changed from 1.85 μm to 1.67 μm
aAs linear step layer 5 and InGaAs intermediate layer 6
And an n-InP multiplication layer 7 and an InP window layer 8. The 1.65 μm light incident from the window layer 8 side is distorted by I
It is absorbed in the nGaAs light absorption layer 4 and becomes a carrier by photoelectric conversion to flow to an external circuit. InP and strain In
Generation of dark current caused by lattice mismatch with GaAs can be suppressed to a low level by sandwiching an InAsP layer.
Description
【0001】[0001]
【発明の属する技術分野】本発明は光計測や光通信に用
いられる半導体受光素子に関し、特に光通信用ファイバ
網の回線監視用としての半導体受光素子に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor light receiving element used for optical measurement and optical communication, and more particularly to a semiconductor light receiving element for line monitoring of a fiber network for optical communication.
【0002】[0002]
【従来の技術】現在光通信用回線として光ファイバが使
われている。このような敷設されている光ファイバ網の
保守管理方法として、OTDE(Optical Ti
meDomain Reflectometer)があ
る。OTDRとは布設されている光ファイバの破断点を
調べる装置であり、その基本原理はファイバ内に入射さ
れたパルス光がファイバ内を伝搬するときに生じるレー
リー散乱光をモニターし、もしファイバ内で破断点が生
じている場合レーリー散乱光は戻らなくなる。このレー
リー散乱光がなくなるまでの時間を距離に換算すること
で破断点の位置を正確に知ることができる。但しこの場
合、通信回線をOTDR装置に接続しなければならなく
なり、そのために通信回線が一時遮断されるという問題
がある。そこでこの問題を解決するために、光通信の送
信波長1.3μmあるいは1.55μmと異なる波長
1.65μm帯の光を使い、通信回線を使用しながら同
時に回線の監視を常時行なう方法が考えられている。2. Description of the Related Art Optical fibers are currently used as optical communication lines. As a maintenance management method for such an installed optical fiber network, OTDE (Optical Ti)
There is a meDomain Reflectometer). OTDR is a device to check the breaking point of the installed optical fiber, and its basic principle is to monitor the Rayleigh scattered light generated when the pulsed light incident on the fiber propagates in the fiber and When the break point occurs, Rayleigh scattered light does not return. The position of the breaking point can be accurately known by converting the time until the Rayleigh scattered light disappears into a distance. However, in this case, the communication line must be connected to the OTDR device, which causes a problem that the communication line is temporarily cut off. Therefore, in order to solve this problem, a method is conceivable in which light in the wavelength range of 1.65 μm different from the transmission wavelength of 1.3 μm or 1.55 μm in optical communication is used and the line is constantly monitored while using the communication line. ing.
【0003】このような常時監視用のシステムに用いる
半導体受光素子として、アバランシェ・フォトダイオー
ド(以下、APDと称す)が広く使われる。APDは素
子自体が増幅機能を有しているため高感度な受光素子と
して広く光計測や光通信に用いられている。中でも大容
量長距離光通信に用いられている波長帯1.3μmある
いは1.55μmに対する半導体受光素子の材料として
InP/InGaAsが使われている。これらの材料を
用いた半導体受光素子の1つの従来例を図4に示す。Avalanche photodiodes (hereinafter referred to as APDs) are widely used as semiconductor light receiving elements used in such a system for constant monitoring. Since the element itself has an amplifying function, the APD is widely used for optical measurement and optical communication as a highly sensitive light receiving element. Above all, InP / InGaAs is used as a material of a semiconductor light receiving element for a wavelength band of 1.3 μm or 1.55 μm used for large-capacity long-distance optical communication. FIG. 4 shows one conventional example of a semiconductor light receiving element using these materials.
【0004】図5はInGaAsを使ったAPDの一従
来例を示す断面図である。n+ −InP基板1上に、キ
ャリア濃度1E15〜2E16cm-3かつ層厚1〜3μ
mのn−InP緩衝層2と、キャリア濃度1E14〜1
E16cm-3かつ層厚1〜5μmのn- −In0.53Ga
0.47As光吸収層17と、キャリア濃度1E15〜1E
16cm-3かつ層厚0.3〜1μmのn−InGaAs
P中間層6と、キャリア濃度2E16〜4E16cm-3
かつ層厚0.8〜4μmのn+ −InP増倍層7と、キ
ャリア濃度1E15〜8E15cm-3かつ層厚1〜2μ
mのn+ −InP窓層8とを順次気相成長法により成長
させたエピタキシャル結晶に、受光部としてキャリア濃
度1E17〜1E20cm-3のp+ −InP領域10を
Znの封止拡散により選択形成し、さらに受光部を囲む
ようにBeのイオン注入法によりガードリング9を形成
している。このInGaAsを用いたAPDに逆バイア
スをかけることによって、光吸収層であるInGaAs
光吸収層17内に空乏層が広がる。この時InGaAs
層17のバンドギャップエネルギーに相当する波長1.
67μm以下の光、たとえば1.3μmの光が入射した
場合、空乏化された光吸収層17内において光電効果に
よるキャリアが生成される。生成されたキャリアは空乏
層内の20〜100kV/cmの内部電界によって飽和
速度まで加速され、電流として外部回路へ流れることに
なる。FIG. 5 is a sectional view showing a conventional example of an APD using InGaAs. On the n + -InP substrate 1, the carrier concentration is 1E15 to 2E16 cm -3 and the layer thickness is 1 to 3 μm.
m n-InP buffer layer 2 and carrier concentration 1E14 to 1
E16 cm -3 and layer thickness of 1-5 μm n − −In 0.53 Ga
0.47 As light absorption layer 17 and carrier concentration 1E15 to 1E
N-InGaAs with a thickness of 16 cm -3 and a layer thickness of 0.3-1 μm
P intermediate layer 6 and carrier concentration 2E16 to 4E16 cm -3
And an n + -InP multiplication layer 7 having a layer thickness of 0.8 to 4 μm, a carrier concentration of 1E15 to 8E15 cm −3, and a layer thickness of 1 to 2 μm.
m n + -InP window layer 8 and a p + -InP region 10 having a carrier concentration of 1E17 to 1E20 cm -3 as a light receiving portion are selectively formed by Zn diffusion diffusion in an epitaxial crystal grown by a vapor phase growth method. Further, a guard ring 9 is formed by a Be ion implantation method so as to surround the light receiving portion. By applying a reverse bias to the APD using InGaAs, the light absorption layer of InGaAs
A depletion layer spreads in the light absorption layer 17. At this time InGaAs
The wavelength corresponding to the bandgap energy of the layer 17 is 1.
When light of 67 μm or less, for example, 1.3 μm, is incident, carriers are generated by the photoelectric effect in the depleted light absorption layer 17. The generated carriers are accelerated to the saturation speed by the internal electric field of 20 to 100 kV / cm in the depletion layer and flow to the external circuit as a current.
【0005】ここで問題となることは、図5図示の従来
例は光吸収層17がn- −InGaAsで構成されてい
るために吸収端の波長が1.67μmであり、光通信の
送信に用いる1.3μmまたは1.55μmの光には感
度上問題とはならないが、常時監視用の波長1.65μ
mに対しては吸収端近傍に当たるため感度が低く、量子
効率は約20%となる。このような問題を解決し、より
長い波長の光を受けるために第2の従来例が提案されて
いる。The problem here is that, in the conventional example shown in FIG. 5, since the light absorption layer 17 is made of n -- InGaAs, the wavelength at the absorption edge is 1.67 μm, which is not suitable for optical communication transmission. The light of 1.3 μm or 1.55 μm used does not cause a problem in sensitivity, but the wavelength for continuous monitoring is 1.65 μm.
Since m falls near the absorption edge, the sensitivity is low and the quantum efficiency is about 20%. A second conventional example has been proposed in order to solve such a problem and receive light of a longer wavelength.
【0006】第2の従来例を図6に示す。n+ −InP
基板1上に、n+ −InP緩衝層2を成長させた後、厚
さ1.5〜2μmのn- −InAs/GaAs超格子光
吸収層18と、厚さ0.1μmのn- −InGaAsP
層6と、厚さ1.5μmのn+ −InP増倍層7と、厚
さ1μmのp−InP層19とを順次成長させた結晶
に、メサエッチングを施したあと、p側電極13として
TiPtAuを、n側電極15としてAuGeNiをそ
れぞれ蒸着して受光素子を形成している。このように光
吸収層をInAsとGaAsとの超格子層構造とするこ
とにより吸収端の波長を3.2μmまで拡大することが
できる。A second conventional example is shown in FIG. n + -InP
After the n + -InP buffer layer 2 is grown on the substrate 1, the n − -InAs / GaAs superlattice light absorption layer 18 having a thickness of 1.5 to 2 μm and the n − -InGaAsP having a thickness of 0.1 μm are formed.
A crystal obtained by sequentially growing the layer 6, the n + -InP multiplication layer 7 having a thickness of 1.5 μm, and the p-InP layer 19 having a thickness of 1 μm was subjected to mesa etching, and then used as a p-side electrode 13. The light receiving element is formed by depositing TiPtAu and AuGeNi as the n-side electrode 15, respectively. In this way, by forming the light absorption layer into a superlattice layer structure of InAs and GaAs, the wavelength at the absorption edge can be expanded to 3.2 μm.
【0007】但しここで問題となることは、上記第2の
従来例の場合、InP基板上にInAsとGaAsとの
超格子を形成する都合上、その界面に格子不整合が生じ
ることになり、その格子欠陥より暗電流が発生する。こ
の暗電流によってノイズが生じるために感度が低下す
る。However, the problem here is that in the case of the second conventional example, a lattice mismatch occurs at the interface because of the formation of a superlattice of InAs and GaAs on the InP substrate. Dark current is generated due to the lattice defects. The dark current causes noise, which lowers the sensitivity.
【0008】[0008]
【発明が解決しようとする課題】上記した従来例のAP
Dにおいて、InP上にInAsとGaAsの超格子を
形成する都合上、その界面に格子不整合が生じることに
なり、その格子欠陥より暗電流が発生する。この暗電流
によってノイズが生じるために感度が低下するという問
題点がある。[Problems to be Solved by the Invention] The above-mentioned conventional AP
In D, due to the formation of InAs and GaAs superlattice on InP, a lattice mismatch occurs at the interface, and a dark current occurs due to the lattice defect. This dark current causes noise, which lowers the sensitivity.
【0009】そこで、本発明は上記問題点を解消するた
めになされたもので、その目的とするところは、光通信
用ファイバ網の回線監視用としての受光素子において、
波長1.65μmの光に対し、高い量子効率と、低い暗
電流と、高い電流増倍率とを得ることにある。Therefore, the present invention has been made to solve the above problems, and an object of the present invention is to provide a light receiving element for line monitoring of a fiber network for optical communication.
It is to obtain high quantum efficiency, low dark current, and high current multiplication factor for light having a wavelength of 1.65 μm.
【0010】[0010]
【課題を解決するための手段】上記目的を達成するため
に、本発明の基本態様によれば、第一導電型InP基板
上に、第一導電型InAsP層と、第一導電型In0.57
Ga0.43As光吸収層(λ=1.85μm)と、第一導
電型InP増倍層と、第一導電型InP窓層とを順次形
成したヘテロエピタキシャル層構造と、前記窓層内また
は増倍層内に部分的に第二導電型InP領域を設けた構
造と、前記窓層内に設けた前記第二導電型InP領域上
に形成した第二導電型電極と、前記第一導電型InP基
板上に形成した第一導電型電極を有することを特徴とす
る半導体受光素子が提供される。In order to achieve the above object, according to a basic aspect of the present invention, a first conductivity type InAsP layer and a first conductivity type In 0.57 are formed on a first conductivity type InP substrate.
Ga 0.43 As light absorption layer (λ = 1.85 μm), a first-conductivity-type InP multiplication layer, and a first-conductivity-type InP window layer are sequentially formed in the heteroepitaxial layer structure, and in the window layer or the multiplication layer. A structure in which a second conductivity type InP region is partially provided in the layer, a second conductivity type electrode formed on the second conductivity type InP region provided in the window layer, and the first conductivity type InP substrate There is provided a semiconductor light receiving element having the first conductivity type electrode formed thereon.
【0011】上記基本態様における第一導電型In0.57
Ga0.43As光吸収層の層厚が2μmないし5μmであ
る。First conductivity type In 0.57 in the above basic embodiment
The layer thickness of the Ga 0.43 As light absorbing layer is 2 μm to 5 μm.
【0012】また、上記基本態様における第一導電型I
n0.57Ga0.43As光吸収層と第一導電型InP増倍層
との間に波長1.85μmから1.67μmまで連続的
に組成を変化させた層が介装されている。The first conductivity type I in the above-mentioned basic mode
A layer whose composition is continuously changed from a wavelength of 1.85 μm to 1.67 μm is interposed between the n 0.57 Ga 0.43 As light absorption layer and the first conductivity type InP multiplication layer.
【0013】[0013]
【作用】本発明においては、歪みn−InGaAs光吸
収層を挟んで、基板側にn−InAsP緩衝層を、また
増倍層及び窓層側に波長1.85μmから1.67μm
まで変化させたn−InGaAsリニアステップ層とn
−InGaAs中間層とを形成したヘテロエピタキシャ
ル層構造とすることによって、吸収端を超長波側へシフ
トさせると共に、格子不整合を抑え、ノイズを低減する
ことができる。その結果、本発明の半導体受光素子は長
波長において高感度を示し、また高い増倍率を得ること
ができる。In the present invention, the n-InAsP buffer layer is provided on the substrate side with the strained n-InGaAs light absorption layer interposed, and the wavelength of 1.85 μm to 1.67 μm is provided on the multiplication layer and window layer sides.
N-InGaAs linear step layer changed to n
By using the heteroepitaxial layer structure in which the -InGaAs intermediate layer is formed, it is possible to shift the absorption edge to the ultra-high frequency side, suppress lattice mismatch, and reduce noise. As a result, the semiconductor light receiving element of the present invention exhibits high sensitivity at long wavelengths, and high multiplication factor can be obtained.
【0014】[0014]
【発明の実施の形態】以下、本発明を添付の図面に示し
た実施例に関連して更に詳細に説明する。 実施例1:図1に本発明の半導体受光素子の第1実施例
が示される。DETAILED DESCRIPTION OF THE INVENTION The present invention will now be described in more detail with reference to the embodiments shown in the accompanying drawings. Embodiment 1 FIG. 1 shows a first embodiment of the semiconductor light receiving element of the present invention.
【0015】n+ −InP基板1の表面上に、気相成長
法によりキャリア濃度1E15〜2E16cm-3かつ層
厚1〜3μmが好ましく、今回はキャリア濃度1E15
cm-3かつ層厚2μmのn+ −InP緩衝層2と、格子
不整合緩和のためにキャリア濃度1E15〜2E16c
m-3かつ層厚1〜3μmが好ましく、今回はキャリア濃
度1E15cm-3かつ層厚2μmのn−InAsP緩衝
層3と、長波長の光吸収層として吸収端波長λ=1.8
5μmでキャリア濃度1E15〜5E15cm-3かつ層
厚3〜4μmが好ましく、今回はキャリア濃度3E15
cm-3かつ層厚4μmの歪みn- −InGaAs(λ=
1.85μm)光吸収層4とを成長させた後、再び格子
不整合緩和のため吸収端波長を1.85μmから1.6
7μmまで順次変化させ、キャリア濃度3E15〜1E
16cm-3かつ層厚0.03〜0.5μmが好ましく、
今回はキャリア濃度1E16cm-3かつ層厚0.5μm
の歪みn−InGaAsリニアステップ層5を成長さ
せ、その後、キャリア濃度3E15〜1E16cm-3か
つ層厚0.03〜0.5μmが好ましく、今回はキャリ
ア濃度1E16cm-3かつ層厚0.5μmのn−InG
aAsP中間層6を成長させ、更にその後、増倍層とし
てキャリア濃度1E16〜4E16cm-3かつ層厚0.
5〜3μmが好ましく、今回はキャリア濃度3E16c
m-3かつ層厚1.4μmのn+ −InP増倍層7を成長
させる。最後に窓層としてキャリア濃度2E15〜6E
15cm-3かつ層厚1〜2μmが好ましく、今回はキャ
リア濃度5E15cm-3かつ層厚1.4μmのn- −I
nP窓層8を成長させる。On the surface of the n + -InP substrate 1, a carrier concentration of 1E15 to 2E16 cm -3 and a layer thickness of 1 to 3 μm are preferable by the vapor phase growth method. This time, the carrier concentration is 1E15.
cm −3 and layer thickness 2 μm, n + -InP buffer layer 2, and carrier concentration 1E15 to 2E16c for relaxing lattice mismatch.
m −3 and a layer thickness of 1 to 3 μm are preferable, and this time, an n-InAsP buffer layer 3 having a carrier concentration of 1E15 cm −3 and a layer thickness of 2 μm, and an absorption edge wavelength λ = 1.8 as a long wavelength light absorption layer.
5 μm, carrier concentration 1E15 to 5E15 cm −3 and layer thickness 3 to 4 μm are preferable.
cm −3 and strain 4 μm thick n − −InGaAs (λ =
(1.85 μm) After growing the light absorption layer 4, the absorption edge wavelength is changed from 1.85 μm to 1.6 to relieve the lattice mismatch.
Carrier concentration 3E15 ~ 1E
16 cm −3 and a layer thickness of 0.03 to 0.5 μm are preferable,
This time, carrier concentration is 1E16cm -3 and layer thickness is 0.5μm
Strained n-InGaAs linear step layer 5 is grown, and then the carrier concentration is preferably 3E15 to 1E16 cm −3 and the layer thickness is 0.03 to 0.5 μm. This time, the n is the carrier concentration is 1E16 cm −3 and the layer thickness is 0.5 μm. -InG
The aAsP intermediate layer 6 is grown, and thereafter, a carrier concentration of 1E16 to 4E16 cm -3 and a layer thickness of 0.
5 to 3 μm is preferable, this time carrier concentration is 3E16c
An n + -InP multiplication layer 7 having a thickness of m −3 and a layer thickness of 1.4 μm is grown. Finally, as the window layer, the carrier concentration is 2E15 to 6E.
Preferably 15cm -3 and a layer thickness 1 to 2 [mu] m, n of the carrier concentration 5E15 cm -3 and the layer thickness 1.4μm this time - -I
The nP window layer 8 is grown.
【0016】このような成長が行なわれたエピタキシャ
ルウェハの表面にマスクをCVD法により成長させ、ガ
ードリング9をたとえばBeのイオン注入法により形成
する。次に前記ガードリング9に重なるように拡散マス
クの窓開けを行ない、たとえばZnの封止拡散により受
光部分に相当する1E17〜1E20cm-3のp+ 領域
10を選択的に形成する。その後、表面側に通常の方法
でSiNx 膜、SiO2 膜等の絶縁膜11を成長させた
後、前記p+ 領域10上の絶縁膜11の一部に穴開けを
行ない、p側コンタクト電極12をたとえば蒸着法によ
り形成した後、加熱処理を行なう。前記p側コンタクト
電極を覆うようにp側電極13を形成する。A mask is grown on the surface of the epitaxial wafer thus grown by the CVD method, and the guard ring 9 is formed by the ion implantation method of Be, for example. Next, a window of a diffusion mask is opened so as to overlap with the guard ring 9, and a p + region 10 of 1E17 to 1E20 cm -3 corresponding to a light receiving portion is selectively formed by, for example, Zn diffusion diffusion. Thereafter, an insulating film 11 such as a SiN x film or a SiO 2 film is grown on the surface side by a usual method, and then a part of the insulating film 11 on the p + region 10 is perforated to form a p-side contact electrode. After forming 12 by, for example, a vapor deposition method, heat treatment is performed. A p-side electrode 13 is formed so as to cover the p-side contact electrode.
【0017】続いてn+ −InP基板1の裏面にn側コ
ンタクト電極14をたとえば蒸着法により形成した後、
加熱処理を行ない、最後にnコンタクト電極14を覆う
ようにn側電極15を形成する。Subsequently, after the n-side contact electrode 14 is formed on the back surface of the n + -InP substrate 1 by, for example, the vapor deposition method,
Heat treatment is performed, and finally the n-side electrode 15 is formed so as to cover the n-contact electrode 14.
【0018】このようにして製作した歪みInGaAs
−APDの分光感度特性を図2に示す。このAPDに
1.65μmの光を入射すると、光は窓層8側からp+
拡散領域10内に入射され、増倍層7、中間層6、歪み
InGaAsリニアステップ層5を透過した後、歪みn
−InGaAs光吸収層4にて吸収される。ここで吸収
された光によって生成されたキャリアは、p側電極13
とn側電極15間に印加された電界により加速されp側
電極13に流れ、外部回路へと吐き出され光電流とな
る。Strained InGaAs manufactured in this way
The spectral sensitivity characteristics of -APD are shown in FIG. When a light of 1.65 μm is incident on this APD, the light is p + from the window layer 8 side.
After entering the diffusion region 10 and passing through the multiplication layer 7, the intermediate layer 6, and the strained InGaAs linear step layer 5, the strain n
-It is absorbed by the InGaAs light absorption layer 4. The carriers generated by the light absorbed here are the p-side electrode 13
It is accelerated by an electric field applied between the n-side electrode 15 and the n-side electrode 15, flows into the p-side electrode 13, and is discharged to an external circuit to become a photocurrent.
【0019】このような構造をとることにより、1.6
5μmの光を70%以上の高い効率で吸収することがで
きる。また前記歪みn- −InGaAs光吸収層4とn
+ −InP基板1との間にn−InP緩衝層2とn−I
nAsP緩衝層3とを挟むことで、格子不整合を抑える
ことができるため、100nA以下の低い暗電流特性が
得られる。By adopting such a structure, 1.6
It is possible to absorb light of 5 μm with high efficiency of 70% or more. Further, the strained n -- InGaAs light absorption layer 4 and n
+ -InP substrate 1 and n-InP buffer layer 2 and n-I
Since the lattice mismatch can be suppressed by sandwiching the nAsP buffer layer 3 between them, a low dark current characteristic of 100 nA or less can be obtained.
【0020】図4にInx Ga1-x Asのxの値と暗電
流の関係を示す。これによりx=0.57を越えると暗
電流が高くなり、OTDRとして用いることができない
ことがわかる。FIG. 4 shows the relationship between the x value of In x Ga 1-x As and the dark current. From this, it can be seen that if x = 0.57 is exceeded, the dark current becomes high, and it cannot be used as an OTDR.
【0021】また、上記の効果により歪みn- −InG
aAs光吸収層4にて生成されたキャリアはn+ −In
P増倍層7に印加された電界により30倍以上の高い増
倍率が得られる。[0021] In addition, distortion n by the above-mentioned effect - -InG
The carriers generated in the aAs light absorption layer 4 are n + -In
A high multiplication factor of 30 times or more can be obtained by the electric field applied to the P multiplication layer 7.
【0022】本発明においては、InGaAsP系のヘ
テロエピタキシャル層を用いているが、他の材料系のヘ
テロエピタキシャル層では、このような特性を得ること
はできなかった。In the present invention, the InGaAsP-based heteroepitaxial layer is used, but such characteristics could not be obtained with other material-based heteroepitaxial layers.
【0023】上記効果は気相成長法によるエピタキシャ
ルウェハ以外に、CVD法、MOCVD法、MBE法、
ALE法によるエピタキシャルウェハにおいても同じ効
果が得られる。 実施例2:図3には本発明の半導体受光素子の第2実施
例が示される。The above effects are obtained by the CVD method, the MOCVD method, the MBE method, in addition to the epitaxial wafer by the vapor phase growth method.
The same effect can be obtained in the epitaxial wafer by the ALE method. Second Embodiment: FIG. 3 shows a second embodiment of the semiconductor light receiving element of the present invention.
【0024】n+ −InP基板1の裏面上に気相成長法
によりキャリア濃度1E15〜2E16cm-3かつ層厚
1〜3μmが好ましく、今回はキャリア濃度1E15c
m-3かつ層厚2μmのn−InP緩衝層2と、格子不整
合緩和のためにキャリア濃度1E15〜2E16cm-3
かつ層厚1〜3μmが好ましく、今回はキャリア濃度1
E15cm-3かつ層厚2μmのn−InAsP緩衝層3
と、長波長の光吸収層として吸収端波長λ=1.85μ
mでキャリア濃度1E15〜5E15cm-3かつ層厚3
〜4μmが好ましく、今回はキャリア濃度3E15cm
-3かつ層厚4μmの歪みn- −InGaAs(λ=1.
85μm)光吸収層4とを成長させた後、再び格子不整
合緩和のため吸収端波長を1.85μmから1.67μ
mまで順次変化させ、キャリア濃度3E15〜1E16
cm-3かつ層厚0.03〜0.5μmが好ましく、今回
はキャリア濃度1E16cm-3かつ層厚0.5μmの歪
みn−InGaAsリニアステップ層5を成長させた
後、キャリア濃度3E15〜1E16cm-3かつ層厚
0.03〜0.5μmが好ましく、今回はキャリア濃度
1E16cm-3かつ層厚0.5μmのn−InGaAs
P中間層6を成長させ、その後、増倍層としてキャリア
濃度1E16〜4E16cm-3かつ層厚0.5〜3μm
が好ましく、今回はキャリア濃度3E16cm-3かつ層
厚1.4μmのn+ −InP増倍層7を成長させる。最
後に窓層としてキャリア濃度2E15〜6E15cm-3
かつ層厚1〜2μmが好ましく、今回はキャリア濃度5
E15cm-3かつ層厚1.4μmのn- −InP窓層8
を成長させる。The carrier concentration is preferably 1E15 to 2E16 cm -3 and the layer thickness is 1 to 3 μm on the back surface of the n + -InP substrate 1 by the vapor phase growth method. This time, the carrier concentration is 1E15c.
m −3 and a layer thickness of 2 μm, the n-InP buffer layer 2, and a carrier concentration of 1E15 to 2E16 cm −3 for relaxing the lattice mismatch.
Also, the layer thickness is preferably 1 to 3 μm, and the carrier concentration is 1 this time.
N-InAsP buffer layer 3 having E15 cm −3 and a layer thickness of 2 μm
And an absorption edge wavelength λ = 1.85μ as a long wavelength light absorption layer
m, carrier concentration is 1E15 to 5E15 cm -3 and layer thickness is 3
~ 4μm is preferable, this time carrier concentration 3E15cm
-3 and a strain of 4 μm in thickness n − −InGaAs (λ = 1.
(85 μm) After growing the light absorption layer 4, the absorption edge wavelength is changed from 1.85 μm to 1.67 μ to relieve the lattice mismatch.
The carrier concentration is changed from 3E15 to 1E16 in order.
cm -3 and a layer thickness 0.03~0.5μm preferably, after this time grown strained n-InGaAs linear step layer 5 having a carrier concentration 1E16 cm -3 and a layer thickness 0.5 [mu] m, carrier concentration 3E15~1E16cm - 3 and a layer thickness of 0.03 to 0.5 μm are preferable, and this time, n-InGaAs having a carrier concentration of 1E16 cm −3 and a layer thickness of 0.5 μm.
A P intermediate layer 6 is grown, and then a carrier concentration of 1E16 to 4E16 cm −3 and a layer thickness of 0.5 to 3 μm is used as a multiplication layer.
This time, the n + -InP multiplication layer 7 having a carrier concentration of 3E16 cm -3 and a layer thickness of 1.4 μm is grown this time. Finally, as the window layer, the carrier concentration is 2E15 to 6E15 cm -3.
Also, the layer thickness is preferably 1 to 2 μm, and the carrier concentration is 5 this time.
N − −InP window layer 8 having E15 cm −3 and a layer thickness of 1.4 μm
Grow.
【0025】このような成長が行なわれたエピタキシャ
ルウェハの裏面にマスクをCVD法により成長し、ガー
ドリング9をたとえばBeのイオン注入法により形成す
る。次に前記ガードリング9に重なるように拡散マスク
の窓開けを行ない、たとえばZnの封止拡散により受光
部分に相当する1E17〜1E20cm-3のp+ 領域1
0を選択的に形成する。その後、裏面側に通常の方法で
絶縁膜11を成長させた後、前記p+ 領域10上の絶縁
膜11の一部に穴開けを行ないp側コンタクト電極12
をたとえば蒸着法により形成した後、加熱処理を行な
う。前記p側コンタクト電極を覆うようにp側電極13
を形成する。A mask is grown on the back surface of the epitaxial wafer thus grown by the CVD method, and the guard ring 9 is formed by the ion implantation method of Be, for example. Then, a window of a diffusion mask is opened so as to overlap the guard ring 9, and a p + region 1 of 1E17 to 1E20 cm -3 corresponding to a light receiving portion is formed by sealing diffusion of Zn, for example.
0 is selectively formed. After that, an insulating film 11 is grown on the back surface side by a usual method, and then a part of the insulating film 11 on the p + region 10 is perforated to form a p-side contact electrode 12.
Is formed by, for example, a vapor deposition method, and then heat treatment is performed. P-side electrode 13 so as to cover the p-side contact electrode
To form
【0026】続いて、n+ −InP基板1の表面に化学
的方法にてエッチングを行ない半径120μmないし1
50μmの凸型形状を形成しレンズとする。このレンズ
の表面に反射防止膜16を形成する。レンズを囲むよう
にn+ −InP基板1の表面にn側コンタクト電極14
をたとえば蒸着法により形成した後、加熱処理を行な
い、最後にnコンタクト電極14を覆うようにn側電極
15を形成する。Subsequently, the surface of the n + -InP substrate 1 is chemically etched to form a radius of 120 μm to 1 μm.
A lens having a convex shape of 50 μm is formed. An antireflection film 16 is formed on the surface of this lens. The n-side contact electrode 14 is formed on the surface of the n + -InP substrate 1 so as to surround the lens.
Is formed by, for example, a vapor deposition method, then heat treatment is performed, and finally the n-side electrode 15 is formed so as to cover the n-contact electrode 14.
【0027】このようにして製作した裏面入射型歪みI
nGaAs−APに1.65μmの光を入射すると、光
は表面のレンズからn+ −InP基板1、InP緩衝層
2、n−InAsP緩衝層3を透過した後、歪みn- −
InGaAs光吸収層4にて吸収される。ここで吸収さ
れた光によって生成されたキャリアは、n−InGaA
sリニアステップ層5、n−InGaAsP中間層6、
n+ −InP増倍層7、n- −InP窓層8、P+ −I
nP層10をへてp側電極13から外部回路へと流れ
る。Back-illuminated type strain I manufactured in this way
When light enters the 1.65μm to nGaAs-AP, after light passes through the n + -InP substrate 1, InP buffer layer 2, n-InAsP buffer layer 3 from the surface of the lens, distortion n - -
It is absorbed by the InGaAs light absorption layer 4. The carriers generated by the light absorbed here are n-InGaA.
s linear step layer 5, n-InGaAsP intermediate layer 6,
n + -InP multiplication layer 7, n -- InP window layer 8, P + -I
The current flows from the p-side electrode 13 to the external circuit through the nP layer 10.
【0028】このような構造をとることにより、1.6
5μmの光を70%以上の高い効率で吸収することがで
きる。また前記歪みn- −InGaAs光吸収層4とn
+ −InP基板1との間にn−InP緩衝層2とn−I
nAsP緩衝層3を挟むことで、格子不整合を抑えるこ
とができるため、100nA以下の低い暗電流特性が得
られる。By adopting such a structure, 1.6
It is possible to absorb light of 5 μm with high efficiency of 70% or more. Further, the strained n -- InGaAs light absorption layer 4 and n
+ -InP substrate 1 and n-InP buffer layer 2 and n-I
Since the lattice mismatch can be suppressed by sandwiching the nAsP buffer layer 3, a low dark current characteristic of 100 nA or less can be obtained.
【0029】また、上記の効果により歪みn- −InG
aAs光吸収層4にて生成されたキャリアはn+ −In
P増倍層7に印加された電界により30倍以上の高い増
倍率が得られる。[0029] In addition, distortion n by the above-mentioned effect - -InG
The carriers generated in the aAs light absorption layer 4 are n + -In
A high multiplication factor of 30 times or more can be obtained by the electric field applied to the P multiplication layer 7.
【0030】上記効果は気相成長法によるエピタキシャ
ルウェハ以外に、CVD法、MOCVD法、MBE法、
ALE法によるエピタキシャルウェハにおいても同じ効
果が得られる。The above effects are obtained by the CVD method, the MOCVD method, the MBE method, in addition to the epitaxial wafer by the vapor phase growth method.
The same effect can be obtained in the epitaxial wafer by the ALE method.
【0031】[0031]
【発明の効果】以上説明したように、本発明によれば、
歪みn- −InGaAs光吸収層内で1.65μmの光
を70%以上の高い効率で吸収することができる。また
格子不整合を抑えることができるため、100nA以下
の低い暗電流特性が得られる。また、歪みn- −InG
aAs光吸収層4にて生成されたキャリアはn+ −In
P増倍層7に印加された電荷により30倍以上の高い増
倍率が得られる。As described above, according to the present invention,
Light of 1.65 μm can be absorbed with high efficiency of 70% or more in the strained n − -InGaAs light absorption layer. Further, since lattice mismatch can be suppressed, low dark current characteristics of 100 nA or less can be obtained. In addition, strain n − −InG
The carriers generated in the aAs light absorption layer 4 are n + -In
Due to the charges applied to the P multiplication layer 7, a high multiplication factor of 30 times or more can be obtained.
【図1】本発明の実施例1の半導体受光素子の断面図で
ある。FIG. 1 is a sectional view of a semiconductor light receiving element according to a first embodiment of the present invention.
【図2】本発明の実施例1の半導体受光素子の感度分布
である。FIG. 2 is a sensitivity distribution of the semiconductor light receiving element according to the first embodiment of the present invention.
【図3】本発明の実施例2の半導体受光素子の断面図で
ある。FIG. 3 is a sectional view of a semiconductor light receiving element according to a second embodiment of the present invention.
【図4】Inx Ga1-x Asのxの値と暗電流特性を示
すグラフである。FIG. 4 is a graph showing a value of x and dark current characteristics of In x Ga 1-x As.
【図5】従来例を示す半導体受光素子の断面図である。FIG. 5 is a sectional view of a semiconductor light receiving element showing a conventional example.
【図6】別の従来例を示す半導体受光素子の断面図であ
る。FIG. 6 is a sectional view of a semiconductor light receiving element showing another conventional example.
1 n+ −InP基板 2 n−InP緩衝層 3 n- −InAsP緩衝層 4 歪みn- −In0.57Ga0.43As光吸収層 5 n−InGaAsリニアステップ層 6 n−InGaAsP中間層 7 n+ −InP増倍層 8 n- −InP窓層 9 ガードリング 10 p+ 領域 11 絶縁膜 12 p側コンタクト電極 13 p側電極 14 n側コンタクト電極 15 n側電極 16 反射防止膜 17 n−In0.57Ga0.43As光吸収層 18 n−InAs/GaAs超格子光吸収層 19 p+ −InP層1 n + -InP substrate 2 n-InP buffer layer 3 n -- InAsP buffer layer 4 Strain n --In 0.57 Ga 0.43 As light absorption layer 5 n-InGaAs linear step layer 6 n-InGaAsP intermediate layer 7 n + -InP Multiplier layer 8 n − -InP window layer 9 Guard ring 10 p + region 11 Insulating film 12 p-side contact electrode 13 p-side electrode 14 n-side contact electrode 15 n-side electrode 16 antireflection film 17 n-In 0.57 Ga 0.43 As Light absorption layer 18 n-InAs / GaAs superlattice light absorption layer 19 p + -InP layer
Claims (6)
InAsP層と、第一導電型In0.57Ga0.43As光吸
収層(λ=1.85μm)と、第一導電型InP増倍層
と、第一導電型InP窓層とを順次形成したヘテロエピ
タキシャル層構造と、前記窓層内または増倍層内に部分
的に第二導電型InP領域を設けた構造と、前記窓層内
に設けた前記第二導電型InP領域上に形成した第二導
電型電極と、前記第一導電型InP基板上に形成した第
一導電型電極とを有することを特徴とする半導体受光素
子。1. A first conductivity type InAsP layer, a first conductivity type In 0.57 Ga 0.43 As light absorption layer (λ = 1.85 μm), and a first conductivity type InP multiplication layer on a first conductivity type InP substrate. Layer and a first conductivity type InP window layer are sequentially formed, a structure in which a second conductivity type InP region is partially provided in the window layer or the multiplication layer, and in the window layer 2. A semiconductor light receiving element, comprising: a second conductivity type electrode formed on the second conductivity type InP region provided on the first conductivity type electrode; and a first conductivity type electrode formed on the first conductivity type InP substrate.
吸収層の層厚が2μmないし5μmであることを特徴と
する請求項1記載の半導体受光素子。2. The semiconductor light receiving element according to claim 1, wherein the first conductivity type In 0.57 Ga 0.43 As light absorption layer has a layer thickness of 2 μm to 5 μm.
吸収層と前記第一導電型InP増倍層との間に波長1.
85μmから1.67μmまで連続的に組成を変化させ
た層を介装した構造としたことを特徴とする請求項1記
載の半導体受光素子。3. The first conductivity type In 0.57 Ga 0.43 As light absorption layer and the first conductivity type InP multiplication layer have a wavelength of 1.
2. The semiconductor light receiving element according to claim 1, wherein a structure is provided in which a layer whose composition is continuously changed from 85 μm to 1.67 μm is interposed.
InP緩衝層を有し、前記第一導電型InP緩衝層上に
第一導電型InAsP緩衝層を有し、前記第一導電型I
nAsP緩衝層上に第一導電型のInGaAs光吸収層
を有し、前記第一導電型のInGaAs光吸収層上に第
一導電型の歪みリニアステップInGaAs層を有し、
前記第一導電型の歪みリニアステップInGaAs層上
に第一導電型InGaAsP中間層を有し、前記第一導
電型InGaAsP中間層上に第一導電型InP増倍層
を有し、前記第一導電型InP増倍層上に第一導電型I
nP窓層を有し、前記InP窓層上に第二導電型領域を
有し、前記第二導電型領域上及び前記第一導電型InP
基板下にそれぞれ電極を有することを特徴とする半導体
受光素子。4. A first conductivity type InP buffer layer is provided on a first conductivity type InP substrate, and a first conductivity type InAsP buffer layer is provided on the first conductivity type InP buffer layer. Type I
a first conductivity type InGaAs light absorption layer is provided on the nAsP buffer layer, and a first conductivity type strained linear step InGaAs layer is provided on the first conductivity type InGaAs light absorption layer;
The first conductivity type strained linear step InGaAs layer has a first conductivity type InGaAsP intermediate layer, and the first conductivity type InGaAsP intermediate layer has a first conductivity type InP multiplication layer. First conductivity type I on the InP multiplication layer
an nP window layer, a second conductivity type region on the InP window layer, the second conductivity type region and the first conductivity type InP
A semiconductor light-receiving element characterized by having electrodes under a substrate.
がIn0.57Ga0.43As層からなることを特徴とする請
求項4記載の半導体受光素子。5. The semiconductor light receiving element according to claim 4, wherein the first-conductivity-type InGaAs light absorption layer is an In 0.57 Ga 0.43 As layer.
nGaAs層がIn0.57Ga0.43AsからIn0.53Ga
0.47Asへと変化する歪みリニアステップ層からなるこ
とを特徴とする半導体受光素子。6. A strain linear step I of the first conductivity type.
The nGaAs layer is In 0.57 Ga 0.43 As to In 0.53 Ga
A semiconductor light receiving element comprising a strained linear step layer that changes to 0.47 As.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8149272A JPH0964407A (en) | 1995-06-14 | 1996-06-11 | Semiconductor light receiving element |
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7-147330 | 1995-06-14 | ||
| JP14733095 | 1995-06-14 | ||
| JP8149272A JPH0964407A (en) | 1995-06-14 | 1996-06-11 | Semiconductor light receiving element |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0964407A true JPH0964407A (en) | 1997-03-07 |
Family
ID=26477912
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8149272A Pending JPH0964407A (en) | 1995-06-14 | 1996-06-11 | Semiconductor light receiving element |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0964407A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20160050574A (en) * | 2014-10-30 | 2016-05-11 | 한국과학기술연구원 | Photodiode and method for fabricating the same |
| WO2019189700A1 (en) * | 2018-03-30 | 2019-10-03 | パナソニックIpマネジメント株式会社 | Photodetector |
| EP3955321A4 (en) * | 2019-04-09 | 2022-12-14 | Nippon Telegraph And Telephone Corporation | SOLID STATE LIGHT RECEIVING ELEMENT |
-
1996
- 1996-06-11 JP JP8149272A patent/JPH0964407A/en active Pending
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20160050574A (en) * | 2014-10-30 | 2016-05-11 | 한국과학기술연구원 | Photodiode and method for fabricating the same |
| WO2019189700A1 (en) * | 2018-03-30 | 2019-10-03 | パナソニックIpマネジメント株式会社 | Photodetector |
| CN111937151A (en) * | 2018-03-30 | 2020-11-13 | 松下知识产权经营株式会社 | Light detector |
| JPWO2019189700A1 (en) * | 2018-03-30 | 2021-04-30 | パナソニックIpマネジメント株式会社 | Photodetector |
| US11888003B2 (en) | 2018-03-30 | 2024-01-30 | Panasonic Intellectual Property Management Co., Ltd. | Photodetector |
| US12113078B2 (en) | 2018-03-30 | 2024-10-08 | Panasonic Intellectual Property Management Co., Ltd. | Photodetector |
| EP3955321A4 (en) * | 2019-04-09 | 2022-12-14 | Nippon Telegraph And Telephone Corporation | SOLID STATE LIGHT RECEIVING ELEMENT |
| US12034090B2 (en) | 2019-04-09 | 2024-07-09 | Nippon Telegraph And Telephone Corporation | Semiconductor light receiving element |
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