JPH0969596A - Semiconductor device - Google Patents

Abstract

(57) [Abstract] [Purpose] A semiconductor integrated circuit device and a semiconductor integrated circuit device package electrode terminal and an electronic circuit terminal that can respond to progress such as increase in the number of pins, miniaturization, and higher functionality of the semiconductor integrated circuit device. To realize the connection structure in a highly reliable manner. On an electronic circuit manufactured by using each electrode terminal of a semiconductor integrated circuit device and a semiconductor integrated circuit device package and a copper foil containing at least copper, copper alloys and oxides thereof without roughening particles. In a semiconductor device in which terminals are connected via solder, etc., the copper foil has one or more coating layers selected from metals, alloys, oxides, hydroxides and hydrates on the adhesive surface with the adhesive base material. On top of which there is a layer of coupling agent. The adhesive base material is a synthetic resin having a double bond or an epoxy group capable of generating radicals capable of chemically bonding with a coupling agent, and for example, a peroxide-curable synthetic resin as a main component and a copper foil. Bond the laminated substrates. A semiconductor device having a connection layer structure of at least six to seven layers, counting from the terminals on the semiconductor side.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor integrated circuit device and a connection structure for a semiconductor integrated circuit device package and an electronic circuit.

[0002]

2. Description of the Related Art Electrode terminals of semiconductor integrated circuit devices and semiconductor integrated circuit device packages are bonded to terminals of electronic circuits designed to meet a desired purpose and application by bonding wire, solder or anisotropic conductive adhesive. It is used as a semiconductor device connected by a film or the like.

Until now, semiconductor integrated circuit devices have been used in the form of a module called a package in which the device is sealed with plastic or mounted on a ceramic wiring board. A typical example of this is QFP. In the case of QFP, each electrode of the device is connected to an electronic circuit via a lead frame. This QFP is still the mainstream in semiconductor integrated circuit devices used in electronic equipment.
The area ratio of the element to P is only 15 to 50%, and in the flow of miniaturization and high functionality of electronic equipment, this area ratio is greatly improved to improve the packaging density and further increase the integration density. The technological development for realization of is actively carried out. Along with this, the number of terminals has dramatically increased, and the number of pins has been increased and the pitch has been narrowed.However, there are limits to the thinning and high-density technologies of printed wiring boards, which are the mainstream electronic circuits. Therefore, a semiconductor device has been created by a new mounting method called TAB, MCM, BGA, CSP or IC pair chip mounting for the purpose of improving the area ratio of the semiconductor integrated circuit device package and the device and improving the mounting density. . (Nikkei Electronics 1955.1.
(See p. 16 of No. 16)

The electronic circuit referred to here is a printed wiring board ("printed circuit technology") in which a copper foil of a copper-clad laminate in which a copper foil and a laminated base material are laminated and bonded is processed into a desired circuit by a printed circuit technology. Refer to "Handbook", published by Nikkan Kogyo Shimbun on February 24, 1993), which satisfies the circuit function. The copper foil used here is classified into electrolytic copper foil and rolled copper foil depending on the manufacturing method. Its thickness is 3
Those of 5 and 18 μm are mainly. In addition, 70 and 105 μm for large thickness, 12 for thin thickness
And those of 9 μm are in practical use.

The copper foil used in this copper-clad laminate is
To strengthen the adhesion with the laminated base material so that the terminals can be stably fixed even after processing to an electronic circuit, it is called roughening and consists of copper, copper alloy and their oxides on the surface of the copper foil. The roughened fine particles are attached to form irregularities. The degree of the unevenness, that is, the roughness is about 0.5 to 3.0 μm in terms of the center line average roughness defined in JIS-B-0601. The unevenness due to the roughened fine particles is to develop a physical adhesive force due to the anchoring effect when the copper foil is thermocompression-bonded to the laminated base material to form a laminated body. Since then, all printed wiring boards have been built by this method, and today it is. As described above, the conventional printed wiring board is made of a copper-clad laminate in which copper foil and a laminated base material are laminated on the principle of physical adhesion. Therefore, a semiconductor device having a structure in which the electrode terminals of the semiconductor integrated circuit element and its package are connected to the terminals of the electronic circuit through bonding wire, solder, or an anisotropic conductive adhesive film is used. The surface with the roughened fine particles made of these oxides that becomes uneven is the adhesion surface with the laminated base material, and the opposite surface is the electrode surface for electrolysis in the case of electrolytic copper foil, rolled copper foil. In this case, the copper foil surface formed by transferring the surface of the rolling roll is connected to the semiconductor integrated circuit element and each electrode terminal of the package. The roughness of the connection surface is usually 0.35 μm or less. The surface of copper foil is often plated at the same time when copper plating is performed to give conductivity to through holes and via holes, which are upper and lower conducting circuits of electronic circuits. Each electrode terminal of the circuit element and its package will be connected onto the terminal of this copper-plated electronic circuit. Further, the terminals of the electronic circuit are plated with solder or gold in order to enhance the connection reliability, and the semiconductor integrated circuit may be connected onto the terminals.

The terminals on the electronic circuit which are connected to the respective electrode terminals of the semiconductor integrated circuit element and its package through bonding wire, solder or anisotropic conductive adhesive film are laminated base materials via the adhesive base material layer. And constitutes a laminated body. Adhesive substrates for copper foil and laminated base materials are suitable for synthetic resin laminated base materials such as epoxy resin that play the role of adhesive base materials, phenol resin, polyimide resin film, polyester resin film, etc. Some use an adhesive. The phenol resin is an adhesive containing a composite of polyvinyl butyral and a thermosetting resin such as a phenol resin, a melamine resin or an epoxy resin as a main component (for example, Japanese Patent No. 713,780), a polyimide resin film and a polyester resin film. Then, for example, an acrylic or isocyanate adhesive is usually used. The thickness of the adhesive base material layer is usually 20 to 50 μm.

As a laminated base material which constitutes a laminated body with a copper foil, a phenol resin, an epoxy resin, a polyimide resin, a polyester resin, BT resin, PPO or the like is used. Paper is used for the phenol resin, glass fiber cloth or non-woven fabric is used for the epoxy resin, and glass fiber cloth is used for the polyimide resin and BT resin as a reinforcing base material, and copper foil is used to form a laminate. Recently, aramid fiber cloth and non-woven cloth are also used as a reinforcing base material for epoxy resin, polyimide resin and BT resin. In the case of a polyimide resin and a polyester resin, a film-like material which does not include a reinforcing base material such as paper or glass fiber cloth is often used. A wiring board using this is referred to as a flexible printed wiring board and is used in a three-dimensionally bent state.
It is used as a tape carrier for a semiconductor integrated circuit device called AB. The thickness of the synthetic resin laminated base material is usually 0.05 to 1.5 mm. In addition, recently, a metal plate such as an iron plate, a stainless plate, or an aluminum plate having a thickness of 2.0 mm or less is also used as a laminated base material.

As described above, the electrode terminals of the semiconductor integrated circuit element and the package of the semiconductor integrated circuit element are separated from each other on the electronic circuit by a bonding agent such as bonding wire, solder or anisotropic conductive adhesive film. It is connected to a terminal made of a metal and becomes a semiconductor device on an electronic circuit. The terminal made of the copper foil has a layer structure in which it is laminated and adhered to the laminated base material via the adhesive base material layer or directly.
At this time, the adhesive surface of the copper foil with the laminated base material has an uneven surface due to the roughened fine particles made of copper, copper alloys and oxides thereof. It has a semiconductor device connection structure that has been used since the time when the wiring board was developed.

[0009]

As described above, the conventional semiconductor integrated circuit element and each electrode terminal of its package are made of copper foil in which roughened fine particles made of copper, copper alloy and their oxides are present. The semiconductor device was configured by being joined to the terminal on the electronic circuit used. However, in the process of increasing the packaging density and integration of semiconductor integrated circuit elements, and the accompanying increase in the number of electrode terminals and narrow pitch, improvements in fine processing of electronic circuits can follow the progress of this semiconductor side. However, the following problems arose and the solution was a problem.

(1) For forming an electronic circuit, unnecessary copper foil is removed by etching the surface of the copper-clad laminate with a chemical agent. At this time, the time for removing the roughening fine particles composed of copper, the copper alloy and their oxides on the adhesion surface between the copper foil and the adhesive base material is roughened because the particles are embedded in the adhesive base material layer. It takes more than 1.5 times the time required for etching when there are no fine particles. For this reason, as shown in FIG. 7, the end face of the copper foil is scooped out and the substantial width of the adhesive surface becomes about 60% of the designed value in an extreme case.
Furthermore, the etching liquid permeates along the bonding surface between the particulate copper, the copper alloy and their oxide layers and the bonding base material,
There is a phenomenon that the adhesive strength around the edges of the etched copper foil is significantly reduced. For this reason, the limit of the fine processing width is set to a copper foil having a thickness of 35 μm, a conductor width of 100 μm, and a wiring pitch of 300 μm (TAB: 100 μm). Currently, as electronic devices such as portable electronic devices and electronic computers are becoming smaller and more sophisticated, the high integration of semiconductor integrated circuits is rapidly progressing as described above, and semiconductor integrated circuit devices and their packages are The number of pins and the pitch of each electrode terminal are rapidly decreasing. However, as described above, the fine processing of the printed wiring board has a conductor width of 100 μm,
The wiring pitch is limited to 300 μm, and further fine processing is a problem. As a solution to this problem, recently, attempts have been made to reduce irregularities due to roughened fine particles as much as possible, and a high-density circuit board on which a circuit called a build-up substrate is formed by electroless plating has been developed, and a wiring pitch of 100 to 150 μm is possible. However, it has not yet been generalized in terms of price and technology. (See Nikkei Electronics 1995 Apr. 10, p100)

(2) Around the terminals of the electronic circuit, traces of the roughened fine particles made of copper, copper alloy and their oxides buried in the adhesive base material are left as minute holes as shown in FIG. Exists. There is a problem in that the holes are damaged and solder between adjacent terminals causes a bridge, or dust easily adheres and is difficult to remove. In addition, chemicals such as etching solution and flux easily remain in the holes, making cleaning difficult.

(3) The electric signal input / output to / from the semiconductor integrated circuit is a high frequency electric signal. As is well known, electricity
It has the property of traveling along the surface of a conductor. If the surface of the conductor is rough, reflection of electric signals, loss of energy and noise are likely to occur, and transmission reliability becomes a problem particularly in the case of super-high frequency electric signals or recording / playback of music.

(4) With the development and spread of advanced electronic equipment, it is essential to reduce manufacturing costs. Up to now, semiconductor devices have been reduced in cost by improving the cost performance of the semiconductor integrated circuit body and rationalizing the mounting process such as soldering, but the cost of electronic circuits is limited by the limit of fine processing. However, we are looking for ways to increase the number of layers and methods by electroless plating, and the actual situation is that the cost is increasing. Against this background, from the viewpoint of cost minimization of the semiconductor device as a whole, there is a demand for the need to focus on the structure of electronic circuits that have not changed since the practical use of semiconductor integrated circuits. Has become. From such a fact, when the material cost of the copper clad laminate using the roughened copper foil is analyzed, the cost of the copper foil accounts for about 50%, and the significant reduction is a problem.

[0014]

The inventors of the present invention have conducted extensive studies to solve the above-mentioned problems, and as a result, roughened fine particles made of copper, a copper alloy and their oxides on the adhesive surface with an adhesive substrate. It was confirmed that these problems could be solved by using a copper foil without copper in a copper-clad laminate, processing the circuit to make an electronic circuit terminal, and connecting it to a semiconductor integrated circuit side terminal. In order to realize the above, a new bonding principle was introduced to bond the copper foil and the laminated base material of the copper-clad laminate, and the present invention was successfully realized.

That is, (1) a plurality of signal system terminals, ground terminals and power supply terminals of a semiconductor integrated circuit element or a plurality of signal system terminals, ground terminals and power supply terminals of a semiconductor integrated circuit element package are bonded wire, solder or In a semiconductor device that is connected to a terminal on an electronic circuit via an anisotropic conductive adhesive film or the like, the terminal of the electronic circuit has at least copper, copper alloy, and copper in which roughening fine particles made of oxides thereof do not exist. A semiconductor device formed from scratches. (2), B, Al, P, Zn, Ti, V, Cr, M on the surface opposite to the connection surface of the copper foil described in (1) with the semiconductor integrated circuit.
n, Fe, Co, Ni, Ag, In, Zr, Sn, N
b, Mo, Ru, Rh, Pd, Pb, Ta, W, Ir,
The semiconductor device according to (1), which has a coating layer composed of one or more metals, alloys, oxides, hydroxides and hydrates containing one or more elements selected from Pt. (3) The semiconductor device according to (1), which has a silane coupling agent, a titanate coupling agent, a thiol coupling agent, or an aluminum coupling agent layer on the coating layer according to (2). (4), The semiconductor device according to (1), further comprising a thiol-based coupling agent layer on a surface of the copper foil according to (1) opposite to a connection surface with the semiconductor integrated circuit. A copper foil having a coupling agent layer according to (5), (3) or (4) has a tensile strength of 50 kg / cm ² or more,
Adhesive base material layer having a high strength and elongation of 1% or more and capable of generating radicals capable of chemically bonding with a coupling agent, or containing a synthetic resin having a double bond or an epoxy group as a main component. To form a laminated base material and a laminated body through (1)
13. The semiconductor device according to claim 1. (6), The semiconductor device according to (1), wherein the adhesive base material layer according to (5) contains a synthetic resin that is hardened by a peroxide as a main component. Counting from the electrode terminals of the semiconductor integrated circuit element or the package thereof in the above (1) to (6), a connection layer made of solder or the like, a copper foil terminal, a coating layer containing metal, a coupling agent layer, an adhesive base A semiconductor device having at least a six to seven layer structure of a material layer and a laminated base material layer was invented. Among these, the copper foil described in (1), the coating layer described in (2), the coupling agent layer described in (3), and the adhesive base material layer described in (5) are the layer structure, material and function of a conventional semiconductor device. It is different in principle. This layer structure is the basic layer structure of the present invention, and the above problem can be solved by replacing the conventional semiconductor device with this layer structure as a base axis.

In the case of the conventional roughened copper foil, the main adhesion is the physical anchoring effect, but the adhesion between the copper foil of the present invention and the adhesive base material is mainly chemical adhesion. It is what The present invention relates to a connection layer configuration of each electrode terminal of a semiconductor integrated circuit element or its package and a terminal of an electronic circuit, for realizing it, a copper foil and an adhesive base material form a good adhesion, Since it is premised that the insulation system supports the conductor system of the electronic circuit with high reliability,
The present inventor discovered a method based on a new bonding principle which does not depend on the anchoring effect described below, and completed the semiconductor device of the present invention. First, copper foil is produced by an electrolytic method or a rolling method. In the electrolytic method, the surface of the electrode is transferred to the copper foil surface on the electrode surface side, and the roughness of the surface can be artificially created by the electrode surface. Usually its value is 0.10-0.3
It has a thickness of 5 μm and is glossy as compared with the surface on the side opposite to the electrolytic solution, which is called a shiny surface. The surface on the electrolyte side is called the matte surface. This surface has a small waviness throughout and is dull. The roughness is usually 0.3-1.
5 μm. The state of the surface of the rolling roll is transferred to the copper foil produced by the rolling method. Its surface is flatter, glossier and has a roughness of 0.10 to 0.15 than copper foil produced by electrolysis.
μm. The copper foil used is B, Al, P, Zn, Ti, V, Cr, Mn, Fe, C on the adhesive surface with the adhesive substrate.
o, Ni, Ag, In, Zr, Sn, Nb, Mo, R
A coating layer containing one or more elements selected from u, Rh, Pd, Pb, Ta, W, Ir and Pt is prepared. The coating layer may include oxides, hydroxides, and hydrates as well as metals or alloys. It may be a plurality of coating layers. In the case of an alloy, it may contain copper. The thickness is
The range of 0.01 to 5 μm is preferable. These coating layers can be formed by electroplating, chemical plating, vapor deposition, sputtering, dipping treatment or the like. Especially Pd, Ni, Zn,
Metals such as Cr, Mo, Co, alloys, oxides, hydroxides and hydrates are effective for adhesion. Since this coating layer does not roughen the surface of the copper foil, the roughness of the coating layer may be similar to the original roughness of the copper foil. In the case of electrolytic copper foil, either the shiny surface or the matte surface can be used as the adhesive surface with the adhesive substrate. Next, a silane coupling agent, a titanate coupling agent, a thiol coupling agent, or an aluminum coupling agent is applied on the coating layer. Although these coupling agents form a coupling agent layer on the coating layer even if they are mixed on the adhesive substrate instead of on the copper foil, it is better to apply them on the copper foil. It was effective.

The adhesive base material has a tensile strength of 50 kg / cm.
² or more, preferably 100 kg / cm ² or more, more preferably 200 kg / cm ² and elongation of 1% or more, preferably 5% or more, more preferably 10% or more of a high strength and high elongation synthetic resin, It is preferable that a radical capable of chemically bonding with the ring agent be generated or that a functional group be present. For example, a synthetic resin composition containing a peroxide curing catalyst is good. Peroxide curable resins include polyethylene, ethylene-α-olefin copolymers, polyvinyl alcohol and aliphatic aldehyde derivatives, ethylene-
α-olefin diene terpolymer, engineering plastics such as PPO, polybutadiene, polyisoprene, various rubbers, DCPD, styrene-butadiene copolymers, and many other diene synthetic resins and allyl groups such as diallyl phthalate and triallyl isocyanate. , Acrylates and their derivatives, methacrylates and their derivatives, various acrylates such as polyester or epoxy acrylates, urethane acrylates, polyester acrylates, and glycidyl methacrylate-olefin copolymers. If you can use it. Halogenation and addition of a flame retardant for flame retardation are performed in the same manner as in conventional semiconductor devices. In addition, these synthetic resins are rarely used alone, and are used in combination with a curing agent, a vulcanizing agent, a vulcanization accelerator, a stabilizer, a compatibilizer, a modifier, a film forming agent, etc. They can be used in the state of a polymer, an oligomer, or a polymer in combination or copolymerized according to the required performance of the intended semiconductor device and the manufacturing process. The thickness of the adhesive base material layer is 5 to 150 μm, and when a liquid material is applied to the copper foil surface and dried to form a coating film, or when it is formed into a film and the copper foil and the laminated base material are laminated and adhered to each other. There are methods such as inserting it under the copper foil or attaching it to the copper foil. Peroxides are, for example, dimethyl-di (t-butylperoxy) hexane, dimethyl- (t-butylperoxy) hexine, benzoyl peroxide, di (t-
Butylperoxy) -m-diisopropylbenzene and the like, and the decomposition temperature and the like of each are selected so as to meet the conditions of lamination adhesion. The addition amount is about 0.
Add 01 mole. It is also possible to use other radical generators or decomposition aids in combination therewith. As the laminated base material, a conventionally used one is used. The adhesive base material and the laminated base material may be the same material. In this case, the number of layers is counted as two layers, that is, an adhesive base material layer and a laminated base material layer. As a method for laminating and laminating, a laminated body is manufactured by heating and pressurizing using a flat plate press, a roll, an autoclave or the like by a conventional method.

To summarize the above-mentioned method, each electrode terminal of the semiconductor integrated circuit element and the semiconductor integrated circuit element package is connected to the terminal on the electronic circuit side by bonding wire, solder, or an anisotropic conductive adhesive film. To be a semiconductor device. The terminals on the electronic circuit side are formed by etching copper foil on the copper-clad laminate. This copper foil is produced by an electrolysis method or a rolling method, and does not have roughened fine particles made of copper, copper alloys and their oxides. Is coated. A layer of a silane coupling agent, a titanate coupling agent, a thiol coupling agent or an aluminum coupling agent is formed thereon. In the case of a thiol-based coupling agent, a layer may be formed directly on the copper foil. The copper foil thus treated is laminated and bonded to the laminated base material via the adhesive base material layer. The adhesive base material layer can generate radicals capable of chemically bonding with a coupling agent with high strength and high extensibility such as a peroxide-curable resin composite, or having a double bond or an epoxy group. Resin is used.

[0019]

The terminal on the electronic circuit using the copper foil of the present invention, which does not have roughened fine particles composed of copper, copper alloys and oxides thereof, cannot be bonded by the anchoring effect. , A semiconductor device was produced by applying a new bonding principle and bonding method mainly for chemical bonding to a copper clad laminate. The adhesion-related part of the present invention is the coating layer according to claim 2, the coupling agent layer according to claim 3, and the adhesive base material layer according to claims 5, 6, 7 and 8. The coupling agent chemically binds to the coating layer according to claim 2 containing at least one kind of various metals. At this time, sufficient adhesion cannot be obtained with simple copper foil except for the thiol-based coupling agent, but good adhesion can be obtained by providing the various coating layers recited in claim 2. Next, the adhesive substrate layer according to claims 5, 6, 7 and 8 is:
At the time of lamination adhesion, it reacts with a coupling agent and chemically bonds. As a result, sufficient adhesion can be obtained even with copper foil in which roughening particles are not present. The adhesive force between the copper foil and the adhesive base material layer is, for example, Japanese Patent Publication No. 60-15654.
It is known that a silane-based coupling agent increases the number of silane-based coupling agents as described in 1. There was little effect with the copper foil, which did not exist. It is considered that this is because the epoxy resin is in the B state, the number of its functional groups is low, and the activity is also low. However, for example, the double bond of the synthetic resin is opened or dehydrogenation occurs due to radicals having extremely high activity generated by thermal decomposition of the peroxide catalyst, resulting in radicals or functional groups having extremely high activity and coupling. It was found to form a strong bond with the agent. In addition, it is essential that the adhesive base material has a certain strength and elongation in order to resist deformation due to external force such as peeling. In the conventional adhesive base, the elongation was particularly small at 1% or less, and the resistance to external force was small. The copper foil coating layer, the coupling agent, and the high-strength and high-stretch adhesive base material capable of generating extremely active radicals or having a functional group are the conductor systems on the electronic circuit side of the semiconductor device. It plays the role of an adhesive system that establishes a layer structure in which the insulation system supports with reliability. And in the case of this system, the peel strength is normal, after heat treatment, after hydrochloric acid immersion treatment,
Very high values are obtained as described in the examples. This is unthinkable in the adhesive base material used in the conventional semiconductor device. Since the copper foil of the present invention has no roughening fine particles, the cross section after etching becomes rectangular as shown in FIG. In the case of the conventional roughened copper foil, as shown in FIG. 7, the end surface is removed by etching. This is because roughening fine particles made of copper, a copper alloy and their oxides for roughening are buried in the adhesive base material, and it takes a long time (copper is This is a phenomenon that occurs when copper foil is excessively etched because it requires more than 1.5 times the etching time. At this time, since the surface of the copper foil has a protective film (etching resist), there is no change, and only the end face is etched to be in a scooped state. As a result, in the case of the conventional roughened copper foil, the substantial adhesive area becomes about 60% of the circuit width in the extreme case, and the adhesive force of the entire circuit width decreases in proportion to the adhesive area. Will end up. This is not the case with copper foil without roughening particles. Also, since there is no particulate matter buried in the synthetic resin substrate, the etching time is about 60
% Can be reduced. Furthermore, the adhesive surface of the copper foil and the adhesive base layer is
Since the coating layer on the adhesive surface of the copper foil, the coupling agent layer, and the adhesive base layer are chemically bonded, the etching liquid rarely seeps into the adhesive surface, and the conventional roughened copper foil is used. There is almost no decrease in the adhesive force due to etching as in the case of doing. Further, even if it is subjected to a hydrochloric acid treatment or a heat treatment, there is little decrease in the adhesive strength. As a result, a copper foil with a thickness of 35 μm has a conductor width of 50 μm, a wiring interval of 50 μm, a wiring pitch of 100 μm (TAB can be up to 70 μm), and a thickness of 18
Copper foil of μm, conductor width 20 μm, wiring interval 20 μm,
It became possible to process circuits up to a wiring pitch of 40 μm. For this reason, it has become possible to sufficiently meet the demands for a semiconductor integrated circuit device and a semiconductor integrated circuit device package with a large number of pins and a narrow pitch. In particular, it is possible to miniaturize the lead lines from the terminals on the electronic circuit, the area occupied by the circuits densely arranged around the terminals is reduced, and the packaging density is improved. In addition, the surface of the adhesive base material layer where the copper foil has been removed by the etching process is conventionally in a state in which roughened fine particles are immersed,
Although it was left as a minute hole as it was, in the semiconductor device of the present invention, since there is no such fine particles, the trace of the copper foil removed by the etching process is also flat. Therefore, it is difficult for the solder to adhere to the periphery of the terminals, and the solder is less likely to bridge between the terminals adjacent to each other. Dirt does not easily adhere and cleaning of etching liquid and flux residue is easy.

[0020]

FIG. 1 is a first embodiment of the present invention (embodiment 1).
Is an example of a semiconductor device using the most standard semiconductor integrated circuit element package called QFP. A semiconductor integrated circuit element (hereinafter referred to as a semiconductor chip) 1 is sealed and protected together with a lead frame 8 by an epoxy resin molded product 2. The electrode terminal 3 is also referred to as a lead and extends outside the molded product 2. The printed wiring board 4 (thickness: 1.6 mm), the glass fiber cloth base material epoxy resin 5 (manufactured by Hitachi Chemical Co., Ltd., product number E-67), which is a laminated base material constituting the printed wiring board 4, and electrolytic copper free from roughened fine particles are 6 and 50μ in the middle
m adhesive base material layer 15. (Ethylene butene diene terpolymer ... Mitsui Petrochemical Co., Ltd., product number K-9720 ... 35 parts by weight, hydrous silica ... Nippon Silica Co., product number VN-3 ... 1
0 parts by weight, t-butyl peroxydiisopropylbenzene ... Nippon Oil & Fats Co., Ltd., perbutyl ... 0.35 parts by weight are uniformly kneaded and processed into a film having a thickness of 50 μm) The semiconductor electrode terminals 3 are soldered to the printed wiring board 4 The semiconductor device is formed by being connected to the terminal 6. The copper foil without the roughened fine particles is an electrolytic copper foil having a thickness of 18 μm, and the bonding surface is electroplated with a Ni—Mo—Co alloy having a thickness of 0.5 μm.
On top of that, a silane coupling agent (S from Chisso Petrochemical Co., Ltd.
-Used by dissolving 330,1 g in 1 liter of water)
Is applied by dipping for 10 seconds and dried at 60 ° C. for 1 minute.
The wiring pitch of the printed wiring board 4 was 150 μm, the terminal pitch was 300 μm, and 384-pin QFP could be connected. In the conventional printed wiring board using the roughened copper foil, the wiring pitch was 300 μm, the terminal pitch was 500 μm, and the QFP of 304 pins was at a practically equivalent level. The peeling strength of the copper foil was normal and could not be peeled off after heating at 180 ° C. for 48 hours. It was 5.1 kN / m after immersion in hydrochloric acid having a concentration of 18% at room temperature for 1 hour. In the case of the conventional copper-clad laminate, 2.0 kN / m, 1.9 kN / m,
It was 1.3 kN / m. This semiconductor device has a seven-layer structure. The case where the silane coupling agent of Example 1 is replaced with a titanate coupling agent will be described. (Example 2) The titanate coupling agent is
Isopropyltri (N-aminoethyl-aminoethyl)
Titanate (manufactured by Ajinomoto Co., product number TR44, 1 g dissolved in 1 liter of water is used), and a Ni-Mo-Co alloy coating layer of copper foil without roughening fine particles is dipped for 10 seconds and applied at 60 ° C. And dried for 1 minute. Using this copper foil, the same printed wiring board as in Example 1 was made, and a QFP having a terminal pitch of 300 μm and 384 pins was connected by soldering.
The peeling strength of the copper foil was normal, and after being heated at 180 ° C. for 48 hours and immersed in hydrochloric acid having a concentration of 18% at room temperature for 1 hour, peeling was impossible. The case where the silane coupling agent of Example 1 is replaced with an aluminum coupling agent will be described. (Example 3) The aluminum-based coupling agent (Ajinomoto, Plenact A1-M) used was a 1% methanol solution, and a printed wiring board was prepared in the same manner as in Example 1 to obtain a QFP having a terminal pitch of 300 μm and 384 pins. Connected with solder. The peeling strength of the copper foil was normal, and after being heated at 180 ° C. for 48 hours and immersed in hydrochloric acid having a concentration of 18% at room temperature for 1 hour, peeling was impossible.

A fourth embodiment (Example 4) of the present invention in which a paper base phenol resin is used as a laminated base material in the semiconductor device using the QFP of FIG. 1 will be described. The semiconductor chip 1 is QFP (electrode terminal pitch 65) which is sealed and protected together with the lead frame 8 by the epoxy resin molded product 2.
0 μm, 232 pins). The electrode terminal 3 is also referred to as a lead and extends outside the molded product 2. A printed wiring board 4 (thickness: 1.6 mm), a paper base material phenol resin 5 (manufactured by Hitachi Chemical Co., Ltd., product number 437F), which is a laminated base material constituting the printed wiring board 4, and an electrolytic copper foil 6, which does not contain roughened fine particles, An adhesive base layer 15 having a thickness of 50 μm in the middle. (Ethylene butenediene terpolymer ... Mitsui Petrochemical Industry Co., Part No. K-9720
... 35 parts by weight, hydrous silica ... manufactured by Nippon Silica Industry, product number V
N-3 ... 10 parts by weight, t-butylperoxyhexyne ...
Perfexin, manufactured by NOF CORPORATION ... 1 part by weight is uniformly kneaded and processed into a film having a thickness of 50 .mu.m.) Semiconductor electrode terminals 3 are connected with terminals 6 of a printed wiring board 4 by solder 7 to form a semiconductor device. The copper foil having no roughened fine particles was an electrolytic copper foil having a thickness of 35 μm, and the adhesive surface was subjected to a chromate treatment having a thickness of 0.3 μm. (2.2 g of sodium dichromate hydrate was dissolved in 1 liter of pure water to prepare a treatment solution with the adhesive surface of the copper foil facing the anode at a current density of 0.15 A / dm ² for 4 seconds at room temperature. It was electrolyzed.)
On top of that, a silane-based coupling agent (S manufactured by Chisso Petrochemical Co., Ltd.
-Used by dissolving 330,1 g in 1 liter of water)
Was dipped for 10 seconds, applied, and dried at 60 ° C. for 1 minute. The printed wiring board 4 could be processed into an electronic circuit having a wiring pitch of 100 μm. In the conventional printed wiring board using the roughened copper foil, the electronic circuit having a wiring pitch of 300 μm was at the limit level for practical use. Therefore, the area of the electronic circuit could be reduced by about 20%. The peel strength of copper foil is normal 3.
After heating at 6 kN / m and 180 ° C. for 48 hours, it was 1.8 kN / m. It was 3.2 kN / m after immersion in hydrochloric acid having a concentration of 18% at room temperature for 1 hour. For conventional copper clad laminates,
2.1kN / m, 1.6kN / m, 1.9kN respectively
Was / m. Also in this case, the semiconductor device has a seven-layer structure. A case where the adhesive base material layer of Example 4 is replaced with a vinyl ester resin will be described as a fifth example (Example 5). The adhesive base material used was vinyl butyral (made by Denka,
70 parts by weight of the product number 6000C, 30 parts by weight of epoxy acrylate (product number Mitsubishi Rayon, product number UK6105), 0.5 parts by weight of a peroxide curing catalyst (made by NOF CORPORATION, perbutyl P) of 500 parts by weight of a solvent (500 parts by weight of MEK and 500 parts of toluene). Mixture), and this was coated and dried on a copper foil coated and dried with the silane coupling agent used in Example 4 using a roll coater so that the thickness after drying was 30 μm. . Drying was performed at 90 ° C. for a sufficient period of time. The copper foil with the adhesive base material and the paper base material phenol resin (manufactured by Hitachi Chemical Co., Ltd., product number 437F) are laminated and adhered to have a thickness of 1.
A 6 mm copper clad laminate was produced. Using this copper-clad laminate, a printed wiring board having a wiring pitch of 100 μm was obtained in the same manner as in Example 4, and the QFP used in Example 4 was connected to this by soldering. Copper foil peeling strength is 3.9k in normal condition
N / m, 2.1 kN / m after heating at 180 ° C. for 48 hours, and 3.5 kN / m after being immersed in hydrochloric acid having a concentration of 18% for 1 hour at room temperature. The layer structure in this case is a seven-layer semiconductor device. .
The epoxy acrylate of Example 5 was replaced with (Example 6) urethane acrylate (manufactured by Toa Gosei, product number M-1100) (Example 7) polyester acrylate and (Toa Gosei, product number M-6400), and the wiring pitch was 100 μm. It was possible to manufacture a semiconductor device connected to the electronic circuit of.
The peel strength of the copper foil was 3.5 kN / m, 1.9 kN / m in Example 6 after being heated at 180 ° C. for 48 hours and immersed in hydrochloric acid having a concentration of 18% at room temperature for 1 hour. 2.9k
N / m In Example 7, 2.3 kN / m, 1.5 kN / m,
It was 2.1 kN / m.

FIG. 2 shows an eighth embodiment of the present invention (eighth embodiment).
Now, an example of a semiconductor connection method called BGA will be described. The semiconductor chip 1 is connected to the terminals 6 on the printed wiring board 4a (thickness 0.6 mm) by gold bonding wires 9. In this state, the epoxy resin 2 seals and protects. The semiconductor chip 1 has a heat dissipation plate 10 placed on the back surface to dissipate heat. The printed wiring board 4a uses a glass fiber cloth base material BT resin (manufactured by Mitsubishi Chemical Industries, product number ... CCL-H810 as a base material) as a base material for lamination, in addition to the terminals 6 connected to the semiconductor chip 1. It has a terminal 11 for connecting to the outside, and terminals 6 and 11
Are connected by circuits designed to suit their intended use. An electronic circuit equipped with this semiconductor device is connected to another electronic circuit. The electronic circuit has terminals 11 formed on the printed wiring board 4b.
Are connected by solder balls 12 above. The present invention requires that the terminal 6 is a copper foil free from roughening particles. The copper foil has a thickness of 18 μm, and its adhesive substrate layer surface is dipped in a solution of 5 g of a thiol coupling agent (manufactured by Sankyo Kasei, trade name DISNET-F) in 1 liter of tetrahydrofuran for 60 seconds at room temperature, It has been dried at 90 ° C. for 1 minute. The adhesive base material is 100 parts by weight of a glycidyl ethylene methacrylate copolymer (Nippon Petrochemical Co., Lexvar RA3050) and 2 parts by weight of a peroxide curing catalyst (Nippon Oil & Fat Co., Perbutyl P) at 120 ° C.
The film was uniformly mixed with a kneader heated to 1, then rolled with a roll at 120 ° C. to obtain a film having a thickness of 50 μm, which was used. The wiring pitch of the printed wiring board 4a is 150 μm,
The three-layer circuit was compatible with the BGA of 625 pins. A conventional printed wiring board using a roughened copper foil requires a wiring board having a wiring pitch of 300 μm and a 6-layer circuit. The peeling strength of the copper foil of the copper-clad laminate used here was 2.5 kN / each for normal state, after immersion in hydrochloric acid and after heating.
m, 2.3 kN / m, and 2.5 kN / m. In the case of the conventional copper-clad laminate, 0.5 kN / m, 0.
It was 2 kN / m and 0.2 kN / m. In this case, the semiconductor device has six layers. FIG. 3 illustrates the part of FIG. 2 according to the present invention. Semiconductor chip 1
The upper electrode terminal 3 is connected to the terminal 6 on the printed wiring board 4 by a gold bonding wire 9 by ultrasonic bonding. Reference numeral 13 is a die bonding for fixing the semiconductor chip 1. The terminal 6 is an electrolytic copper foil without roughening particles. The entire semiconductor device is protected and sealed with epoxy resin 2. FIG. 3 shows the semiconductor chip upside down with respect to FIG. It has a six-layer structure including a semiconductor-side terminal 3, a ponding wire 9, a terminal 6 on an electronic circuit (printed wiring board), a thiol-based coupling agent layer, an adhesive base material layer, and a laminated base material layer. The heat sink 10 is omitted.

FIG. 4 shows a ninth embodiment (Embodiment 9) of the present invention.
Then, the case of the TAB method is shown. The TAB has a function of connecting an electrode terminal of a semiconductor chip and a terminal of an external printed wiring board by a flexible printed wiring board. 14 is a TAB, 1 is a semiconductor chip, 4 is a printed wiring board, and 11 is a terminal on the printed wiring board. TAB
The terminals 6 of 14 are connected to the terminals 11 of the semiconductor chip 1 and the printed wiring board by the solder bumps 12,
A flat rolled copper foil with a thickness of 35μ, which does not contain roughened fine particles, was subjected to a chromate treatment with a thickness of 0.5μm on the adhesive surface (2.2 g of sodium dichromate hydrate was added to 1 liter of pure water. Dissolve and use this solution to direct the current density of 0.15 A / dm with the surface of the copper foil to be Cr-coated facing the anode.
² for 5 seconds the process) Then, 0.1% of silane coupling agent (Chisso Petrochemical Ltd. used was dried for one minute at S-330) to the dipped 60 ° C. 10 seconds. The laminated base material used was a polyimide film having a thickness of 75 μm (trade name: Upilex-S, manufactured by Ube Industries, Ltd.). The adhesive is 32 parts by weight of ethylene butene diene terpolymer (manufactured by Mitsui Petrochemical Co., Ltd .: product number K-9720), 8 parts by weight of hydrous silica (manufactured by Nippon Silica Industry, product number VN-3), triallyl isocyanurate (manufactured by Nippon Kasei, 0.32 parts by weight of TAIC) and 0.32 parts by weight of peroxide (manufactured by NOF CORPORATION, perbutyl P) were uniformly kneaded and then rolled at 120 ° C. to obtain a film having a thickness of 50 μm. The terminal width is 20 μm and the wiring pitch is 50 μm. A conventional printed wiring board using roughened copper foil has a limit of 100 μm pitch. The terminal 11 can also use the same copper foil as the terminal 6 which does not contain roughening particles. The peel strength of the copper foil of the copper-clad laminate used here was such that it could not be peeled under normal conditions, after immersion in hydrochloric acid, and after heating. In conventional copper-clad laminates, 1.2 kN / m and 1.1 kN / m, respectively.
m and 0.1 kN / m.

FIG. 5 shows a tenth embodiment (first embodiment) of the present invention.
0) shows the case of the flip chip method. A state in which each electrode terminal 3 of the semiconductor chip 1 is connected by solder bumps 12 to a terminal 6 of an electronic circuit formed on a printed wiring board 4 which is an electronic circuit, that is, a terminal made of copper foil in which roughened fine particles do not exist. Is shown. The printed wiring board 4 is an electrolytic copper foil with a thickness of 18 μm and the width of the terminals is 50 μm.
The glass fiber cloth base material BT resin having m, a wiring pitch of 100 μm and a thickness of 0.6 mm was used as a laminated base material (the coupling agent, the adhesive base material and the laminated base material were the same as in Example 8). A wiring pitch of 30 is used with the conventional roughened copper foil.
The limit was 0 μm.

[0025]

In the semiconductor device according to the present invention, since the terminals on the electronic circuit can be finely processed as compared with the conventional ones, it is possible to cope with higher integration and narrower pitch of the semiconductor integrated circuit element, and particularly, the dense lead lines around the terminals. The miniaturization of the device greatly contributes to the improvement of the mounting density. The number of layers of the multilayer circuit printed wiring board can be reduced, which contributes to downsizing and cost reduction of the entire electronic device.
Since the manufacturing process of the copper foil is shortened, the cost of the copper foil is reduced by about 30%, and it is not necessary to remove the copper, copper alloy and their oxide particles embedded in the adhesive base material layer. The etching time is also reduced by about 60%. In addition, the shape of the copper foil after the circuit processing becomes substantially rectangular, which reduces reflection of super high frequency electric signals, energy loss and noise generation, and improves transmission reliability. The surface of the adhesive base material after etching is also flattened, so that solder bridges between adjacent terminals in mounting connection by solder are reduced. Also, adhesion of dust and the like is reduced, and cleaning of chemicals such as etching solution and flux residue becomes easy. Further, since it is difficult to deposit roughening fine particles on the surface of the copper foil, it is possible to use the rolled copper foil and the electrolytic copper foil which have not been used so much, and it becomes easy to use the high strength copper foil. In addition to semiconductor integrated circuits, electronic parts include resistors, capacitors,
Although there are various coils and the like, the number of terminals is smaller than that of the semiconductor integrated circuit element and the wiring pitch may be 500 μm or more. INDUSTRIAL APPLICABILITY The present invention provides a semiconductor device which is particularly effective in achieving high integration of semiconductor integrated circuits, narrowing the pitch of terminals, and increasing the number of pins, and which is sufficiently compatible with ultra-multipin semiconductor integrated circuits and semiconductor integrated circuit packages to be developed in the future. As a semiconductor device that uses a subtracted printed wiring board manufactured by etching, it has high adhesion performance and enables fine circuit processing, and its cost can be reduced compared to the past. It is the ultimate semiconductor device that can utilize existing manufacturing equipment as it is.
Also, the adhesive base material layer had almost no room for selection in the conventional copper-clad laminate, but since the selection range is greatly expanded, it is possible to make an appropriate selection depending on the purpose, application, price and required performance of the semiconductor device. Becomes

[Brief description of drawings]

FIG. 1 is an explanatory diagram of a semiconductor device in which a lead frame of a QFP and a terminal on an electronic circuit using a copper foil in which roughening particles are not present are connected.

FIG. 2 is an explanatory diagram of a connection structure of a semiconductor device in the BGA method.

FIG. 3 is an explanatory diagram of a connecting portion in FIG.

FIG. 4 is an explanatory view of a connection structure of a semiconductor device in a TAB method.

FIG. 5 is an explanatory view of a connection structure of a semiconductor device in a flip chip method.

FIG. 6 is an explanatory view of a cross-sectional shape of a terminal on an electronic circuit of the present invention and its surroundings.

FIG. 7 is an explanatory view of a cross-sectional shape of a terminal on a conventional electronic circuit and its surroundings.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Semiconductor chip 2 ... Epoxy resin molded product 3 ... Electrode terminal on the semiconductor side 4 ... Printed wiring board, and in the case of a plurality, it was distinguished from 4a and 4b. 5 ... Laminated substrate 6 ... Terminal on electronic circuit made of copper, copper alloy and copper oxide and their oxides without roughening fine particles 7 ... Solder 8 ... Lead frame 9 ... Bonding wire 10 ... Heat dissipation Board 11 ... External connection terminal on printed wiring board 12 ... Solder balls or solder bumps 13 ... Die bonding 14 ... TAB 15 ... Adhesive base material layer 16 ... Protective film (etching resist) 17 ... Electrons made of roughened copper foil Terminals on the circuit

Claims (8)

[Claims] 1. A plurality of signal system terminals of a semiconductor integrated circuit device,
Ground terminals and power terminals, or multiple signal terminals, ground terminals and power terminals of a semiconductor integrated circuit device package are connected to terminals on an electronic circuit via bonding wires, solder, or anisotropic conductive adhesive film. In the semiconductor device according to, the terminal of the electronic circuit is formed of at least copper foil, which is made of copper, copper alloys, and oxides thereof and does not contain roughened fine particles. 2. The copper foil according to claim 1, wherein B, Al, P, Zn, Ti, V, is formed on the surface opposite to the connection surface with the semiconductor integrated circuit.
Cr, Mn, Fe, Co, Ni, Ag, In, Zr, S
n, Nb, Mo, Ru, Rh, Pd, Pb, Ta, W,
The semiconductor device according to claim 1, further comprising a coating layer made of one or more metal, alloy, oxide, hydroxide and hydrate containing one or more elements selected from Ir and Pt. 3. The copper foil according to claim 2, wherein the copper foil is provided on the coating layer.
The semiconductor device according to claim 1, further comprising a silane coupling agent, a titanate coupling agent, a thiol coupling agent, or an aluminum coupling agent layer. 4. The semiconductor device according to claim 1, wherein the copper foil according to claim 1 has a thiol-based coupling agent layer on the surface opposite to the connection surface with the semiconductor integrated circuit. 5. A copper foil having a coupling agent layer according to claim 3, which has a tensile strength of 50 kg / cm ² or more and an elongation of 1
% Of high strength and high elongation and capable of generating radicals capable of chemically bonding to the coupling agent according to claim 3, or an adhesive containing a synthetic resin having a double bond or an epoxy group as a main component. The semiconductor device according to claim 1, wherein the semiconductor device has a connection layer configuration of at least seven layers or more forming a laminated body with a laminated base material via a base material layer. 6. A copper foil having a coupling agent layer according to claim 4, which has a tensile strength of 50 kg / cm ² or more and an elongation of 1
% Of high strength and high elongation and capable of generating radicals capable of chemically bonding with the coupling agent according to claim 4, or an adhesive containing a synthetic resin having a double bond or an epoxy group as a main component. The semiconductor device according to claim 1, wherein the semiconductor device has a connection layer configuration of at least six layers or more forming a laminated body with a laminated base material via a base material layer. 7. The semiconductor device according to claim 1, wherein the adhesive base material layer according to claim 5 contains a synthetic resin which is hardened by a peroxide as a main component. 8. The semiconductor device according to claim 1, wherein the adhesive base material layer according to claim 6 is mainly composed of a synthetic resin which is hardened by a peroxide.