JPH0974152A - Semiconductor device - Google Patents

Abstract

(57) Abstract: To prevent deterioration of transmission characteristics of a wide band semiconductor device. SOLUTION: Signal wiring patterns 10a and 10b are provided on the upper surfaces (opposite surfaces) of dielectric substrates 9a and 9b, respectively, extending halfway through oblique cut surfaces _9a1 and _9b1 . The metal block 13a is sandwiched so as to sandwich the dielectric substrate 9a.
Place. The metal blocks 13b are arranged so as to sandwich the dielectric substrate 9b. One end of the signal conductive lead 12 is used as the signal electrode pad 11 of the semiconductor element 5, and the other end of the signal conductive lead 12 is used as the wiring pattern 10a of the dielectric substrate 9a.
And connected between the wiring pattern 10b of the dielectric substrate 9b, the dielectric substrate 9a of the oblique cut surface 9 _a1 on the wiring pattern 10a 'and the dielectric substrate 9b of the oblique cut surface 9 _b1 on the wiring pattern 10b' Center conductor 7 of coaxial connector 2
And the tip end of are bonded via the bonding material 19.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a high frequency mounting technique for a semiconductor device mounted with a high frequency IC used in the field of optical / telecommunication.

[0002]

2. Description of the Related Art FIG. 7 shows the configuration of a conventional semiconductor device equipped with a high frequency IC and the like. 7 (a) is a partially cutaway plan view thereof, and FIG. 7 (b) is a sectional view taken along line I-I in FIG. 7 (a). In this semiconductor device, as many coaxial connectors 2 as the number corresponding to the input / output signal terminals are attached to the metallic envelope 3 (two in this example), and a bonding material such as a gold tin brazing material is provided in the recess 17 of the metal substrate 4. The semiconductor element 5 is adhered by 18. An insulating substrate 28 is bonded to the convex surface of the metal substrate 4 in the same manner as the semiconductor element 5.

On the upper surface of the insulating substrate 28, a signal wiring pattern 29 made of a thin film (for example, NiCr / Au, Ti / Au, etc.) or a thick film (W / Ni / Au, etc.).
And ground wiring patterns 30a and 30b are formed,
The coplanar line 34 is configured. Between the signal electrode pad 11 and the signal wiring pattern 29 of the semiconductor element 5, and between the ground electrode pad 14 and the ground wiring pattern 30.
Bonding wires 31 are provided between a and 30b, respectively.
(25 μmφ to 30 μmφ gold wire or the like). Further, a bonding material 3 such as tin-lead solder or silver paste is provided between the central conductor 7 of the coaxial connector 2 and the signal wiring pattern 29.
2 are electrically connected. The cap 33 is bonded to the upper surface of the envelope 3 by using the above-mentioned bonding material or by the seam weld method. In the figure, details of the coaxial connector 2 are omitted.

In this semiconductor device, the input signal enters the coaxial connector 2 (2-1) and enters the coplanar line 34.
(Signal wiring pattern 29 and ground wiring pattern 3
It is transmitted to the semiconductor element 5 via the bonding wire 31 (31a) and the transmission line composed of 0a and 30b. Then, in the semiconductor element 5, signal conversion such as amplification /
After being processed, through the bonding wire 31 (31b) and the coplanar line 34, the coaxial connector 2 (2-
2) is output.

[0005]

However, in such a conventional semiconductor device, the bonding wire 31a is used.
Ripple and resonance may occur in the operating frequency band of the semiconductor element 5 due to the inductance and parasitic capacitance of 31b and the unwanted electromagnetic wave mode (mode handled by the microstrip line) generated in the conversion portion of the coplanar line 34 and the center conductor 7 of the coaxial connector 2. It was easy to occur. Therefore, the transmission characteristics of the semiconductor device will be significantly deteriorated.
In particular, it was difficult to put it to practical use over a wide band of several tens GHz or more.

Further, instead of the coaxial connector 2, a lead terminal of a ceramic feedthrough or a glass terminal made of a glass insulated KOVAR material lead is used for power supply. Since a bonding wire or the like is used to connect the electrode pad (not shown) to the terminal, its inductance often makes the operation of the semiconductor element 5 unstable.

The present invention has been made to solve such a problem, and its first object is to provide a wide band (several tens of GH).
It is to provide a semiconductor device that can be mounted without deteriorating the transmission characteristics of the semiconductor element of z or more). A second object of the invention is to provide a semiconductor device capable of stabilizing the operation of a wide band (several tens GHz or more) semiconductor element.

[0008]

In order to achieve such an object, the first invention (the invention according to claim 1) is a semiconductor device in an envelope (3) provided with a coaxial connector (2). in the semiconductor device mounted with a (5), it has an oblique cut surface (9 _a1), a first insulating its oblique cut surface from the upper surface (9 _a1) elongation partway wiring pattern (10a) is formed The substrate (9a) and the first insulating substrate (9
The envelope (3) is arranged on both sides so that it sandwiches a).
A first conductive block (13a) electrically connected to
And a wiring pattern (10 _b that has a diagonal cut surface (9 _b1 ), and extends from the upper surface to the middle of the diagonal cut surface (9 _b1 ).
b) is formed on both sides of the second insulating substrate (9b) on which the second insulating substrate (9b) is sandwiched, and is electrically connected to the envelope (3). A second conductive block (13b), one end of which is the ground electrode pad (14) of the semiconductor element (5), and the other end is the first conductive block (13a) and the second conductive block (13b). 13b)
A first conductive lead (15) connected between the first conductive lead (15) and a signal electrode pad (11) of the semiconductor element (5)
In addition, the other end is connected between the wiring pattern (10a) on the upper surface of the first insulating substrate (9a) and the wiring pattern (10b) on the upper surface of the second insulating substrate (9b). A conductive lead (12) and a first insulating substrate (9
a) The wiring pattern (10) on the diagonal cut surface (9 _a1 )
a ') and a second insulating oblique cut surface of the substrate (9b) (9 _b1) on the wiring pattern (10b' electrically joining the front end portion of the center conductor (7)) and the coaxial connector (2) It is something that is done.

According to the present invention, the tip end of the central conductor (7) of the coaxial connector (2) has the wiring pattern (10) on the oblique cut surface (9 _a1 , 9 _b1 ) of the insulating substrate (9 a, 9 _b ).
a ', 10b'), the wiring pattern (10
It is connected to the signal electrode pad (11) of the semiconductor element (5) via the conductive lead (12) sandwiched between a and 10b). The insulating substrate (9a, 9b) has a structure surrounded by a conductor, and the conductive lead (12) part sandwiched by the insulating substrate (9a, 9b) has a pseudo coaxial structure (or a shielded strip line). ). That is, the signal propagates to the vicinity of the electrodes of the semiconductor element (5) in the coaxial TEM mode.

The second invention (the invention according to claim 2) is the first invention.
In the present invention, the dielectric (21) is provided on one end of the conductive lead (12, 15). According to the present invention, the characteristic impedance in the vicinity of the connection between the signal electrode pad (11) of the semiconductor element (5) and the conductive lead (12) can be adjusted by the thickness of the dielectric (21).

A third invention (the invention according to claim 3) is a semiconductor device in which a semiconductor element (5) is mounted in an envelope (3) for supplying power to a part of the envelope (3). Opening (2
3) is provided, and wiring patterns (24a, 24
b) is provided with a first insulating substrate (25a) and a second insulating substrate (25b), and conductive leads (2
One end of 6) is connected to the power supply electrode pad (27) of the semiconductor element (5), and the conductive lead (26) is connected to the first part in the middle.
Wiring pattern (24a) on the insulating substrate (25a) and wiring pattern (24 on the second insulating substrate (25b)
b), and the other end of the conductive lead (26) extends through the opening (23) to the outside of the envelope (3).

According to this invention, the conductive lead (26) connected to the power supply electrode pad (27) of the semiconductor element (5) is connected to the first insulating substrate (25a) and the second insulating substrate (25a). It is sandwiched between the substrate (25b) and goes out of the envelope (3). In the lead part sandwiched between the insulating substrates (25a, 25b), the envelope (3) and the insulating substrates (25a, 25b)
A parallel plate capacitance is formed between the wiring patterns (24a, 24b) and the signal leaked to the power supply side is short-circuited by this.

The fourth invention (the invention according to claim 4) is the third invention.
In the invention, an elastic body (is provided between the first insulating substrate (25a) and the wiring pattern (24a) on the upper surface thereof and between the second insulating substrate (25b) and the wiring pattern (24b) on the upper surface thereof. 27a, 27b) are arranged. According to this invention, the first insulating substrate (25) is formed in the middle of the conductive lead (26) through the elastic body (27a, 27b).
It is sandwiched between a) and the second insulating substrate (25b).

[0014]

BEST MODE FOR CARRYING OUT THE INVENTION Hereinafter, the present invention will be described in detail based on embodiments. [Embodiment 1: First Invention] FIG. 1 shows a first embodiment of the present invention. FIG. 1 (a) is a partially cutaway plan view thereof, and FIG. 1 (b) is II-II in FIG. 1 (a). It is a line sectional view (partially fractured side sectional view). 2A is a sectional view taken along the line III-III in FIG. 1A, and FIG.
It is the IV-IV sectional view taken on the line in (a).

In this semiconductor device 1, as shown in FIGS. 1A and 1B, metal such as KOVAR or metallized ceramic provided on the bottom of the envelope 3 to which the coaxial connector 2 is attached. Made of metal substrate 4
The semiconductor element 5 is mounted on the a via the bonding material 18, and the oblique cut surfaces 9 _a1 and 9 are formed between the semiconductor element 5 and the central conductor 7 of the coaxial connector 2 penetrating through the opening 6 of the envelope 3. _b1
Dielectric substrates (insulating substrates) 9a and 9b such as ceramics and Teflon having are arranged substantially vertically symmetrically.

Signal wiring patterns 10a and 10b are provided on the upper surfaces (opposing surfaces) of the dielectric substrates 9a and 9b so as to extend halfway along the oblique cut surfaces _9a1 and _9b1 , respectively. Then, the tip portion of the central conductor 7 of the coaxial connector 2 is connected to the signal wiring pattern 10 of the oblique cut surfaces 9 _a1 and 9 _b1.
a'and 10b 'are connected via a bonding material 19, and one end of the signal conductive lead 12 made of gold or the like is connected to the semiconductor element 5
Is connected to the signal electrode pad 11, and the other end of the signal conductive lead 12 is arranged and connected between the signal wiring patterns 10a and 10b.

Further, as shown in FIG. 2 (a), a cobal (K) is formed on both sides of each of the dielectric substrates 9a and 9b.
Metal blocks 13a and 13b plated with gold on an (OVAR) material are provided, and the metal blocks 13a and 13b are arranged so as to be substantially vertically symmetrical. The other end of the grounding conductive lead 15 whose one end is connected to the grounding electrode pad 14 of the semiconductor element 5 is arranged between the metal blocks 13a and 13b. A metal substrate 4b is arranged on the upper surface of the envelope 3. Therefore, the dielectric substrates 9a and 9b sandwiching the signal conductive lead 12 are located between the metal blocks 13a and 13b and the upper and lower metal substrates 4a.
And a structure surrounded by 4b.

Further, as shown in FIG. 2 (b), also in the central conductor 7 and the dielectric substrate 9a and 9b of the diagonal cut surfaces 9 _a1 and 9 _b1 on the signal wiring pattern 10a 'and 10b' portion, Similar to the above description, a pseudo-coaxial structure surrounded by metal blocks 13a and 13b and metal substrates 4a and 4b on all sides is formed. Therefore, the coaxial connector 2
Is transmitted to the semiconductor element 5 via this pseudo-coaxial structure converter, and the disturbance of the TEM propagation mode from the coaxial connector 2 to the vicinity of the semiconductor element 5 can be reduced. It is possible to reduce and improve the reflection at the discontinuous portion.

The assembly of this semiconductor device 1 is shown in FIG.
(B), the first oblique cut surface 9 dielectric having _a1 substrate 9a and the metal block 13a (not shown) low for both ends of the protrusion surface of the metal substrate 4a member 16 (e.g., silver rows or gold-tin A eutectic alloy or the like) is melted and connected, and the semiconductor element 5 is melted and connected to the central recess 17 with a brazing material 18 (for example, a gold-tin eutectic alloy or a tin-lead solder) having a melting temperature similar to or lower than the above-mentioned melting temperature. And the like), and then the signal electrode pad 11 of the semiconductor element 5 and the signal wiring pattern 10a.
The conductive leads 12 for signals are connected between and by a thermocompression bonding method, a thermosonic method, or the like. Similarly, the grounding electrode pad 14 and the metal block 13a are connected by a grounding conductive lead 15 (not shown). The signal wiring pattern 10a on the dielectric substrate 9a is formed by NiCr-Au or Ti-Au formed by vapor deposition, plating or etching.
And so on.

Meanwhile, as shown in FIG. 3 (a), the dielectric substrate 9b and the metal block 13 with an oblique cut surface 9 _b1
A metal substrate 4b in which b (not shown) is connected using a brazing material (for example, silver brazing or gold-tin eutectic alloy) 16 is prepared. Coaxial connector 2 attached by means such as screwing
The metal substrate 4b is brazed or laser-welded to the upper surface of the envelope 3 having the above. At that time, previously coated with a bonding material 19 such as Ag paste is formed between the center conductor 7 and the dielectric oblique cut surface 9 _b1 on the signal wiring pattern 10b of the substrate 9b '.

[0021] accordingly then being applied signaling conductive leads 12 and the dielectric signal wiring on the board 9b pattern 10b and a dielectric signal wiring pattern 10a on the obliquely cut surface 9 _a1 of the substrate 9a 'and the center conductor 7 The metal substrate 4a is inserted into the envelope 3 so as to be connected to the respective bonding materials 19, and the bonding material 19 is heated and solidified, and then integrated by laser welding or the like to seal the semiconductor element 5. Then, the semiconductor device 1 is completed. Although the metal block 13a (13b) and the metal substrate 4a (4b) are separated in the above description, the metal block 13a (13b) and the metal substrate 4a (4b) may be integrated. It goes without saying that such a structure also falls within the scope of the present invention.

[Second Embodiment: Second Invention] FIG. 4 is a partially cutaway side sectional view showing a second embodiment of the present invention. In the second embodiment, the metal block 22 in which the dielectric substrate 21 is provided on the convex portion 20 is arranged between the semiconductor element 5 and the metal substrate 4b, and the dielectric substrate 21 is connected to the semiconductor element 5 for signal conductivity. The first embodiment is different from the first embodiment in that the structure is located above the conductive lead 12 and the grounding conductive lead 15 (not shown).

In this structure, the signal t is changed by the thickness t of the dielectric substrate 21 above the signal conductive lead 12, that is, the height t to the convex portion 20 of the metal block 22 serving as the upper ground portion. It has a feature that the characteristic impedance of the conductive lead portion 12 can be adjusted. In addition,
Even if the metal block 22 is integrated with the metal substrate 4b,
When the dielectric substrate 21 is not provided, that is, the relative permittivity is 1
Even in the case of (air), the effect is the same, and it goes without saying that it is within the scope of the present invention.

[Third Embodiment: Third Invention] FIGS. 5A and 5B show a third embodiment of the semiconductor device. FIG. 5A is a plan view and FIG. 5B is a VV line in FIG. It is a line sectional view.
In FIG. 5, the envelope 3 having the opening 23, the insulating substrate 2 having the semiconductor element 5 and the wiring pattern 24a.
5a, a metal substrate 4a, an insulating substrate 25b having a wiring pattern 24b, and a power supply conductive lead 26. In the third embodiment, one end of the power supply conductive lead 26 is connected to the power supply electrode pad 27 of the semiconductor element 5, and the middle of the power supply conductive lead 26 is wired to each of the insulating substrates 25a and 25b. Patterns 24a and 24b
The other end of the conductive lead 26 for power supply is configured to pass through the opening 23 and to be output to the outside of the envelope 3.

In this semiconductor device, the conductive leads 26 for supplying power are capacitively coupled in parallel to the metal substrates 4a and 4b serving as grounding portions via the insulating substrates 25a and 25b, and this capacitance causes the power source to be supplied. A signal from the supply electrode pad 27 (a signal leaking to the power supply side) can be short-circuited. Further, since the conductive lead 26 for power supply is pressed and fixed by the insulating substrates 25a and 25b, the electrode pad 27 for power supply of the semiconductor element 5 from the other end of the conductive lead 26 for power supply is fixed. It is also effective in relieving the stress on the connection part.

[Fourth Embodiment: Fourth Invention] FIG. 6 is a side sectional view showing a fourth embodiment of the present invention. Embodiment 4
Differs from the third embodiment in that elastic bodies 27a and 27b are arranged between the insulating substrate 25a and the wiring pattern 24a and between the insulating substrate 25b and the wiring pattern 24b. With this structure, it is possible to relieve the stress on the conductive lead 26 for power supply due to the deviation of the thickness processing accuracy of the insulating substrates 25a and 25b.

[0027]

As is apparent from the above description, according to the present invention, in the first invention, the tip end portion of the center conductor of the coaxial connector is connected to the wiring pattern on the oblique cut surface of the insulating substrate. It will be connected to the signal electrode pad of the semiconductor element via the conductive lead sandwiched by the wiring pattern, and the conductive lead portion sandwiched by the insulating substrate will have a pseudo coaxial structure (or shielded strip). Track). As a result, the signal propagates to the vicinity of the electrode of the semiconductor element in the coaxial TEM mode, and the disturbance of the TEM propagation mode in the pseudo coaxial structure can be reduced,
It becomes possible to reduce the reflection and the like at the discontinuous portion in the conventional structure, and to mount the semiconductor device in a wide band (several tens GHz or more) without deteriorating the transmission characteristics. In the second invention, in the first invention, the characteristic impedance in the vicinity of the connecting portion between the signal electrode pad of the semiconductor element and the conductive lead can be adjusted by the thickness of the dielectric, and the reflection characteristic is improved due to the discontinuity at the connecting portion. Can be achieved.

In the third aspect of the invention, the conductive lead connected to the power supply electrode pad of the semiconductor element is sandwiched between the first insulating substrate and the second insulating substrate and is exposed to the outside of the envelope. , In the lead part sandwiched by the insulating substrate, a parallel plate capacitance is formed between the envelope and the wiring pattern of the insulating substrate, and the signal leaked to the power supply side is short-circuited by this.
It is possible to stabilize the operation of a wide band (several tens GHz or more) semiconductor element. According to a fourth aspect of the invention, in the third aspect of the invention, the middle of the conductive lead is sandwiched between the first insulating substrate and the second insulating substrate via the elastic body, and the thickness processing accuracy of the insulating substrate is improved. It is possible to relieve the stress on the conductive leads for power supply due to the deviation of

[Brief description of drawings]

FIG. 1 is a partially cutaway plan view and a partially cutaway side sectional view for explaining a first embodiment of the present invention.

FIG. 2 is a sectional view taken along line III-III and a sectional view taken along line IV-IV in FIG.

FIG. 3 is a diagram for explaining a method of assembling the semiconductor device shown in FIG.

FIG. 4 is a partially cutaway side sectional view for explaining a second embodiment of the present invention.

5A and 5B are a plan view and a side sectional view for explaining a third embodiment of the present invention.

FIG. 6 is a side sectional view for explaining a fourth embodiment of the present invention.

FIG. 7 is a partially cutaway plan view and a side sectional view showing a configuration of a conventional semiconductor device.

[Explanation of symbols]

1 ... Semiconductor device, 2 ... Coaxial connector, 3 ... Envelope, 4
a, 4b ... Metal substrate, 5 ... Semiconductor element, 7 ... Central conductor,
9a, 9b ... Dielectric substrate, _9a1 , _9b1 ... Diagonal cut surface,
10a, 10b, 10a ', 10b' ... Signal wiring pattern, 11 ... Signal electrode pad, 12 ... Signal conductive lead, 13a, 13b ... Metal block, 14 ... Grounding electrode pad, 15 ... Grounding conductive Lead, 21 ... Dielectric substrate, 22 ... Metal block, 23 ... Opening, 24a, 2
4b ... Wiring pattern, 25a, 25b ... Insulating substrate, 2
6 ... Conductive leads for power supply, 27 ... Electrode pads for power supply, 27a, 27b ... Elastic body.

Claims (4)

[Claims] 1. A semiconductor device in which a semiconductor element is mounted in an envelope provided with a coaxial connector, wherein a wiring pattern is formed which has an oblique cut surface and extends from the upper surface to a midpoint of the oblique cut surface. An insulating substrate, first conductive blocks arranged on both sides of the first insulating substrate so as to sandwich the first insulating substrate, and electrically connected to the envelope, and an oblique cut surface. A second insulating substrate on which a wiring pattern extending from the upper surface thereof to the middle of the diagonal cut surface is formed, and arranged on both sides of the second insulating substrate so as to sandwich the second insulating substrate, and the envelope. A second conductive block electrically connected, one end of which is connected to the ground electrode pad of the semiconductor element, and the other end of which is connected between the first conductive block and the second conductive block. A first conductive lead that has been One end of which is connected to the signal electrode pad of the semiconductor element, and the other end of which is connected between the wiring pattern on the upper surface of the first insulating substrate and the wiring pattern on the upper surface of the second insulating substrate. And a wiring pattern on the diagonal cut surface of the first insulating substrate, a wiring pattern on the diagonal cut surface of the second insulating substrate, and a tip portion of the central conductor of the coaxial connector. A semiconductor device characterized in that the are electrically connected to each other. 2. The semiconductor device according to claim 1, wherein a dielectric is provided above one end of the conductive lead. 3. A semiconductor device in which a semiconductor element is mounted in an envelope, wherein a first opening is provided in a part of the envelope, and a wiring pattern is formed on an upper surface of the opening. An insulating substrate and a second insulating substrate, one end of which is connected to a power supply electrode pad of the semiconductor element, and a wiring pattern on the first insulating substrate and the second insulating substrate A semiconductor device, comprising: a conductive lead located between the upper wiring pattern and the other end, the other end passing through the opening and extending to the outside of the envelope. 4. The elastic body according to claim 3, wherein an elastic body is arranged between the first insulating substrate and a wiring pattern on its upper surface and between the second insulating substrate and a wiring pattern on its upper surface. A semiconductor device characterized by: