JPH098030A - Method for manufacturing silicon oxide film - Google Patents

Abstract

(57) [Summary] [Object] The present invention is capable of retaining the step filling ability with an aspect ratio of about 4 and improving the global flattening ability, and thus corresponds to the manufacture of a so-called 0.25 μm generation semiconductor device. It is possible. A silicon-based film formed by liquefying the source gas gas on the substrate surface (the surface of the protective film 13 in the drawing) by a chemical vapor deposition method using a source gas containing at least monosilane or polysilane and alcohol. An oxide film (insulating film 14) is manufactured. Alternatively, a raw material gas containing at least monosilane or polysilane and a gas exhibiting acidity in an aqueous solution may be used.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of mainly forming an interlayer insulating film as an insulating film of a semiconductor device, and more particularly to a method of manufacturing a silicon oxide film.

[0002]

2. Description of the Related Art As semiconductor devices are miniaturized, wiring widths are becoming narrower and wiring intervals are becoming narrower. Along with this, improvement of the so-called gap fill capability of the interlayer insulating film has been demanded.

Conventionally, the source gas is monosilane (Si
By changing from H ₄ ) to tetraethoxysilane (TEOS), its gap fill ability has been improved. In the following description, monosilane will be referred to as SiH ₄ and tetraethoxysilane will be referred to as TEOS. TEOS is less reactive than SiH ₄ and does not easily form a film even if it is adsorbed on the substrate. Moreover, since it moves around the substrate surface, it has excellent step coverage characteristics. Initially, with emphasis on the film quality, the insulating film made of silicon oxide was formed by dissociating the source gas by the chemical vapor deposition method using plasma. Hereinafter, chemical vapor deposition is referred to as CVD. CVD is Chemical Vapor Deposition
Stands for.

In the recent manufacture of a semiconductor device having a rule of 0.35 μm, TEOS gas and ozone (O ₃ ) gas are used to dissociate the raw material gas and form an insulating film made of silicon oxide. By using O ₃ gas, it is possible to increase the pressure during CVD to about atmospheric pressure (hereinafter referred to as AP-CVD method). As a result, the amount of supply of the source gas to the substrate surface is increased, and the distance over which the substrate surface moves is extended to further improve the step coverage characteristics.

However, in the next generation semiconductor device manufacturing according to the 0.25 μm rule, the aspect ratio of the wiring is increasing to the extent that the step coverage is insufficient even by the AP-CVD method. This is because the wiring thickness is almost unchanged, but the wiring width is becoming narrower and the wiring spacing is becoming narrower.

[0006] Therefore, a film forming method attracting attention for the 0.25 μm generation is CVD using high density plasma.
Method (hereinafter referred to as HD-CVD method). This HD-
The CVD method is characterized in that both CVD and etching can be performed simultaneously. That is, in the case of filling a narrow wiring interval, in the conventional CVD method, the voids were left between the wirings, but in this method, the upper portion between the wirings called an overhang grows first. Since the shape is lost by sputter etching with ions, the embedding ability is enhanced. However, since sputter etching is used, there is a drawback that so-called particles are generated in principle.

On the other hand, recently, by lowering the boiling points of all the source gases and liquefying them on the surface of the substrate, the liquid is embedded between the narrow wirings.
APL (Advanced Planarization Layer) technology has been developed. This APL technology has a very large embedding ability because it is embedded by pouring a liquid.

[0008]

Regarding the embedding ability, the APL technique is very excellent as described in the above-mentioned conventional technique, but the so-called global leveling ability is not so good. Global planarization is to cover a step in a wide region with a film to planarize the surface of the film, and recently, it has been realized by chemical mechanical polishing (for example, chemical mechanical polishing, hereinafter referred to as CMP).
In particular, comprehensive planarization combining the above-described HD-CVD method and CMP has received attention.

The demand for global flattening comes from the reduction of the depth of focus due to the shortening of the exposure wavelength of lithography. In the 0.25 μm generation, I-line or argon fluoride (ArF) excimer laser light, fluorination is used. This is because the wiring and the like are patterned by exposure using a krypton (KrF) excimer laser beam or the like. Due to such a situation, the global flattening ability is required for the APL technology. Currently, flatness of about 80% is obtained when the wiring interval is 10 μm. However, CMP has a flatness of 80% even if the wiring interval is about 1 mm.
Considering that it has been obtained to some extent, the planarization in the APL technique is insufficient. At least a wiring interval of 50 μm and a flatness of about 80% are required. Here, the flatness is represented by d / H × 100, where H is the height of the wiring and d is the thickness of the thinnest portion of the insulating film.

It is an object of the present invention to provide a method for manufacturing a silicon oxide film which is excellent in global flattening ability while maintaining the filling characteristics of the APL technology.

[0011]

SUMMARY OF THE INVENTION The present invention is a method for manufacturing a silicon oxide film, which has been made to achieve the above object. That is, the first method is the production of a silicon-based oxide film in which the source gas is liquefied on the substrate surface by chemical vapor deposition using a source gas containing at least monosilane or polysilane and alcohol. Is the way.

The second method is a chemical vapor deposition method using a source gas containing at least monosilane or polysilane and a gas exhibiting an acidity in an aqueous solution, and liquefying the source gas on the surface of the substrate to form a film. This is a method for manufacturing a silicon oxide film.

[0013]

In the first method, since the raw material gas contains monosilane or polysilane and alcohol, the viscosity of the raw material gas liquefied on the substrate is lowered. That is, the alcohol increases the amount of the solvent, and thus the solidified component decreases. By thus adding the alcohol serving as a solvent, the attractive force between the constituent molecules is artificially reduced. Therefore, the liquefied source gas easily spreads over the entire substrate, and global flattening is achieved.

In the second method, since at least monosilane or polysilane and a gas exhibiting an acidity in an aqueous solution are used as the source gas, the pH when the source gas is liquefied on the substrate surface becomes low. Further, the raw material gas liquefied on the substrate is repeatedly polymerized according to the following reaction formulas (1) to (3) to form a film.

[0015]

Embedded image SiH ₄ + 2H ₂ O ₂ → Si (OH) ₄ + 2H ₂ ↑ (1)

[0016]

Embedded image Si (OH) ₄ + Si (OH) ₄ → (OH) ₃ SiOSi (OH) ₃ + H ₂ O (2)

[0017]

## STR3 ## _{(OH) 3 SiOSi (OH)} 3 + Si (OH) 4 → (OH) 3 SiOSiO (OH) 2 Si (OH) 3 + H 2 O ··· (3)

That is, the above-mentioned polymerization reaction causes a sol-gel reaction to occur on the surface of the substrate. Then, global flattening is promoted by slowing down the reaction rate of the above-mentioned polymerization reaction. For that purpose, the condition for advancing the reaction equilibrium in the opposite direction may be adopted. As described above, since gas that is acidic in an aqueous solution is used as one of the source gases, p
H becomes low. Then, particularly in the state of 2 <pH <7, the reaction rate can be reduced. Specifically, the above polymerization reaction is represented by the following reaction formulas (4) and (5).

[0019]

Embedded image ≡Si—OH + OH ⁻ → ≡Si—O ⁻ + H ₂ O (4)

[0020]

[Of 5] ^{≡Si-O - + HO-Si} → ≡Si-O - -Si≡ + OH - ··· (5)

The polymerization reaction proceeds according to the above reaction formula, but the reaction of the reaction formula (4) is difficult to proceed in the state where the pH is low and the OH ⁻ concentration is low. Therefore, since the polymerization reaction can be controlled by making it acidic, global flattening is achieved.

[0022]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS As a first embodiment of the present invention, a method of manufacturing a silicon oxide film according to the present invention and process steps before and after the method will be described together with reference to the manufacturing process chart of FIG. FIG. 1 is a cross-sectional view of a wiring structure formed by using the method for manufacturing a silicon-based oxide film of the present invention.

As shown in FIG. 1A, a plurality of wirings 12 are formed on the substrate 11 by a known wiring forming technique including a wiring material forming step, a lithography step, an etching step and the like. The substrate 11 has, for example, an element (not shown) formed on a semiconductor substrate and an insulating film (not shown) formed so as to cover the element. Subsequently, a protective film 13 was formed so as to cover each wiring 12. The protective film 13 protects the substrate 11 and the wiring 12 from water components and alcohol components generated when the silicon-based oxide film of the present invention formed on the upper surface side thereof is formed.
Thereby, for example, corrosion is prevented and the hot carrier resistance of the transistor is secured.

Next, an example of a method of manufacturing the protective film 13 will be described. As the raw material gas, for example, monosilane (SiH ₄ ) is used as a gas containing silicon atoms and, for example, oxygen (O ₂ ) is used as a gas containing oxygen atoms (O), and helium (He) is mixed as a diluting (carrier) gas. And introduced into a capacitively coupled plasma CVD apparatus (not shown). Then, high-frequency power was supplied between the electrodes of the plasma CVD apparatus, and the protective film 13 was formed to a thickness of 50 nm on the substrate 11 arranged in the plasma CVD apparatus. When forming the protective film 13, the degree of vacuum in the plasma CVD apparatus is, for example, 100 Pa, and the substrate 11 is, for example, 350.
It was heated to 0 ° C., and high frequency power of 13.56 MHz was applied at a density of 1.0 W / cm ² , for example.

Next, a silicon oxide film 14 was formed on the protective film 13 by the method of the present invention.

An example of the method of manufacturing the silicon oxide film 14 will be described. In the source gas, for example, monosilane (SiH ₄ ) as a gas containing silicon atoms, hydrogen peroxide (H ₂ O ₂ ) as an oxidant, and alcohol added gas (vaporized and introduced) such as ethyl alcohol (C ₂ H _2).
5 OH) was used as a mixture, and the raw material gas was introduced into a general low pressure CVD apparatus (not shown). The flow rate of the raw material gas is monosilane (SiH ₄ ): 50 sccm,
Hydrogen peroxide (H ₂ O ₂ ) was 200 sccm and ethyl alcohol (C ₂ H ₅ OH) was 25 sccm. Less than,
sccm represents the volumetric flow rate (cm ³ / min) in the standard state.

A diffusion plate (not shown) for diffusing the introduced gas is provided in the low pressure CVD apparatus.
Then, the diffusion plate was held at 100 ° C., for example, and the silicon oxide film 14 was formed to have a thickness of 800 nm, for example.
At the time of forming the silicon oxide film 14, the degree of vacuum in the low pressure CVD apparatus was set to 200 Pa, and the substrate 11 was cooled to 0 ° C.

In the silicon oxide film 14 thus formed, it was possible to form a step having an aspect ratio of 4 and a wiring interval of up to 50 μm in a substantially flat shape (flatness = 80%). Therefore, it was found that the above manufacturing method has excellent gap fill ability and global planarization ability. Hereinafter, the flatness is d / when the height of the wiring is H and the thickness of the thinnest part of the silicon oxide film is d.
H × 100.

Then, as shown in FIG. 1B, CVD is performed as an insulating film 15 on the upper surface of the silicon oxide film 14.
Method, a silicon oxide (SiO 2) having a thickness of 0.3 μm
₂ ) A film was formed. As the deposition method, there is a method other than the CVD method, for example, a sputtering method or a coating method.

Next, annealing is performed to remove the water in the silicon oxide film 14. In this annealing, for example, a commonly used furnace annealing furnace was used, and annealing was performed for 15 minutes in a nitrogen (N ₂ ) atmosphere of 400 ° C. as an inert atmosphere.

When a multilayer wiring is further formed, as shown in FIG. 2 which is a schematic sectional view, the protective film 13, the silicon oxide film 14 and the insulating film 15 described in FIG.
Then, the contact hole 16 is opened if necessary. Then, a conductive plug 17 is placed in the contact hole 16.
To form Next, the wiring 21 and the protective film 22 are formed on the insulating film 15 by the same method as described with reference to FIG. Then, the silicon oxide film 23 (corresponding to the silicon oxide film 14 in FIG. 1) is formed by the method of the present invention. Subsequently, the insulating film 24 is formed by a method similar to that described with reference to FIG. Thereafter, annealing is performed to remove the water content in the silicon oxide film 23. In this way, a multilayer wiring can be formed by repeating the process described in FIG.

In the first embodiment described above, the addition of alcohol reduces the viscosity of the liquefied source gas substance, which facilitates its flow.

Although monosilane (SiH ₄ ) is used as the gas containing silicon atoms in the first embodiment, disilane (Si ₂ H ₆ ) or trisilane (Si ₃ H ₈ ) may be used as the polysilane. It is possible. The introduction conditions at that time may be set in the same manner as in the case of monosilane (SiH ₄ ). In the above description, for example, ethyl alcohol (C ₂ H ₅ OH) was used as the alcohol-added gas, but as an alcohol represented by C _n H _{2n + 1} OH (n in the formula represents a natural number), for example, methyl is used. Alcohol (CH ₃ OH), Propyl alcohol (C ₃ H ₇ O
H), butyl alcohol (C ₄ H ₉ OH) and the like can also be used. The conditions at that time are the same as those for ethyl alcohol (C ₂ H ₅ OH). Hydrogen peroxide (H ₂ O ₂ ) was used as the oxidizing agent, but water (H ₂ O) was used.
Can also be used. However, hydrogen peroxide is preferable because H ₂ O is easily generated by the reaction.

Further, although the substrate temperature is set to 0 ° C.,
The substrate temperature may be set to a temperature at which at least one kind of raw material gas is liquefied. Therefore, the substrate temperature may be set to a temperature higher than the freezing point and lower than the boiling point of at least one of the source gases. Desirably, the gas containing silicon atoms is, for example, monosilane (SiH ₄ ) or disilane (Si
_{When 2} H ₆ ) is used, the upper limit is set to 50 ° C. or lower, and when trisilane (Si ₃ H ₈ ) is used, the upper limit is set to 100 ° C. or lower. If the substrate temperature is not set within the above temperature range, the raw material gas sublimes on the substrate when the temperature is low, and the raw material gas vaporizes on the substrate when the temperature is high. Does not liquefy.

Next, a first embodiment of the second invention will be described. The first embodiment is the same as the first embodiment of the first invention except for the method of manufacturing the silicon-based oxide film 14 described with reference to FIG. 1, and therefore the silicon-based oxide film 14 will be described here with reference to FIG. The manufacturing method will be described, and description of other components will be omitted.

An example of a method of manufacturing the silicon oxide film 14 will be described below. For example, monosilane (SiH ₄ ) is used as a material gas containing silicon atoms, hydrogen peroxide (H ₂ O ₂ ) is used as an oxidizing agent, and hydrogen fluoride (HF) is used as an acid-based additive gas (which is introduced by vaporization). The raw material gas was introduced into a general low-pressure CVD apparatus (not shown). The flow rate of the raw material gas is monosilane (SiH ₄ ): 50 sccm, hydrogen peroxide (H
₂ O ₂ ): 200 sccm, hydrogen fluoride (HF): 25
It was set to sccm.

A diffusion plate (not shown) for diffusing the introduced gas is provided in the low pressure CVD apparatus. Then, the diffusion plate was held at 100 ° C., for example, and the silicon oxide film 14 was formed to have a thickness of 800 nm, for example. When forming the silicon oxide film 14, the degree of vacuum in the low pressure CVD apparatus was set to 200 Pa, and the substrate 11 was cooled to 0 ° C.

In the silicon oxide film 14 thus formed, it was possible to form a level difference up to a wiring interval of 50 μm with an aspect ratio = 4 in a substantially flat shape (flatness = 80%). Therefore, it was found that the above manufacturing method has excellent gap fill ability and global planarization ability.

Thereafter, in the same manner as described with reference to FIG. 1, the silicon oxide film 1 is formed by, for example, the CVD method.
On the upper surface of No. 4, a silicon oxide (SiO ₂ ) film having a thickness of 0.3 μm was formed as the insulating film 15. As the deposition method, there is a method other than the CVD method, for example, a sputtering method or a coating method.

Next, annealing was performed to remove the water content in the silicon oxide film 14. In this annealing, for example, a commonly used furnace annealing furnace was used, and annealing was performed for 15 minutes in a nitrogen (N ₂ ) atmosphere of 400 ° C. as an inert atmosphere.

When forming a multi-layer wiring, the steps described above may be repeated. As a result, it is possible to form the multilayer wiring structure as described with reference to FIG.

In the first embodiment of the second aspect of the invention, by using the acid-based additive gas as one of the source gases, the reactions shown in the following reaction equations (6) and (7) are delayed.

[0043]

Embedded image ≡Si—OH + OH ⁻ → ≡Si—O ⁻ + H ₂ O (6)

[0044]

Embedded image ≡Si—O ⁻ + HO-Si → ≡Si—O ⁻ −Si≡ + OH ⁻ (7)

Although the polymerization reaction proceeds according to the above equation, the reaction of the reaction equation (6) is difficult to proceed when the pH is low and the OH ⁻ concentration is low. Therefore, the acidification can control the polymerization reaction.

In the first embodiment of the second invention, monosilane (SiH ₄ ) was used as the gas containing silicon atoms, but disilane (SiH ₄ ) was used as the polysilane.
It is also possible to use ₂ H ₆ ), trisilane (Si ₃ H ₈ ), or the like. The introduction conditions at that time may be set in the same manner as in the case of monosilane (SiH ₄ ). Further, hydrogen fluoride (H
Although F) was used, hydrogen chloride (HCl), hydrogen bromide (HBr), hydrogen iodide (HI) can be used in the same manner. The conditions at that time are the same as those for hydrogen fluoride (HF). Further, it is also possible to use a substance that reduces the concentration of OH groups in the organic acid. Examples of such substances include formic acid (HCOOH) and acetic acid (CH ₃ COO).
H) etc. Although hydrogen peroxide (H ₂ O ₂ ) is used as the oxidizing agent, water (H ₂ O) may be used. However, hydrogen peroxide reacts with H ₂ by the reaction.
O is easily generated, which is preferable.

Further, although the substrate temperature is set to 0 ° C.,
The substrate temperature may be set to a temperature at which at least one kind of raw material gas is liquefied. Therefore, the substrate temperature may be set to a temperature higher than the freezing point and lower than the boiling point of at least one of the source gases. Desirably, the gas containing silicon atoms is, for example, monosilane (SiH ₄ ) or disilane (Si
_{When 2} H ₆ ) is used, the upper limit is set to 50 ° C. or lower, and when trisilane (Si ₃ H ₈ ) is used, the upper limit is set to 100 ° C. or lower. If the substrate temperature is not set within the above temperature range, the raw material gas sublimes on the substrate when the temperature is low, and the raw material gas vaporizes on the substrate when the temperature is high. Does not liquefy.

Next, a second embodiment of the second invention will be described. The second embodiment is the same as the first embodiment of the first invention except for the method of manufacturing the silicon oxide film 14 described with reference to FIG. 1, so that the silicon oxide film 14 will be described here with reference to FIG. The manufacturing method will be described, and description of other components will be omitted.

An example of the method of manufacturing the silicon oxide film 14 will be described below. The raw material gas is mixed with, for example, monosilane (SiH ₄ ) as a gas containing silicon atoms, hydrogen peroxide (H ₂ O ₂ ) as an oxidant, and formic acid (HCOOH) as an acid-based additive gas (vaporized and introduced). The prepared raw material gas was introduced into a general low pressure CVD apparatus (not shown). The flow rate of the raw material gas is monosilane (SiH ₄ ): 50 sccm, hydrogen peroxide (H
₂ O ₂ ): 200 sccm, formic acid (HCOOH): 25
It was set to sccm.

A diffusion plate (not shown) for diffusing the introduced gas is provided in the low pressure CVD apparatus. Then, the diffusion plate was held at 100 ° C., for example, and the silicon oxide film 14 was formed to have a thickness of 800 nm, for example. When forming the silicon oxide film 14, the degree of vacuum in the low pressure CVD apparatus was set to 200 Pa, and the substrate 11 was cooled to 0 ° C.

In the silicon oxide film 14 thus formed, it was possible to form steps with an aspect ratio of 4 and a wiring interval of up to 50 μm in a substantially flat shape (flatness = 80%). Therefore, it was found that the above manufacturing method has excellent gap fill ability and global planarization ability.

Then, an insulating film 15 made of silicon oxide (SiO ₂ ) was formed on the silicon oxide film 14 by performing the same process as described in the first embodiment of the first invention. Then, annealing was performed to remove the water content in the silicon oxide film 14.

When forming a multi-layer wiring, the steps described above may be repeated. As a result, it is possible to form the multilayer wiring structure as described with reference to FIG.

In the second embodiment, acidification is carried out by using formic acid (HCOOH), and the first aspect of the second invention described above is obtained.
In the same way as in Example, OH ^- concentration is decreased. Therefore, the polymerization reaction is slowed down, so that global flattening is achieved.

In the second embodiment of the second invention, monosilane (SiH ₄ ) was used as the gas containing silicon atoms, but disilane (SiH ₄ ) was used as the polysilane.
It is also possible to use ₂ H ₆ ), trisilane (Si ₃ H ₈ ), or the like. The introduction conditions at that time may be set in the same manner as in the case of monosilane (SiH ₄ ). Also, formic acid (HCOO) is used as an acid-based additive gas (vaporized and introduced).
H) was used, but it is also possible to use acetic acid (CH ₃ COOH), for example. The conditions at that time are formic acid (HCOO
The same as H). Although hydrogen peroxide (H ₂ O ₂ ) is used as the oxidizing agent, water (H ₂ O) may be used. However, hydrogen peroxide is more
₂ O is easily generated, which is preferable.

Further, although the substrate temperature was set to 0 ° C.,
The substrate temperature may be set to a temperature at which at least one kind of raw material gas is liquefied. Therefore, the substrate temperature may be set to a temperature higher than the freezing point and lower than the boiling point of at least one of the source gases. Desirably, the gas containing silicon atoms is, for example, monosilane (SiH ₄ ) or disilane (Si
_{When 2} H ₆ ) is used, the upper limit is set to 50 ° C. or lower, and when trisilane (Si ₃ H ₈ ) is used, the upper limit is set to 100 ° C. or lower. If the substrate temperature is not set within the above temperature range, the raw material gas sublimes on the substrate when the temperature is low, and the raw material gas vaporizes on the substrate when the temperature is high. Does not liquefy.

In each of the embodiments of the first and second inventions described above, the silicon oxide film 14 is made to have a low dielectric constant by incorporating a methyl group (CH ₃ ) or a halogen [for example, fluorine (F)] in the source gas. It is also possible to rationalize.

In each of the above embodiments, since the silicon-based oxide film 14 can be globally flattened, the reliability of the wiring formed on the silicon-based oxide film 14 can be improved. Further, since exposure with a short depth of focus is possible in the lithography process, the element can be miniaturized. Therefore, the yield can be improved, the speed of the device can be increased, and the withstand voltage power consumption can be reduced.

[0059]

As described above, according to the present invention in which alcohol is used as the source gas at least, the solvent is increased by the alcohol, so that the viscosity of the source gas liquefied on the substrate can be reduced. Therefore, the liquefied raw material gas easily spreads over the entire substrate,
Global flattening can be improved. Further, according to the present invention in which at least a gas that exhibits acidity in an aqueous solution is used as the raw material gas, the p of the film when the raw material gas is liquefied on the substrate surface is
H can be lowered. Therefore, the reaction rate of the polymerization reaction can be slowed down, so that the global flattening can be promoted during that time. Therefore, according to the method of the present invention, a step having an aspect ratio of about 4 can be embedded, so that the gap fill ability can be improved and the global planarization ability can be improved.

[Brief description of drawings]

FIG. 1 is a manufacturing process diagram of an embodiment of the present invention.

FIG. 2 is an explanatory diagram of an example of forming a multilayer wiring.

[Explanation of symbols]

 14 Silicon oxide film

Claims (4)

[Claims] 1. A method for producing a silicon oxide film, which comprises liquefying a raw material gas on a substrate to form a film by a chemical vapor deposition method, wherein the raw material gas contains at least monosilane or polysilane and alcohol. A method for manufacturing a silicon oxide film, comprising: 2. A method for producing a silicon-based oxide film, which is formed by liquefying a raw material gas on a substrate by a chemical vapor deposition method, wherein the raw material gas is at least monosilane or polysilane, and is acidic in an aqueous solution. A method for producing a silicon-based oxide film, which comprises a gas. 3. The method for producing a silicon-based oxide film according to claim 1, wherein the substrate temperature in the chemical vapor deposition method is such that at least one type of gas substance serving as a source gas is a substrate surface. A method for producing a silicon-based oxide film, wherein the temperature is set to liquefy. 4. The method for producing a silicon-based oxide film according to claim 2, wherein the substrate temperature in the chemical vapor deposition method is such that at least one type of gas substance serving as a source gas is a substrate surface. A method for producing a silicon-based oxide film, wherein the temperature is set to liquefy.