JPH0997782A - Semiconductor wafer carrier - Google Patents

Semiconductor wafer carrier

Info

Publication number
JPH0997782A
JPH0997782A JP28908595A JP28908595A JPH0997782A JP H0997782 A JPH0997782 A JP H0997782A JP 28908595 A JP28908595 A JP 28908595A JP 28908595 A JP28908595 A JP 28908595A JP H0997782 A JPH0997782 A JP H0997782A
Authority
JP
Japan
Prior art keywords
wafer carrier
wafer
semiconductor wafer
side plates
ribs
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP28908595A
Other languages
Japanese (ja)
Inventor
Masahiko Maeda
正彦 前田
Yasumitsu Harada
恭光 原田
Koichi Imura
好一 井村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sumco Techxiv Corp
Original Assignee
Komatsu Electronic Metals Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Komatsu Electronic Metals Co Ltd filed Critical Komatsu Electronic Metals Co Ltd
Priority to JP28908595A priority Critical patent/JPH0997782A/en
Publication of JPH0997782A publication Critical patent/JPH0997782A/en
Pending legal-status Critical Current

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  • Packaging Frangible Articles (AREA)
  • Weting (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor wafer carrier which is capable of preventing a semiconductor wafer from deteriorating in evenness at etching by a method wherein the semiconductor wafer is set large in area exposed to etching solution and coming uniformly into contact with etching solution. SOLUTION: A wafer carrier main body 1 possessed of an open top and a bottom and inner sides provided with opposed support grooves where a large number of semiconductor wafers are placed separate from each other is formed into a shape of low profile. Side plates 2 and 3 are provided in the carrier main body 1 extending vertically downwards, ribs 2a to 2n and ribs 3a and 3n are provided to the inner surfaces of the side plates 2 and 3 extending both inwards and vertically downwards and confronting each other, and wafer support rods 8 and 9 are provided below the ribs 2a to 2n and ribs 3a and 3n and in parallel with and adjacent to the side plates 2 and 3 bridging a space between a front plate 4 and a rear plate 5. Semiconductor wafers inserted into opposed wafer support grooves made up with the ribs 2a to 2n, and 3a to 3n are supported by the support, rods 8 and 9 in a two-point support manner.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【発明の属する技術分野】本発明は、集積回路を構成す
る半導体ウェハの製造工程において、湿式処理例えばア
ルカリ溶液等のエッチング液にて半導体ウェハをエッチ
ング処理するためのウェットプロセス用のキャリヤの構
成部分に特徴のある半導体ウェハキャリヤに関するもの
である。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a component part of a carrier for a wet process for etching a semiconductor wafer with a wet process such as an etching solution such as an alkaline solution in a manufacturing process of a semiconductor wafer constituting an integrated circuit. The present invention relates to a semiconductor wafer carrier characterized by.

【0002】[0002]

【従来の技術】従来から、電子回路部品を形成するため
の半導体ウェハの製造工程において、半導体インゴット
をスライスしてウェハを得るインゴット切断工程と面取
り工程後に加工層をアルカリ溶液にてエッチングして除
去するエッチング工程時に使用される搬送カセットであ
る所謂ウェハキャリヤは、工程間の搬送および乾燥(ス
ピンドライヤー等)を考慮した通常PFAキャリヤやス
ケルトンPFAキャリヤ等の設計になっていた。
2. Description of the Related Art Conventionally, in a semiconductor wafer manufacturing process for forming electronic circuit components, a processing layer is removed by etching with an alkaline solution after an ingot cutting process and a chamfering process for slicing a semiconductor ingot to obtain a wafer. A so-called wafer carrier, which is a transfer cassette used in the etching process, has been designed as a normal PFA carrier, a skeleton PFA carrier, or the like in consideration of transfer between processes and drying (spin dryer, etc.).

【0003】[0003]

【発明が解決しようとする課題】しかしながら、高エッ
チングレート薬液を使用するエッチング工程で使用する
場合、上記した従来でのウェハキャリヤではハイプロフ
ァイルの多点支持構造なためにキャリヤにより収納被覆
されるウェハの被覆面積が大きく、またエッチング液の
流れを阻止するような余計な湾曲状の突起部分を有する
形状によりエッチング液がウェハ面内で均一に接触し進
行させることができず、エッチング時の半導体ウェハの
平坦度劣化を促す等の問題点があった。
However, when used in an etching process using a high etching rate chemical, the conventional wafer carrier described above has a high-profile multi-point support structure, so that the wafer accommodated and covered by the carrier is covered. Of the semiconductor wafer during etching because the coating area is large, and the etching solution cannot evenly contact and advance in the wafer surface due to the shape with extra curved protrusions that block the flow of the etching solution. There was a problem such as promoting deterioration of flatness.

【0004】本発明は、上記問題に鑑みなされたもの
で、高エッチング液の流れを極力阻害しないよう流動抵
抗を減少させ且つキャリヤに収納されるときの接触支点
を少なくし、また保持された半導体ウェハのエッチング
液に対する露呈面積を大きくして均一な接触を進行させ
ることによりエッチング時の平坦度劣化を防止できるよ
うな半導体ウェハキャリヤを提供することを目的とした
ものである。
The present invention has been made in view of the above problems, and reduces the flow resistance so as not to obstruct the flow of a high etching solution as much as possible, reduces the contact fulcrum when stored in a carrier, and holds the semiconductor held. It is an object of the present invention to provide a semiconductor wafer carrier capable of preventing deterioration of flatness during etching by increasing the exposed area of the wafer with respect to the etching solution and promoting uniform contact.

【0005】[0005]

【課題を解決するための手段】このため本発明では、多
数の半導体ウェハを隔置する対向支持溝を内側面に設
け、頂部と底部が開放されたウェハキャリヤにおいて、
ウェハキャリヤ本体は、ロープロファイル形態に一体成
形して設けられた直立する左右対称の側板と前板および
後板と、該側板はその垂直下方へ向けて直立に延設さ
れ、側板の内側表面には内方へヒダ状に突出し互いに対
向して設けられ垂直下方へ延びる一連の隔置リブと、該
隔置リブのそれぞれ下方に側板と平行隣接するようにし
て前板および後板間に架設されたウェハ支持杆とを有
し、隔置リブ間に形成された対向支持溝に挿入される半
導体ウェハを該ウェハ支持杆上に2点支持でもって保持
されていることを特徴とする。
For this reason, in the present invention, in a wafer carrier in which opposed support grooves for spacing a large number of semiconductor wafers are provided on the inner side surface and the top and bottom are opened,
The wafer carrier body is composed of an upright symmetric side plate and a front plate and a rear plate which are integrally formed in a low profile form, and the side plates are vertically extended downward and extend vertically on the inner surface of the side plate. Is a series of spaced ribs that project inwardly in a fold shape and face each other and extend vertically downward, and are installed between the front plate and the rear plate so as to be parallel and adjacent to the side plates below each of the spaced ribs. And a wafer supporting rod, the semiconductor wafer being inserted into the opposing supporting groove formed between the separating ribs is held on the wafer supporting rod by two-point support.

【0006】また、ウェハキャリヤ本体の前板には下方
へ垂直で外側に向けて突出する一対の平面状の突出部
と、前板の上方中央に穿設した円弧状の切欠凹部とを有
し、後板は中央部の縦幅を狭くしたり、側板のそれぞれ
外側表面には、前記隔置リブの連続形状による格子状の
窓孔を有することを特徴とする。
Further, the front plate of the wafer carrier main body has a pair of flat projecting portions which vertically project downward and outward, and an arcuate cutout recessed in the upper center of the front plate. The rear plate is characterized by narrowing the vertical width of the central portion, and has side windows each having a lattice-shaped window hole formed by the continuous shape of the separating ribs.

【0007】本発明に係る半導体ウェハキャリヤによれ
ば、半導体ウェハをウェハ支持杆上に2点支持でもって
保持させ、ウェハ接触を最小限に抑える支持形態とな
り、また、ロープロファイル形態に一体成形して設けら
れた側板と前板および後板は、半導体ウェハキャリヤに
収納されるウェハ被覆面積を極力小さくでき、さらに、
垂直下方へ向けて直立に延設された側板と、該側板の内
側表面に内方へヒダ状に突出し互いに対向して設けられ
垂直下方へ延びる一連の隔置リブによりストレート構造
で余計な突起部分がないのでエッチング液の流れを阻害
することなくウェハ面に均一に接触させ、エッチング時
の平坦度劣化を防止することで平坦度を維持させる。ま
た、前記前板の上方中央に設けた円弧状の切欠凹部と、
中央部の縦幅を狭くした後板は、収納した半導体ウェハ
の露呈面積を増やしエッチング液の流れを阻害させな
い。さらに、側板のそれぞれ外側表面に設けた格子状の
窓孔は、ウェハキャリヤ全体の補強と軽量化が図られ、
射出成形する際の歪み等の発生をも防止される。
According to the semiconductor wafer carrier of the present invention, the semiconductor wafer is held by the two-point support on the wafer support rod so that the wafer contact is minimized, and the semiconductor wafer carrier is integrally molded in the low profile form. The side plate, the front plate, and the rear plate that are provided to reduce the wafer covered area accommodated in the semiconductor wafer carrier as much as possible.
A side plate extending vertically downward and a series of spaced ribs protruding inward inward on the inner surface of the side plate facing each other and extending vertically downward are extra protrusions having a straight structure. Therefore, the flatness is maintained by uniformly contacting the wafer surface without obstructing the flow of the etching solution and preventing the flatness from deteriorating during etching. Also, an arcuate notch recess provided in the upper center of the front plate,
The rear plate having a narrowed vertical width in the central portion increases the exposed area of the accommodated semiconductor wafer and does not obstruct the flow of the etching solution. Furthermore, the lattice-shaped window holes provided on the outer surfaces of the side plates respectively reinforce and reduce the weight of the entire wafer carrier,
It is also possible to prevent distortion or the like from occurring during injection molding.

【0008】[0008]

【発明の実施の形態】以下、図面を参照して本発明の実
施の形態を説明するに、図において示される符号1は、
例えばアルカリ性溶液によるシリコン等のディスク型半
導体ウェハのエッチング工程に使用される半導体ウェハ
を保持する容器としてのウェハキャリヤ本体であり、図
1に示す如く、ウェハキャリヤ本体1は、直立した左右
対称の側板2および3と前板4および後板5をロープロ
ファイル形態に一体成形して作られその底部は開放され
ている。側板2および3はその垂直下方へ向けて直立に
延設され、また側板2および3の内側表面には内方へヒ
ダ状に突出する一連の隔置リブ2a〜2nおよび3a〜
3nが互いに対向して設けられ、その間に形成されたウ
ェハ支持溝6a〜6nおよび7a〜7nに各半導体ウェ
ハが挿入され、それぞれの半導体ウェハは相互に接触す
ることなく隔離して保持できるようにされている。
BEST MODE FOR CARRYING OUT THE INVENTION Hereinafter, in order to explain embodiments of the present invention with reference to the drawings, reference numeral 1 shown in the drawings indicates
For example, a wafer carrier body as a container for holding a semiconductor wafer used in an etching process of a disk type semiconductor wafer such as silicon with an alkaline solution. As shown in FIG. 1, the wafer carrier body 1 is an upright and symmetric side plate. 2 and 3, the front plate 4 and the rear plate 5 are integrally molded in a low profile form, and the bottom thereof is open. The side plates 2 and 3 extend vertically downwardly thereof, and the inner surfaces of the side plates 2 and 3 are provided with a series of ribs 2a-2n and 3a-
3n are provided so as to face each other, and the semiconductor wafers are inserted into the wafer supporting grooves 6a to 6n and 7a to 7n formed therebetween, so that the respective semiconductor wafers can be held separately without contacting each other. Has been done.

【0009】ウェハキャリヤ本体1は、図1に示す如
く、全体構成がロープロファイル形態であって且つ頂部
および底部が開放されていることによりウェハ支持溝6
a〜6nおよび7a〜7nに挿入された各半導体ウェハ
の湿式処理、エッチング処理、洗浄乾燥等を容易にして
いる。隔置リブ2a〜2nおよび3a〜3nは全体とし
て垂直下方へ延びると共に、それぞれその下方にはウェ
ハ支持杆8および9を側板2および3と平行隣接するよ
うにして前板4および後板5間に架設し、ウェハ支持溝
6a〜6nおよび7a〜7nに挿入された半導体ウェハ
を図2に示す如く、ウェハ支持杆8および9上に2点支
持でもって保持するようにされている。側板2および3
の上縁にはフランジ10aおよび11aが設けられ、そ
の端部から鉛直下向きに連続して設けられたフランジ側
板10bおよび11bとにより箱蓋状の握手部10およ
び11を形成しており、側壁を補強すると共に人手やロ
ボット等によるウェハキャリヤ本体1の引き上げが容易
にできるようにされている。また、前記フランジ10a
および11aの表面には収納した半導体ウェハの位置と
数を確認するための数値が描出されている。
As shown in FIG. 1, the wafer carrier body 1 has a wafer support groove 6 because the whole structure is a low profile form and the top and bottom are open.
It facilitates wet processing, etching processing, cleaning / drying, etc. of the semiconductor wafers inserted in a to 6n and 7a to 7n. The separating ribs 2a to 2n and 3a to 3n extend vertically downward as a whole, and the wafer supporting rods 8 and 9 are arranged below the separating ribs so as to be parallel and adjacent to the side plates 2 and 3, respectively. As shown in FIG. 2, the semiconductor wafer, which is erected on the wafer supporting grooves 6a to 6n and 7a to 7n, is held on the wafer supporting rods 8 and 9 by two-point support. Side plates 2 and 3
Flanges 10a and 11a are provided on the upper edge of the box, and box-shaped handshake portions 10 and 11 are formed by flange side plates 10b and 11b continuously provided vertically downward from the ends of the side walls. The wafer carrier body 1 is reinforced and can be easily pulled up manually or by a robot. Also, the flange 10a
Numerical values for confirming the position and number of the accommodated semiconductor wafers are drawn on the surfaces of and 11a.

【0010】ウェハキャリヤ本体1の前板4には下方へ
垂直で外側に向けて突出する平面状の突出部4aおよび
4bが設けられ補強が図られている。さらに、前記前板
4の上方中央には円弧状の切欠凹部12が設けられてお
り、また、後板5は中央部の縦幅を狭くすることで、収
納した半導体ウェハの露呈面積を増やしエッチング液の
流れを阻害しないようにしている。さらに、側板2およ
び3のそれぞれ外側表面は前記隔置リブ2a〜2nおよ
び3a〜3nの連続形状による格子状の窓孔13に形成
されており、ウェハキャリヤ本体1の補強と軽量化を図
ると共に、射出成形する際の歪み等の発生を防止できる
ようにされている。尚、図示例にあって、格子状の窓孔
13に代わって矩形状の透孔としたり、あるいは、この
窓孔13を削除して面一構成とすることも可能である。
The front plate 4 of the wafer carrier body 1 is provided with plane-shaped projecting portions 4a and 4b which vertically project downward and are reinforced. Further, an arcuate notch recess 12 is provided in the upper center of the front plate 4, and the rear plate 5 has a narrowed vertical width at the central portion to increase the exposed area of the semiconductor wafers housed therein. It does not block the flow of liquid. Further, the outer surface of each of the side plates 2 and 3 is formed with a lattice-shaped window hole 13 formed by a continuous shape of the separating ribs 2a to 2n and 3a to 3n, so that the wafer carrier body 1 is reinforced and the weight thereof is reduced. It is possible to prevent distortion and the like from occurring during injection molding. In the illustrated example, the lattice-shaped window holes 13 may be replaced with rectangular through holes, or the window holes 13 may be deleted to provide a flush structure.

【0011】[0011]

【実施例】スライスした半導体ウェハのエッチング工程
において、ウェハキャリヤの使用によれば、半導体ウェ
ハの加工層を除去し且つ平坦度を維持するためにエッチ
ング液がウェハ面内に均一に進行することが不可欠であ
り、本発明に係るウェハキャリヤ本体1によればエッチ
ング液の流れがウェハ面内に均一に接触し平坦度を維持
することができ、下記の表1に示す如く、エッチング加
工前とエッチング加工後との間の加工層の変化量TTV
(μm)は従来の1.57μmから1.00μmに減少
するのが確認された。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS In the process of etching a sliced semiconductor wafer, the use of a wafer carrier allows the etching solution to uniformly advance in the wafer surface in order to remove the processed layer of the semiconductor wafer and maintain the flatness. This is essential, and according to the wafer carrier body 1 of the present invention, the flow of the etching solution can uniformly contact the wafer surface to maintain the flatness. Amount of change in processing layer between after processing and TTV
It was confirmed that (μm) decreased from 1.57 μm in the related art to 1.00 μm.

【0012】[0012]

【表1】 [Table 1]

【0013】[0013]

【発明の効果】本発明は以上のように構成されており、
特に、ロープロファイル形態に一体成形して設けられた
側板と前板および後板と、該側板はその垂直下方へ向け
て直立に延設され、側板の内側表面には内方へヒダ状に
突出し互いに対向して設けられ垂直下方へ延びる一連の
隔置リブと、該隔置リブのそれぞれ下方において前板お
よび後板間に架設されたウェハ支持杆とを有するので、
エッチング液の流れを極力阻害しないよう流動抵抗を減
少させ且つキャリヤに収納されるときの接触支点を少な
くし、また保持された半導体ウェハのエッチング液に対
する露呈面積を大きくして均一な接触を進行させること
によりエッチング時の平坦度劣化を防止することができ
る。
The present invention is configured as described above.
In particular, the side plate, the front plate and the rear plate integrally formed in the low profile form, and the side plate vertically extend downwardly thereof, and the inner surface of the side plate protrudes inward in a pleated shape. Since it has a series of spaced ribs provided facing each other and extending vertically downward, and a wafer support rod installed between the front plate and the rear plate below each of the spaced ribs,
The flow resistance is reduced so as not to disturb the flow of the etching solution as much as possible, the contact fulcrum when stored in the carrier is reduced, and the exposed area of the held semiconductor wafer with respect to the etching solution is increased to promote uniform contact. As a result, it is possible to prevent deterioration of flatness during etching.

【0014】また、前記前板の上方中央に設けた円弧状
の切欠凹部と、中央部の縦幅を狭くした後板は、収納し
た半導体ウェハの露呈面積を増やしエッチング液の流れ
を阻害させない。さらに、側板のそれぞれ外側表面に設
けた格子状の窓孔は、ウェハキャリヤ全体の補強と軽量
化が図られ、射出成形する際の歪み等の発生をも防止す
ることができる。
Further, the arcuate notch recess provided in the upper center of the front plate and the rear plate having a narrowed vertical width in the central portion increase the exposed area of the semiconductor wafer housed and do not disturb the flow of the etching solution. Further, the lattice-shaped window holes provided on the outer surface of each of the side plates reinforces and reduces the weight of the entire wafer carrier, and can prevent the occurrence of distortion or the like during injection molding.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の実施の形態を示した全体斜視図であ
る。
FIG. 1 is an overall perspective view showing an embodiment of the present invention.

【図2】同じく正面図である。FIG. 2 is a front view of the same.

【符号の説明】[Explanation of symbols]

1…ウェハキャリヤ本体 2,3…側板 4…前板 5…後板 2a〜2n,3a〜3n…隔置リブ 6a〜6n,7a〜7n…ウェハ支持溝 8,9…ウェハ支持杆 12…切欠凹部 13…窓孔 1 ... Wafer carrier body 2, 3 ... Side plate 4 ... Front plate 5 ... Rear plate 2a to 2n, 3a to 3n ... Separation ribs 6a to 6n, 7a to 7n ... Wafer supporting groove 8, 9 ... Wafer supporting rod 12 ... Notch Recessed portion 13 ... Window hole

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】 多数の半導体ウェハを隔置する対向支持
溝を内側面に設け、頂部と底部が開放されたウェハキャ
リヤにおいて、ウェハキャリヤ本体は、ロープロファイ
ル形態に一体成形して設けられた直立する左右対称の側
板と前板および後板と、該側板はその垂直下方へ向けて
直立に延設され、側板の内側表面には内方へヒダ状に突
出し互いに対向して設けられ垂直下方へ延びる一連の隔
置リブと、該隔置リブの夫々下方に側板と平行隣接する
ようにして前板および後板間に架設されたウェハ支持杆
とを有し、隔置リブ間に形成された対向支持溝に挿入さ
れる半導体ウェハを該ウェハ支持杆上に少なくとも2点
支持でもって保持されていることを特徴とする半導体ウ
ェハキャリヤ。
1. In a wafer carrier in which opposed support grooves for separating a large number of semiconductor wafers are provided on an inner side surface, and a top and a bottom are opened, a wafer carrier body is integrally formed in a low profile form and is upright. The left and right symmetrical side plates, the front plate, and the rear plate, and the side plates extend vertically downwards, and are provided on the inner surface of the side plates so as to project inwardly in a fold shape and face each other vertically downward. A series of spaced ribs and a wafer support rod installed between the front plate and the rear plate so as to be parallel and adjacent to the side plates below each of the spaced ribs, and formed between the spaced ribs. A semiconductor wafer carrier characterized in that a semiconductor wafer to be inserted into a facing supporting groove is held on the wafer supporting rod by supporting at least two points.
【請求項2】 ウェハキャリヤ本体の前板には下方へ垂
直で外側に向けて突出する一対の平面状の突出部と、前
板の上方中央に穿設した円弧状の切欠凹部とを有し、後
板は中央部の縦幅を狭くした請求項1記載の半導体ウェ
ハキャリヤ。
2. A front plate of the wafer carrier body has a pair of planar projections which vertically project downward and outward, and an arcuate cutout recessed in the upper center of the front plate. 2. The semiconductor wafer carrier according to claim 1, wherein the rear plate has a narrowed vertical width at its central portion.
【請求項3】 側板のそれぞれ外側表面には、前記隔置
リブの連続形状による格子状の窓孔を有することを特徴
とする請求項1または2記載の半導体ウェハキャリヤ。
3. The semiconductor wafer carrier according to claim 1, wherein each side surface of the side plate is provided with a lattice-shaped window hole formed by the continuous shape of the separation ribs.
JP28908595A 1995-09-30 1995-09-30 Semiconductor wafer carrier Pending JPH0997782A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP28908595A JPH0997782A (en) 1995-09-30 1995-09-30 Semiconductor wafer carrier

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP28908595A JPH0997782A (en) 1995-09-30 1995-09-30 Semiconductor wafer carrier

Publications (1)

Publication Number Publication Date
JPH0997782A true JPH0997782A (en) 1997-04-08

Family

ID=17738633

Family Applications (1)

Application Number Title Priority Date Filing Date
JP28908595A Pending JPH0997782A (en) 1995-09-30 1995-09-30 Semiconductor wafer carrier

Country Status (1)

Country Link
JP (1) JPH0997782A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100655431B1 (en) * 2005-03-23 2006-12-11 삼성전자주식회사 Wafer carrier capable of minimizing contact area with wafers and wafer cleaning method using the same
CN101980375A (en) * 2010-08-26 2011-02-23 常州亿晶光电科技有限公司 Bearing device special for texturing silicon wafer
CN105990198A (en) * 2016-07-05 2016-10-05 常州大学 Slot-type basket device for solar battery cell

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100655431B1 (en) * 2005-03-23 2006-12-11 삼성전자주식회사 Wafer carrier capable of minimizing contact area with wafers and wafer cleaning method using the same
CN101980375A (en) * 2010-08-26 2011-02-23 常州亿晶光电科技有限公司 Bearing device special for texturing silicon wafer
CN105990198A (en) * 2016-07-05 2016-10-05 常州大学 Slot-type basket device for solar battery cell

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