JPH10126155A - Oscillator - Google Patents

Abstract

PROBLEM TO BE SOLVED: To instantaneously stop and start the generation of clock signals and also to prevent malfunctions of an internal circuit by preparing the logical gates to an amplifier circuit and a shaping circuit respectively and then activating and inactivating simultaneously both logical gates by an oscillation stop signal for a buffer which amplifies and shapes the oscillation output signal. SOLUTION: An oscillation device 10 transmits the clock signal to be supplied to a semi-customed LSI of a gate array, etc., and a feedback amplifying NAND gate 16 and a waveform-shaping NAND gate 18 are added to a buffer 12 of the device 10. When an oscillation stop signal is set at a high level, a crystal vibrator 1 oscillates a sine wave which is amplified by a circuit, including the gate 16 and shaped into a square wave by the gate 18. When the oscillation stop signal is set at a low level, the output level of the gate 18 is instantaneously set at a high level, and the oscillation is stopped. When a Schmitt trigger-type gate is used for the gate 18, the unwanted clock generated by the initial vibration can be prevented.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an oscillation circuit mounted on a semi-custom LSI such as a gate array and having an oscillation stop function for generating a clock signal supplied to an internal circuit thereof.

[0002]

2. Description of the Related Art For example, in a semi-custom LSI such as a gate array, its internal circuit is generally controlled by a clock signal. In order to generate this clock signal, for example, a quartz oscillator or a ceramic oscillator is used. An oscillation device using a resonator such as the above is used. The configuration, operation, and problems of an oscillator using a resonator will be described below by taking an oscillator using a crystal resonator as an example.

FIG. 4 is a circuit diagram showing an example of a conventional oscillation device. The illustrated oscillation device 32 is an example of an oscillation device using a resonator mounted and used on a gate array, for example, and includes an oscillation circuit buffer 12 and an oscillation circuit 14. The oscillation circuit buffer 12 has a feedback amplification NAND gate 16 and a waveform shaping buffer 34, and the oscillation circuit 14 has a resistance element 20, a crystal oscillator 22, and capacitance elements 24 and 26.

Here, the resistance element 20 and the crystal resonator 22 are connected in parallel, and the capacitance elements 24 and 26 are connected between both ends of the crystal resonator 22 and the ground, respectively.
One input terminal of the feedback amplification NAND gate 16 is connected to one end of the resistance element 20, the other end receives an oscillation stop signal, and the output terminal is connected to the other end of the resistance element 20. And waveform shaping buffer 3
4 input terminal.

[0005] In this oscillation device 32, the crystal oscillator 2
2 outputs a sine wave of a predetermined frequency. Resistance element 20
Is a bias resistor connecting both ends of the crystal unit 22, and is a feedback amplification NAND gate 16 and a capacitive element 2
Together with 4, 26, the sine wave output from the crystal unit 22 is amplified to a predetermined amplitude. The sine wave amplified to the predetermined amplitude is
The waveform is shaped into a square wave by the waveform shaping buffer 34 and supplied to an internal circuit as, for example, a clock signal.

In the oscillation circuit 14, when the power is turned on, the oscillation stop signal is at a high level, or
Oscillation is started by turning the oscillation stop signal to high level after turning on the power. After oscillation is started, oscillation is stopped by setting the oscillation stop signal to low level or turning off the power. Thus, the conventional oscillation device 3
In 2, the start and stop of the oscillation of the oscillation circuit 14 are controlled by the oscillation stop signal.

In an oscillation circuit using a resonator, mechanical oscillation of the resonator is converted into an electric signal, which is fed back to a feedback amplification logic gate to maintain an oscillation state. Therefore, even if the output level of the logic gate for feedback amplification is forcibly fixed by the oscillation stop signal and the oscillation of the oscillation circuit is stopped, the resonator continues the damped oscillation for a certain time T. As a result, the oscillation of the oscillation circuit cannot be stopped immediately.

For example, in the oscillation device 32, when the oscillation stop signal is set to the low level to stop the oscillation of the oscillation circuit 14, the output level of the feedback amplification NAND gate 16 constituting the oscillation circuit buffer 12 is completely high. A certain time T is required until the level is reached. Therefore,
As shown in FIG. 5, the NAND gate 16 for feedback amplification is used.
The output level continues to attenuate even after the oscillation stop signal is set to the low level, and becomes completely high after the time T.

However, during this time T, an unnecessary pulse is shaped by the waveform shaping buffer 34 due to the damped oscillation of the oscillation circuit, and this is supplied to the internal circuit as a clock signal. There is a problem that it becomes one of the causes of malfunction. Also, when the oscillation stop signal is set to the high level to start the oscillation of the oscillation circuit, unnecessary pulses are shaped by the waveform shaping buffer 34 in the same manner, and the internal circuit malfunctions. .

As one solution to the problem of such an oscillator, there is an oscillator disclosed in, for example, JP-A-61-98002. This oscillation device comprises an oscillation circuit having oscillation stop means controlled by an oscillation stop signal, and a frequency divider which divides the oscillation output of the oscillation circuit and is reset by the oscillation stop signal. The oscillation of the oscillation circuit is stopped by a signal, and at the same time, the frequency divider is reset to output a predetermined output level.

According to this oscillation device, since the oscillation circuit and the frequency divider are reset simultaneously by the oscillation stop signal, the clock signal can be completely stopped even when the oscillation of the oscillator cannot be completely stopped. It can be done. However, this oscillation device does not take into account the oscillation start of the oscillation circuit at all, and generates an unnecessary clock signal at the start of oscillation, thus causing a problem of malfunction.

[0012]

SUMMARY OF THE INVENTION An object of the present invention is to solve the various problems based on the prior art described above, and to immediately stop and start the generation of a clock signal by an oscillation stop signal. It is an object of the present invention to provide an oscillation device capable of preventing malfunction of the oscillator.

[0013]

In order to achieve the above object, the present invention comprises an oscillation circuit and an oscillation circuit buffer for amplifying a signal in the oscillation circuit and shaping the output of the oscillation circuit. The oscillation circuit buffer includes a feedback amplification logic gate for amplifying a signal in the oscillation circuit, and a waveform shaping logic gate for shaping the output of the feedback amplification logic gate. The logic gate for waveform shaping and the logic gate for waveform shaping are simultaneously brought into an active state or an inactive state by an oscillation stop signal.

Here, it is preferable that the waveform shaping logic gate is a Schmitt trigger type logic gate.

[0015]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An oscillator according to the present invention will be described below in detail with reference to the preferred embodiments shown in the accompanying drawings.

FIG. 1 is a circuit diagram of an oscillator according to an embodiment of the present invention. The illustrated oscillating device 10 is an example of an oscillating device using a resonator mounted and used on a gate array or the like, and includes an oscillating circuit buffer 12 and an oscillating circuit 14. The oscillation circuit buffer 12 includes a feedback amplification NAND gate 16 and a waveform shaping NAND gate 18. The oscillation circuit 14 includes a resistance element 20, a crystal oscillator 22, and capacitance elements 24 and 26.
have.

The resistance value _Rf of the resistance element 20 and the capacitance values C _i and C _o of the capacitance elements 24 and 26 are appropriately determined in accordance with the oscillation frequency of the crystal resonator 22, respectively.

Here, the resistance element 20 and the crystal resonator 22 are connected in parallel, and the capacitance elements 24 and 26 are connected between both ends of the crystal resonator 22 and the ground, respectively.
One input terminal of the feedback amplification NAND gate 16 is connected to one end of the resistance element 20, and its output terminal is connected to the other end of the resistance element 20 and the waveform shaping NAND gate 18.
The oscillation stop signal is input to the other end of the feedback amplification NAND gate 16 and the waveform shaping NAND gate 18.

In this oscillation device 10, the output level of the feedback amplification NAND gate 16 is controlled by the oscillation stop signal to control the start and stop of the oscillation of the oscillation circuit 14, and at the same time, the waveform shaping NAND gate 18 Of the oscillation device 10 used as, for example, a clock signal supplied to an internal circuit. In the illustrated example, the oscillation is started when the oscillation stop signal is set to a high level, and the oscillation is stopped when the oscillation stop signal is set to a low level.

When the oscillation stop signal is at a high level, the crystal oscillator 22 outputs a sine wave of a predetermined frequency. The resistance element 20 is a bias resistor connecting both ends of the crystal resonator 22 and amplifies the sine wave output from the crystal resonator 22 to a predetermined amplitude together with the feedback amplification NAND gate 16 and the capacitance elements 24 and 26. The sine wave amplified to a predetermined amplitude is shaped into a square wave by the waveform shaping NAND gate 18 and supplied to an internal circuit as, for example, a clock signal.

When stopping the oscillation, the oscillation stop signal is set to a low level. When the oscillation stop signal is set to a low level, the output level of the NAND gate 16 for feedback amplification becomes high after a certain time T as described above in the description of the related art. 2
2 undergoes damped oscillation, but regardless of this, the NA for waveform shaping
The output level of the ND gate 18 is immediately fixed to the high level, and the output of the oscillation device 10 is completely stopped.

When starting the oscillation, the oscillation stop signal is set to a high level. When the oscillation stop signal is set to the high level, the initial oscillation of the crystal oscillator 22 appears for a predetermined time T at the output of the feedback amplification NAND gate 16 as described above in the description of the related art. Since the waveform is shaped by the waveform shaping NAND gate 18, an unnecessary clock signal is generated as in the oscillator disclosed in Japanese Patent Application Laid-Open No. 61-98002.

In order to solve this problem, in the oscillation device of the present invention, when an unnecessary clock signal generated at the start of oscillation becomes a problem, for example, as shown in FIG. By using the Schmitt trigger type waveform shaping NAND gate 30, this problem can be solved.

As shown in the timing chart of FIG. 3, in the oscillation device 28 shown in FIG. 2, it goes without saying that an unnecessary clock signal is not generated when the oscillation is stopped. Gate 30 for Schmitt trigger type waveform shaping
Is used, it is possible to prevent a clock signal from being generated due to the initial vibration at the start of oscillation of the crystal resonator 22, and to prevent malfunction of the internal circuit.

Although the oscillator according to the present invention has been described in detail above, the present invention is not limited to the above embodiment. For example, the feedback amplification NAND gate 16 and the waveform shaping NA
A NOR gate may be used as the ND gate 18, and the oscillation may be stopped when the oscillation stop signal is set to a high level. Alternatively, any circuit other than the embodiment may be used as the oscillation circuit. Of course, various improvements and modifications may be made without departing from the spirit of the present invention.

[0026]

As described in detail above, the oscillation device of the present invention comprises an oscillation circuit and an oscillation circuit buffer for amplifying a signal in the oscillation circuit and shaping the waveform of the output of the oscillation circuit. The oscillation circuit buffer has a feedback amplification logic gate that amplifies a signal in the oscillation circuit, and a waveform shaping logic gate that shapes the output of the feedback amplification logic gate. The logic gate for amplification and the logic gate for waveform shaping are simultaneously activated and deactivated by the waveform stop signal. Therefore, according to the oscillation device of the present invention, unnecessary clock signals can be prevented from being generated due to the damped oscillation of the resonator when oscillation stops, and the Schmitt trigger type as a waveform shaping logic gate can be prevented. By using the logic gate, generation of an unnecessary clock due to initial vibration of the resonator at the start of oscillation can be prevented, and malfunction of the internal circuit can be prevented.

[Brief description of the drawings]

FIG. 1 is a configuration circuit diagram of an embodiment of an oscillation device according to the present invention.

FIG. 2 is a configuration circuit diagram of another embodiment of the oscillation device of the present invention.

FIG. 3 is a timing chart of an embodiment showing the operation of the oscillation device of the present invention.

FIG. 4 is a configuration circuit diagram of an example of a conventional oscillation device.

FIG. 5 is a timing chart showing an example of the operation of a conventional oscillation device.

[Explanation of symbols]

 10, 28, 32 Oscillator 12 Oscillator circuit buffer 14 Oscillator circuit 16 Feedback amplification NAND gate 18, 30 Waveform shaping NAND gate 20 Resistive element 22 Quartz crystal oscillator 24, 26 Capacitance element 34 Waveform shaping buffer

Claims (2)

[Claims] 1. An oscillator circuit, comprising: an oscillator circuit; an oscillator circuit buffer for amplifying a signal in the oscillator circuit and shaping an output of the oscillator circuit; and wherein the oscillator circuit buffer amplifies a signal in the oscillator circuit. A logic gate for feedback amplification, and a logic gate for waveform shaping for waveform shaping the output of the logic gate for feedback amplification.The logic gate for feedback amplification and the logic gate for waveform shaping are controlled by an oscillation stop signal. An oscillation device which is set to an active state or an inactive state at the same time. 2. The oscillation device according to claim 1, wherein the waveform shaping logic gate is a Schmitt trigger type logic gate.