JPH10200903A - Fluorescent light flicker suppression imaging device - Google Patents

Abstract

(57) [Problem] To provide an image pickup apparatus capable of performing a highly accurate correction process that does not involve non-linear processing with respect to flicker correction. SOLUTION: An output of an image sensor 10 is converted into an A / D converter 1
1, via a YC separation processing unit 12, a gain control signal generated by a gain control signal generation unit 17 from an output of an integrator 16 for integrating a luminance signal for each vertical synchronization period.
The gamma correction processing unit 14 performs gamma correction processing (γ <1) on the output signal of the gain control unit 13, and generates an output signal of the camera from the output signal of the gamma correction processing unit 14. It is provided with.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to an image pickup apparatus for improving the image quality obtained by suppressing flicker of fluorescent lamps.

[0002]

2. Description of the Related Art A conventional apparatus which suppresses flicker which occurs when a subject which is illuminated by a fluorescent lamp illuminated by a 50 Hz power supply is picked up by a 60-field / second TV-type image pickup apparatus is disclosed in, for example, Japanese Patent Laid-Open Publication No. Hei. No. 115024 and the like. Hereinafter, an example of a conventional fluorescent lamp flicker suppressing imaging apparatus will be described with reference to the drawings. FIG. 6 is a block diagram showing a configuration of a conventional fluorescent lamp flicker suppressing imaging apparatus. 6, reference numeral 60 denotes a solid-state image sensor, 61 denotes a gain control unit, 62 denotes an A / D converter, 63 denotes a digital signal processing unit, 64 denotes a D / A converter, 65 denotes an integrator, and 66 denotes a gain control signal generation. Reference numeral 67 denotes a synchronization signal generation circuit.

Next, the operation will be described. Integrator 6
Reference numeral 5 receives a digital video signal, performs processing such as adding a digital luminance signal, and outputs an integrated digital data signal for one field. The gain control signal generator 66 reads out the integrated digital data of the n-th field (n is an integer) from the integrator 65 and, based on the read digital data, sets an arbitrary signal to a gain to be set in the (n + 3) -th field time. Generate

[0004] The gain control section 61 includes a gain control signal generation section 6.
6, the solid-state image sensor 6
0 controls the gain so as to correct the flicker of the video signal output.

[0005]

However, in the above configuration, the gamma correction process included in the digital signal processing unit 63 requires a gain control signal calculated using the gamma-corrected video signal before the gamma correction. In this case, the gain of the video signal is controlled, and the correction accuracy is poor.

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and it is an object of the present invention to provide a fluorescent lamp flicker suppressing imaging apparatus having high correction accuracy without increasing the circuit scale.

[0007]

According to the present invention, there is provided a fluorescent lamp flicker suppressing imaging apparatus according to the present invention, and an A / D converter for converting an output signal of the solid state imaging element into a digital signal. A luminance signal / color signal separating unit for separating a luminance signal and a chrominance signal from an output signal of the A / D converting unit; and an integration for integrating a luminance signal output by the luminance signal / color signal separating unit for each vertical synchronization period. Means, gain control signal generating means for generating a gain control signal for controlling gains of a luminance signal and a chrominance signal generated by the luminance signal / color signal separating means from an integrated value output by the integrating means, and the luminance signal color Gain control means for controlling the gains of the luminance signal and the chrominance signal generated by the signal separation means by the gain control signal generated by the gain control signal generation means; A gamma correction unit that performs comma correction processing (gamma <1), and the camera output signal generating means for generating a camera output signal from the output signal of the gamma correction unit, those having a.

Thus, a non-linear signal is generated by generating a gain control signal used for flicker correction from a video signal before gamma correction and performing gain control on the video signal before gamma correction by the generated gain control signal. It is possible to perform highly accurate correction without any complicated processing. Furthermore, the fluorescent lamp flicker suppressing imaging device of the present invention includes a solid-state imaging device,
A / D conversion means for converting an output signal of the solid-state imaging device into a digital signal, integration means for integrating the output signal of the A / D conversion means for each vertical synchronization period, and an integration value output from the integration means Gain control signal generating means for generating a gain control signal for controlling the gain of the digital signal output from the A / D converter, and gain control signal generating means for determining the gain of the digital signal output from the A / D converter A gain control means controlling by a gain control signal generated by
Digital signal processing means for performing various processes specific to the imaging device on the output signal of the gain control means and generating a camera output signal.

As a result, the effect that a smaller circuit configuration can be obtained is obtained.

[0010]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention according to claim 1 of the present invention provides a solid-state imaging device, A / D conversion means for converting an output signal of the solid-state imaging device into a digital signal, and the A / D conversion device.
A luminance signal / chrominance signal separation unit for separating a luminance signal and a chrominance signal from an output signal of the conversion unit; an integration unit for integrating a luminance signal output by the luminance signal / color signal separation unit for each vertical synchronization period; A gain control signal generating means for generating a gain control signal for controlling the gains of the luminance signal and the chrominance signal generated by the luminance signal and chrominance signal separating means, and the luminance signal and chrominance signal separating means. Gain control means for controlling gains of a luminance signal and a chrominance signal by a gain control signal generated by the gain control signal generation means; and a gamma correction process (γ <
A fluorescent lamp flicker suppressing imaging apparatus, comprising: gamma correction means for performing 1); and camera output signal generation means for generating a camera output signal from an output signal of the gamma correction means. Thus, by generating a gain control signal used for flicker correction from the video signal before gamma correction and performing gain control on the video signal before gamma correction by the generated gain control signal, nonlinear processing can be performed. High-precision correction without intervention is possible.

(Embodiment 1) Next, a fluorescent lamp flicker suppressing imaging apparatus according to an embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a block diagram illustrating a configuration of a fluorescent lamp flicker suppressing imaging apparatus according to the present embodiment. The video signal output from the image sensor 10 is converted into a digital video signal by the A / D converter 11 and input to the YC separation processing unit 12. The YC separation processing unit 12 separates the digital video signal into a luminance signal and a chrominance signal. The integrator 16 integrates the luminance signal separated by the YC separation processing unit 12 for each field with reference to the vertical synchronization signal generated by the synchronization signal generation circuit 18 to generate a luminance integration signal. Like the integrator 16, the gain control signal generator 17 reads out the luminance integrated signal once per field from the integrator 16 based on the vertical synchronizing signal generated by the synchronizing signal generating circuit 18.

The gain control signal generator 17 is provided with the integrator 16
Has a function of holding the luminance integrated values of at least the past two fields read from the memory, and determines the presence or absence of flicker by comparing the luminance integrated signal currently read from the integrator 7 with the stored past luminance integrated signal. I do. As a result of this comparison, when it is determined that flicker has occurred, a gain control signal for correction is generated. The gain control signal is generated by the following processing, for example.

[0013] Flicker is generated with three fields as one cycle. Therefore, if the luminance integrated value corresponding to an arbitrary field n (n is an integer) is represented by Yf (n), the luminance integrated value Yf three fields before that held by the gain control signal generation unit 17 is stored.
(N-3) The luminance integral value Yf (n-
2) In addition, in order to control the gain of the video signal currently being processed by the luminance integral value Yf (n-1) of one field before read from the integrator 16 in the current field, the signal is output to the gain control unit 13. The gain control signal is calculated by (Equation 1).

[0014]

(Equation 1)

The vertical synchronizing signal generated by the synchronizing signal generation circuit 18, the luminance signal Y (n) input to the integrator 16, the luminance integration signal Yf (n) output from the integrator 16, and the gain control signal generation unit 17 FIG. 4 shows the timing of the gain control signal generated by. The gain control unit 13 uses the gain control signal generated by the gain control signal generation unit 17 as a luminance signal and a color signal generated by the YC separation processing unit 12 as input signals, and controls the gain thereof. FIG. 3 shows the relationship between the gain control signal and the output signal when the input signal is constant with respect to the gain control unit 13. A luminance signal and a color signal subjected to flicker correction are output from the gain control unit 13, a gamma correction (γ <1) process is performed by a gamma correction processing unit 14, and a camera output signal is output by an output signal generation unit 15. Generated.

When the output signal thus obtained is compared with an output signal obtained by a conventional fluorescent lamp flicker suppressing imaging apparatus, in the present embodiment, the output signal is generated based on the integrated value of the luminance signal before gamma correction. The gain control signal is used to control the gain of the luminance signal and the color signal before gamma correction, that is, non-linear processing is performed between the signal used to generate the gain control signal and the signal controlled by the gain control signal. With no intervening configuration, the accuracy of correction is significantly improved.

(Embodiment 2) Next, a fluorescent lamp flicker suppressing imaging apparatus according to a second embodiment of the present invention will be described with reference to the drawings. FIG. 2 is a block diagram illustrating a configuration of the fluorescent lamp flicker suppressing imaging apparatus according to the present embodiment. A video signal output from the image sensor 20 is converted into a digital video signal by the A / D converter 21. The integrator 24 integrates the digital video signal output by the A / D converter for each field with reference to the vertical synchronization signal generated by the synchronization signal generation circuit 26, and generates a digital video integration signal.

The gain control signal generating section 25 reads out a digital video integrated signal from the integrator 24 every field based on the vertical synchronizing signal generated by the synchronizing signal generating circuit 26 similarly to the integrator 24. The gain control signal generation unit 25 has a function of holding at least the digital video integration value read out in the past two fields, and the digital video integration signal currently read out from the integrator 24 and the held past digital video integration signal. The presence or absence of flicker is determined from the comparison.

If it is determined from the above comparison that flicker has occurred, a gain control signal for correction is generated. The gain control signal is generated, for example, by the same processing as described in the description of the first embodiment. The vertical synchronization signal generated by the synchronization signal generation circuit 26, the digital video signal V (n) input to the integrator 24, the digital video integration signal Vf (n) output from the integrator 24, and the gain control signal generation unit 25
FIG. 5 shows the timing of the gain control signal generated by.

The gain control unit 22 receives the digital video signal output from the A / D converter 21 as an input signal according to the gain control signal generated by the gain control signal generation unit 25,
Control its gain. The input / output characteristics of the gain control unit 22 are as follows:
This is the same as the characteristic of the gain control unit 13 of the first embodiment shown in FIG. The gain controller 22 outputs a digital video signal that has been subjected to flicker correction, and the digital signal processor 23 generates a camera output signal.

When the output signal thus obtained is compared with the output signal obtained by the conventional fluorescent lamp flicker suppressing imaging apparatus, in the present embodiment, based on the integrated value of the digital video signal signal before gamma correction, Similarly, the gain of the digital video signal before gamma correction is controlled using the generated gain control signal, that is, controlled by the signal used for generating the gain control signal and the gain control signal as in the first embodiment. A non-linear process does not intervene with the signal to be corrected, and the accuracy of correction is significantly improved. Further, since the signal whose gain is controlled by the gain control unit 22 is one system of the digital video signal, the configuration of the gain control unit 22 is simplified as compared with the above-described first embodiment of the present invention.

[0022]

As is clear from the above embodiments, according to the present invention, a non-linear processing is performed between a signal used for generating a gain control signal in flicker correction and a signal controlled by the gain control signal. Does not intervene, the accuracy of correction is remarkably improved, and its practical effect is very large.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a configuration of a fluorescent lamp flicker suppressing imaging apparatus according to a first embodiment of the present invention.

FIG. 2 is a block diagram showing a configuration of a fluorescent lamp flicker suppressing imaging apparatus according to a second embodiment of the present invention.

FIG. 3 is a diagram showing an input force characteristic of a gain control unit according to the embodiment of the present invention.

FIG. 4 is a diagram showing timings of internal signals according to the first embodiment of the present invention;

FIG. 5 is a diagram showing timings of internal signals in a second embodiment of the present invention.

FIG. 6 is a block diagram showing a configuration of a conventional fluorescent light flicker suppression imaging apparatus.

[Explanation of symbols]

 10, 20, 60 Image sensor 11, 21, 61 A / D converter 12 YC separation processing unit 13, 22, 61 Gain control unit 14 γ correction processing unit 15 Output signal generation unit 16, 24, 65 Integrator 17, 25, 66 Gain control signal generator 18, 26, 67 Synchronous signal generator 23, 63 Digital signal processor 64 D / A converter

Claims (2)

[Claims] A solid-state imaging device; A / D conversion means for converting an output signal of the solid-state imaging device into a digital signal; and luminance for separating a luminance signal and a chrominance signal from an output signal of the A / D conversion means. A signal color signal separating unit; an integrating unit that integrates a luminance signal output by the luminance signal color signal separating unit for each vertical synchronization period; and a luminance signal color signal separating unit that generates the luminance signal color signal from an integrated value output by the integrating unit. Gain control signal generation means for generating a gain control signal for controlling the gain of the luminance signal and the color signal to be generated; and the gain control signal generation means for generating the gain of the luminance signal and the color signal generated by the luminance signal color signal separation means. Gain control means for controlling the output signal of the gain control means, and gamma correction processing (γ
A fluorescent light flicker suppression imaging apparatus, comprising: a gamma correction unit that performs <1); and a camera output signal generation unit that generates a camera output signal from an output signal of the gamma correction unit. 2. A solid-state imaging device, A / D conversion means for converting an output signal of the solid-state imaging device into a digital signal, and integration means for integrating an output signal of the A / D conversion device for each vertical synchronization period. A gain control signal generating means for generating a gain control signal for controlling a gain of a digital signal output from the A / D conversion means from an integrated value output from the integration means; and a digital signal output from the A / D converter. Gain control means for controlling the gain of a signal by a gain control signal generated by the gain control signal generation means; digital processing for performing various processes specific to an imaging apparatus on an output signal of the gain control means to generate a camera output signal And a signal processing unit.