JPH10248018A - High voltage stabilizing circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide the high voltage stabilizing circuit by which a stable high voltage is obtained without being affected by fluctuation in a horizontal deflection frequency or a load. SOLUTION: A PLL circuit 4 generates a pulse synchronously with a blanking pulse V1 generated from a horizontal output transistor(TR) Q1. A high voltage error amplifier 6 detects a fluctuation component of a high voltage generated in a flyback transformer 1 to provide an output of a high voltage error detection signal. A delay circuit 5 delays the pulse outputted from the PLL circuit 4 in response to the high voltage error detection signal. A switch element Q2 is switched on/off by the pulse outputted from the delay circuit 5 to discharge a resonance capacitor C2 in resonance capacitors C1, C2 within a blanking period thereby varying the resonance capacitance.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a high-voltage stabilizing circuit used for a television receiver, a display device, and the like.

[0002]

2. Description of the Related Art In a horizontal deflection high voltage generating circuit in which a horizontal deflection circuit and a high voltage generating circuit are integrated, there is a technique for stabilizing a high voltage without changing a DC voltage serving as a power supply.
FIG. 3 is a circuit diagram showing an example of this, that is, an example of a conventional high-voltage stabilizing circuit. In FIG. 3, a horizontal output transistor Q1 includes a series circuit of resonance capacitors C1 and C2,
A damper diode D1, and a series circuit of a horizontal deflection coil L1 and an S-shaped correction capacitor Cs are connected in parallel. The primary winding of the flyback transformer 1 is connected to the horizontal output transistor Q1. The power supply + B is supplied to the primary winding of the flyback transformer 1.

Then, a horizontal deflection current is supplied to the horizontal deflection coil L1 by a known operation, and the flyback transformer 1 is turned on.
To generate a high voltage in the secondary winding. The high voltage generated in the secondary winding of the flyback transformer 1 is rectified by the rectifier diode D2.

In FIG. 3, resonance capacitors C1,
The variable impedance element 2 is connected to a connection point of C2 via a transistor Q3. By changing the variable impedance element 2, the equivalent resonance capacitance can be changed. As a result, the peak value of the retrace pulse generated at the collector of the horizontal output transistor Q1 can be controlled, and the high voltage generated on the secondary side of the flyback transformer 1 can be stabilized.

In the conventional high-voltage stabilizing circuit shown in FIG. 3, the response of the system is fast and suitable for stabilizing the high voltage.
Since the power consumption of the variable impedance element 2 is large, the variable range of the high voltage cannot actually be made large. As another conventional example for solving this problem, there is a high voltage stabilizing circuit shown in FIG. In FIG. 4, the same parts as those in FIG. 3 are denoted by the same reference numerals, and description thereof will be omitted.

In FIG. 4, resonance capacitors C1 and C2
Is connected to a parallel circuit of the switch 3 and the diode D3. When the switch 3 is turned off during the charging period of the resonance capacitor C1, the resonance capacitor C1 is turned off.
2 is also charged. At this time, a voltage proportional to the instantaneous value of the retrace current is generated at both ends of the resonance capacitor C2. By controlling this off timing, a voltage is generated at the collector of the horizontal output transistor Q1. The peak value of the retrace pulse can be controlled. Thereby, even in the high-voltage stabilizing circuit shown in FIG.
Can be stabilized at a high pressure generated on the secondary side of the device.

The high-voltage stabilizing circuit shown in FIG. 4 can be constructed at a low cost and can obtain good high-voltage stabilizing characteristics. However, since the control is performed within a very short time, that is, a blanking time, the control is not performed. Generating a signal requires a complicated circuit.

[0008]

In the conventional high-voltage stabilizing circuit shown in FIG. 4, a method for generating a control pulse for controlling the on / off of the switch 3 is to form a triangular wave by shaping a retrace pulse. Generally, a comparator (not shown) compares the triangular wave with an output of a high-voltage error amplifier (not shown), and performs PWM control using the comparison result. In this method, in order to control the phase of the control pulse within the retrace time, it is necessary to minimize the delay of the control pulse with respect to the rise of the retrace pulse. However, in reality, there is a delay due to the response speed of the comparator and the output impedance load of the switch 3, and the variable range of the high voltage increases as the horizontal deflection frequency increases, that is, as the retrace time decreases. You will be restricted.

On the other hand, a triangular wave having a phase suitable for generating a control pulse is generated by using a drive pulse input to the horizontal output transistor Q1 whose phase is ahead of the retrace pulse as a trigger and delaying this pulse. Can be obtained. However, the delay of the retrace pulse with respect to the drive pulse is caused by the storage time of the horizontal output transistor Q1, and the amount of time depends on the variation of elements, deflection current, drive current, high voltage load (beam current), etc. Since it fluctuates due to factors, even if a drive pulse input to the horizontal output transistor Q1 is used, the stabilization of the high voltage is affected to a considerable extent.

The present invention has been made in view of such a problem, and an object of the present invention is to provide a high-voltage stabilizing circuit capable of obtaining a stable high voltage without being affected by a horizontal deflection frequency, a load fluctuation, and the like. Aim.

[0011]

SUMMARY OF THE INVENTION The present invention provides an output transistor (Q) for solving the above-mentioned problems of the prior art.
1) and in a high-voltage stabilization circuit used in a high-voltage generation circuit including a plurality of resonance capacitors (C1, C2) and a flyback transformer (1) connected to the output transistor, a return generated in the output transistor. A PLL circuit (4) for generating a pulse synchronized with the pulse; and a high-voltage error amplifier (6) for detecting a high-voltage variation generated in the flyback transformer and outputting a high-voltage error detection signal.
A delay circuit (5) for delaying a pulse output from the PLL circuit according to the high-voltage error detection signal; and a delay circuit (5) for turning on and off the pulse output from the delay circuit.
A switch element (Q) for turning off any of the plurality of resonance capacitors within a retrace time to vary the resonance capacitance
2) is provided to provide a high-voltage stabilization circuit characterized by the above configuration.

[0012]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A high voltage stabilizing circuit according to the present invention will be described below with reference to the accompanying drawings. FIG. 1 is a circuit diagram showing one embodiment of the high-voltage stabilization circuit of the present invention, and FIG. 2 is a waveform diagram for explaining the operation of the high-voltage stabilization circuit of the present invention. In FIG. 1, the same parts as those in FIGS. 3 and 4 are denoted by the same reference numerals.

In FIG. 1, a horizontal output transistor Q1
, A series circuit of resonance capacitors C1 and C2, a damper diode D1, and a series circuit of a horizontal deflection coil L1 and an S-shaped correction capacitor Cs are connected in parallel. The primary winding of the flyback transformer 1 is connected to the horizontal output transistor Q1. The power supply + B is supplied to the primary winding of the flyback transformer 1. Then, by a known operation, a horizontal deflection current is caused to flow through the horizontal deflection coil L1 to generate a high voltage in the secondary winding of the flyback transformer 1. The high voltage generated in the secondary winding of the flyback transformer 1 is rectified by the rectifier diode D2.

Further, referring to FIG.
A parallel circuit of a switch element Q2, which is an FET, for example, and a diode D3 is connected to the connection point between the terminals 1 and C2. The horizontal output transistor Q1 has a capacitor C3
A series circuit of C4 is connected in parallel. Capacitor C
A resistor R1 is connected to the connection point of the resistors R3 and C4.
A Zener diode Dz is connected between one end of the IGBT and ground. Assuming that a retrace pulse generated at the collector of the horizontal output transistor Q1 is V1, the retrace pulse V1 is divided by the capacitors C3 and C4 and input to the PLL circuit 4.

The PLL circuit 4 includes a phase comparator 41, a low-pass filter (LPF) 42, and a voltage-controlled oscillator (VCO).
43 and a delay circuit 44, and generates a pulse synchronized with the retrace pulse V1 by a known operation. The output of the PLL circuit 4 is input to the delay circuit 5, delayed for a predetermined time, and input to the switch element Q2.

On the other hand, the output of the rectifier diode D2 is divided by a high-voltage divider composed of resistors R2 to R5, and the divided output between the resistors R4 and R5 is input to the inverting terminal of the high-voltage error amplifier 6. The reference voltage Es is input to the non-inverting terminal of the high-voltage error amplifier 6. The high-voltage error amplifier 6 detects a high-voltage fluctuation and outputs a high-voltage error detection signal. This high voltage error detection signal is input to the delay circuit 5, and the delay circuit 5 delays the output of the PLL circuit 4 according to the high voltage error detection signal.

In the high voltage stabilizing circuit of the present invention having such a configuration, assuming that the retrace pulse V1 has a waveform shown in FIG. 2A, the delay circuit 44 in the PLL circuit 4 operates for a predetermined time in the negative direction. Delay by Td1 (that is, a fixed time Td1
2), the output of VCO 43 is
The waveform shown in FIG. This cancels the delay caused by the gate drive of the switching element Q2. Then, the delay circuit 5 is connected to the VCO 4 shown in FIG.
3 is delayed by the delay time Td2 to obtain a waveform shown in FIG. This delay time Td2 is varied by the output of the high-voltage error amplifier 6 as described above.

As a result, the gate voltage Vg of the switching element Q2 becomes as shown in FIG. 2D, and the pulse voltage V2 shown in FIG. 2E is applied to the connection point between the resonance capacitors C1 and C2. Will be.

By the above operation, the timing at which the switching element Q2 is turned off can be controlled to an arbitrary phase in the charging period of the resonance capacitors C1 and C2 which is the high voltage control range. The peak value of the retrace pulse V1 is determined by the resonance capacitor C
2, the charge amount is proportional to the instantaneous value of the retrace current when the switching element Q2 is turned off. Therefore, by controlling the delay amount of the delay circuit 5 by the high voltage error detection signal, the high voltage generated on the secondary side of the flyback transformer 1 can be stabilized.

In the high voltage stabilizing circuit of the present invention,
Since the control pulse of the switching element Q2 (the output pulse of the delay circuit 5) is a stable pulse locked to the retrace pulse V1, the phase does not change due to a factor other than the high-voltage fluctuation. A stable high pressure can be obtained without being affected by frequency, load fluctuation, and the like.
Therefore, the high-voltage stabilization circuit of the present invention is suitable for use in a horizontal deflection high-voltage generation circuit having a variable horizontal deflection frequency, particularly a horizontal deflection high-voltage generation circuit having a short retrace time. In this embodiment, the horizontal deflection high-voltage generation circuit in which the horizontal deflection circuit and the high-voltage generation circuit are integrated has been described. However, the present invention can also be applied to a horizontal deflection / high-voltage generation separated high-voltage generation circuit. What you can do is obvious. In this case, it is called a high voltage output transistor instead of the horizontal output transistor.

[0021]

As described in detail above, the high-voltage stabilizing circuit of the present invention comprises a PLL circuit for generating a pulse synchronized with a retrace pulse generated on an output transistor, and a high-voltage fluctuation generated on a flyback transformer. A high-voltage error amplifier that detects a minute and outputs a high-voltage error detection signal; a delay circuit that delays a pulse output from the PLL circuit according to the high-voltage error detection signal; and a pulse that is turned on / off by the pulse output from the delay circuit. And a switch element for turning off any of the plurality of resonance capacitors within the retrace time to vary the resonance capacitance, so that it is stable without being affected by horizontal deflection frequency or load fluctuation. High pressure can be obtained.

[Brief description of the drawings]

FIG. 1 is a circuit diagram showing one embodiment of the present invention.

FIG. 2 is a waveform chart for explaining the operation of the present invention.

FIG. 3 is a circuit diagram showing a conventional example.

FIG. 4 is a circuit diagram showing another conventional example.

[Description of Signs] 1 Flyback transformer 4 PLL circuit 5 Delay circuit 6 High voltage error amplifier C1, C2 Resonant capacitor C3, C4 Capacitor Cs S-shaped correction capacitor D1 Damper diode D2 Rectifier diode D3 Diode Dz Zener diode Es Reference voltage L1 Horizontal deflection Coil Q1 Horizontal output transistor Q2 Switch element R1 to R5 Resistance

Claims (1)

[Claims] 1. A high voltage stabilizing circuit used in a high voltage generating circuit comprising an output transistor, a plurality of resonance capacitors connected to the output transistor, and a flyback transformer, wherein the high voltage stabilizing circuit is synchronized with a retrace pulse generated in the output transistor. A PLL circuit for generating a detected pulse, a high-voltage error amplifier for detecting a high-voltage change generated in the flyback transformer and outputting a high-voltage error detection signal, and a pulse output from the PLL circuit for detecting the high-voltage error. A delay circuit that delays according to a signal, and a switch element that is turned on and off by a pulse output from the delay circuit, and that turns off any of the plurality of resonance capacitors within a retrace time to vary the resonance capacitance. A high voltage stabilization circuit characterized by being provided and configured.