JPH10271172A - Frequency discrimination circuit - Google Patents

Abstract

(57) [Problem] To provide a frequency discriminator suitable for operation in a frequency band lower than about 100 KHz with a simple circuit that can be miniaturized by semiconductor integration without using an inductor or a delay element. How to configure has not yet been found. Provided is a frequency discriminator suitable for operation at such a low frequency and configured with a simple circuit. SOLUTION: In demodulation of an FM signal or an FSK signal, an output pulse of a pulse generator is started at a rising edge of a limiter output pulse, and the pulse length is set to a length substantially equal to a half cycle of a center frequency. In advance, a pulse signal proportional to the time difference between the two pulse lengths is created by the fall of this pulse and the fall of the limiter output pulse, and the pulse signal is smoothed to obtain a demodulated output. It is characterized by.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to frequency modulation (Freq
The present invention relates to a demodulation circuit for demodulating a signal, that is, a circuit configuration technology of a frequency discrimination circuit (frequency detector).

[0002]

2. Description of the Related Art Conventionally, various frequency discriminating circuits have been used. The typical ones are as follows. 1) Detuning type and phase type by tuning circuit 2) Differential Peak detection type, Quadrature type 3) Delay detection type 4) PLD (Phase Locked Detector) type 5) Zero Crossing type 6) Cycle Counting type 7) 2-axis detection Type 8) Signal period determination type. 1) to 4) and 7) are mainly used in radio receivers and the like at frequencies higher than about several hundred KHz,
5) and 6) are often used at relatively low frequencies such as voice bands.

[0003] 1) and 2) use a tuning circuit, so when the carrier frequency is low, the tuning elements such as L and C become large. 3)
Also, when the carrier frequency is low, the delay element becomes large. The method 4) requires a VCO (Voltage Controlled Oscillator) and a phase detector, so it may be implemented by a DSP (Digital Signal Processor) or an analog LSI, but otherwise the circuit scale becomes large. 5) MODEM (Modulator
and Demodulator) is inefficient unless the frequency is as low as the voice band, and 6) counts the number of cycles in the symbol. There is a disadvantage that must be kept running. 7) is 2 for the center frequency
Since the axis component must be detected and the phase difference between the two must be compared, the demodulation circuit for the FSK (Frequency Shift Keying) signal can be configured relatively easily. However, in order to demodulate the FM signal, two differentiating systems are required. Since a circuit and a multiplication circuit are required, the circuit scale is greatly increased. 8) has a method "FSK signal demodulation circuit" proposed by the present inventors, which compares the cycle of the received signal with the cycle of the reference signal, determines the difference between them, and demodulates the signal. Although simple, each system has its own advantages and disadvantages, such as not being suitable for demodulation of FM signals as described below.

[0004]

Comparing each of the above methods, it is suitable for operation in a frequency band lower than about 100 KHz, does not require an inductor or a delay element, and is about a few small-scale ICs (integrated circuits). There is no simple frequency discriminator that can be configured with.

[0005] It goes without saying that the frequency discriminator is of course for demodulating the FM signal. But F
Even in the case of the SK signal, if the modulation index becomes small, the movement of the instantaneous frequency becomes analog, so that a frequency discriminator having a linear characteristic is required.

[0006] Therefore, if the frequency discriminator as intended can be realized, the FM
This is effective in demodulating a signal or an FSK signal having a small modulation index, and the FSK signal demodulation circuit of the voice-mode line modem can be further downsized and a more efficient circuit configuration can be achieved. Therefore, it is an object to find a frequency discriminator which can operate at a frequency lower than the frequency of about 100 KHz and has a simple circuit configuration.

[0007]

According to the frequency discriminating circuit of the present invention, in demodulation of an FM signal or an FSK signal, an output pulse of a pulse generator rises at the rise of a limiter output pulse, and the pulse length is set to approximately the center frequency. The pulse signal is set to have a length equal to one-half cycle, and a pulse signal proportional to the time difference between the two pulse lengths is created by the fall of this pulse and the fall of the limiter output pulse, and smoothed. Thus, a demodulated output is obtained.

[0008]

DESCRIPTION OF THE PREFERRED EMBODIMENTS For ease of explanation, the present invention is based on an "FSK signal demodulation circuit" proposed by the present inventors.

FIGS. 1 and 2 show two types of FS proposed in the prior application.
FIG. 3A is a circuit diagram of a K signal demodulation circuit, and FIG. 3B is a waveform diagram for explaining the operation of the circuit.

In FIG. 1, 1 is an input terminal of an FSK signal, 2 is a limiter (amplitude limiter), 3 is a pulse generator,
4 is a flip-flop circuit and 9 is an output terminal.

In the FSK signal, the information “0” has a frequency f ₀ (60 KHz) and the information “1” has a frequency (3 KHz).
0 KHz).

The operation of the circuit of FIG. 1A will be described with reference to the waveform diagram of FIG. (b) H and L at the right end of the figure indicate logic levels of High and Low. Pulse generator 3 rises at the rising edge of the limiter output waveform (to be put into a rectangular pulse waveform), the pulse length, f ₀ = 60 KHz, if the f ₁ = 30 KHz, for each half of the two The median is set to 12.5 μs. The flip-flop circuit 4 is driven by the output waveform of the limiter and the output waveform of the pulse generator 3, and the flip-flop circuit 4 is driven by the limiter 2 at the falling edge of the output waveform 3 'of the pulse generator 3 as shown in FIG. Of the output waveform 2 '(data: D). f ₁
In this case, since the waveform 2 'is still at the H level, this level is latched and the output of the flip-flop circuit 4 becomes (b)
As shown at 4 'in FIG. When f ₀ ,
2 ", the level is already latched, and this level is latched, and the output of the flip-flop circuit 4 becomes L level as shown in FIG. That is, since it is determined whether the signal cycle is earlier or later than the reference cycle, the FSK signal is demodulated.

Next, the case of FIG. 2 will be described. FIG.
In (a), the flip-flop circuit 4 outputs RS (reset /
Set) a flip-flop whose output is added to a comparator 10 through a low-pass filter 7 and compared with a reference voltage of a reference voltage generator 11 to be a demodulated output. The limiter 2 and the pulse generator 3 are the same as those in FIG. The flip-flop circuit 4 is shown in FIG.
As shown in (b), the output signal 3 falls at the falling edge of the output waveform 3 'of the pulse generator 3 and rises at the falling edge of the output waveform 2' of the limiter 2.

Accordingly, the output waveform of the flip-flop circuit 4 when f ₁ comes is a pulse train with a large duty factor as shown at 4 ′, and the output waveform of the flip-flop circuit 4 when f ₀ comes as shown in the 4 ", the pulse train duty factor is small. since these waveforms are smoothed by the low pass filter 5 in the following, when f ₁ is come as shown in one-dot chain line in FIG 5 ' to produce a high voltage near the high level, when came f _0, as shown in one-dot chain line in FIG. 5 ", it produces a low voltage near the low level. The smoothed output of the low-pass filter 5 is compared by the comparator 6 with reference to a voltage corresponding to the center of both the H and L levels, and becomes a demodulated output.

As can be seen from the above description, the output voltage of the low-pass filter depends on f ₁ and f ₀ of the FSK signal.
Since the level becomes approximately H level or L level, the FSK signal can be demodulated.

The demodulation characteristics (input signal frequency vs. output voltage characteristics) of the respective demodulation circuits of FIGS. 1 and 2 are as shown in FIGS. 3 (a) and 3 (b), respectively.

It is clear that the demodulation characteristics cannot be used for demodulation of the FM signal because none of these characteristics has a linear demodulation characteristic. However, since the circuit configuration of both is extremely simple, (b)
If it is possible to eliminate the jump at the center frequency in the figure and improve the upper and lower characteristics so as to be connected linearly, a circuit capable of demodulating the FM signal can be constructed.

This improvement can be achieved by adding the logically inverted signal in FIG. 3A (shown by the dotted line in FIG. 3C) to the signal having the characteristic (b). By this operation, a linear demodulation characteristic is obtained as shown by the solid line in FIG.

[0019]

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a block diagram showing an embodiment of the present invention in which this improvement is provided.

FIG. 4 is a circuit diagram for this explanation.

In FIG. 4, reference numeral 1 denotes an FM signal input terminal;
2 is a limiter (amplitude limiter), 3 is a pulse generator, 4 is an RS flip-flop circuit, 5 is a D-type flip-flop circuit, 6 is an adder, 7 is a low-pass filter, and the dotted frame of 8 is 6 and 7. The synthesis circuit 9 is an output terminal.

In the circuit shown in FIG. 4, the operations up to the flip-flop circuits 4 and 5 are exactly the same as those shown in FIGS. 1 and 2, and a description thereof will be omitted.

The outputs of the flip-flop circuits 4 and 5 are added by an adder 6. At this time, the added output is as shown in FIG.
The inverted output is taken out from the flip-flop circuit 5 so as to become a straight line shown in FIG. The output of the adder is supplied to an output terminal 9 through a low-pass filter 7. As a result, as is clear from the above description, a frequency discriminator having a linear characteristic is obtained.

For the adder 6 and the low-pass filter 7, in most cases, a simple circuit with a resistor and a capacitor as shown in FIG. 5 will be sufficient.

As is clear from the above description, the frequency accuracy of the present demodulation circuit depends on the accuracy of the pulse generator. Therefore, we will consider this accuracy slightly.

In the above example, the pulse length of the pulse generator 3 is 1 / 60K = 16.7 μs and 1 / 120K =
12.5 μs, which is the center of 8.3 μs. In this case, there is a 4.17 μs margin before and after, which is 12.
There is a margin of ± 33.3% for 5 μs. Therefore, in order to divert most of this margin toward noise, it is desirable that the accuracy of the determination circuit be reduced to about 1/10. From this point of view, even if it is not a high-precision pulse generator, one-shot multivibrator
But it will be within a few percent accuracy. But,
f ₀ and f ₁ are quite close, eg, 40 KHz and 4
In the case of 5 KHz, it must be set to 11.8 μs, which is the center between 12.5 μs and 11.1 μs.
The margin is ± 6%. Therefore, in this case, a more accurate pulse generator is needed,
For this purpose, for example, an IC driven by a crystal oscillator
Since it can be generated by a frequency divider, it can be realized with a circuit size not much different from a one-shot multivibrator, and a limiter, a pulse generator, and two flip-flops can be integrated and integrated. Is also possible.

[0027]

As described in detail above, according to the present invention, the FM signal can be efficiently and faithfully demodulated with a simple circuit using a few commercially available general-purpose ICs.
A simple demodulation circuit with a simple structure can be configured in receiving a MODEM for a voice-grade line or infrared data.

[Brief description of the drawings]

FIG. 1 is a circuit configuration diagram and a waveform diagram based on which the present invention is based.

FIG. 2 is a circuit configuration diagram and waveform diagrams based on the present invention.

FIG. 3 is a demodulation characteristic diagram of the circuits of FIGS. 1 and 2;

FIG. 4 is a circuit diagram showing an embodiment of the present invention.

5 is a simplified circuit of the adder and the low-pass filter of FIG.

[Explanation of symbols]

 Reference Signs List 1 FM signal input terminal 2 Limiter 3 Pulse generator 4 Flip-flop circuit 5 Flip-flop circuit 6 Adder 7 Low-pass filter 8 Adder + Low-pass filter 9 Output terminal

Claims (2)

[Claims] In the demodulation of an FM signal or an FSK signal, an output pulse of a pulse generator rises or falls at the rise or fall of a limiter output pulse, and the pulse length is set to approximately one half of the center frequency. A pulse signal proportional to the time difference between the two pulse lengths is created by the fall or rise of this pulse and the fall or rise of the limiter output pulse, and smoothed. A frequency discrimination circuit configured to obtain a demodulated output. 2. In the demodulation of an FM signal or an FSK signal, an output pulse of a pulse generator rises or falls at the rise or fall of a limiter output pulse, and the pulse length is set to approximately a half cycle of the center frequency. And the state of the limiter output pulse is latched at the fall or rise of this pulse, and the fall or rise of the pulse generator output pulse and the fall or rise of the limiter output signal. To generate a pulse signal having a duty factor corresponding to the time difference between the two pulse lengths, add this pulse and an inverted signal of the latch signal, and smooth this to form a linear signal. Circuit that is configured to obtain the demodulation characteristics of Wave number discrimination circuit.