JPH10271818A - DC / DC converter device - Google Patents

Abstract

(57) Abstract: To provide a DC / DC converter device having a function of protecting a semiconductor switching element from overcurrent. A first diode connected to an anode terminal at a connection point between an output terminal of the semiconductor switching element and the resistor, a base terminal connected to a cathode terminal of the first diode, and an emitter terminal connected to the semiconductor. An NPN transistor 18 connected to the ground of an on / off driving circuit of the switching element;
A base terminal is connected to the collector terminal of the PN transistor, and the collector terminal is connected to the base terminal of the NPN transistor. A PNP transistor 19 is connected to the ON / OFF input terminal of the semiconductor switching element. The terminal is a second diode 20 connected to the collector terminal of the NPN transistor.
And a second DC power supply 22 having a positive electrode connected to the emitter terminal of the PNP transistor.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a DC switching device having a function of protecting a semiconductor switching element from overcurrent.
/ DC converter device.

[0002]

2. Description of the Related Art A DC / DC converter, which converts a DC power supply voltage on an input side to a predetermined DC output voltage by controlling on / off of a semiconductor switching element, has been widely used as a power supply circuit for electronic equipment. Have been. The conventional DC / DC converter shown in FIG. 9 includes a DC power supply 1 and a power MOS as a main switching element.
FET 2, a pulse transformer (primary side) 3, a pulse transformer (secondary side) 4, a drain current detecting resistor 5,
A resistor 31 and a capacitor 32 for the RC filter for detecting the drain current, a reference voltage 28 for detecting the overcurrent, a comparator 29 for detecting the overcurrent, a driving circuit 6 for the power MOSFET 2, a resistor 8 for driving the gate of the power MOSFET 2, A secondary rectifier diode 9 for a pulse transformer,
A smoothing capacitor 10, resistors 11 and 12 for detecting a rectified voltage on the secondary side of the pulse transformer, and an error voltage calculation output unit 13
And a reference voltage 27 for controlling a rectified voltage on the secondary side of the pulse transformer, a PWM modulator 15, a flip-flop circuit 30 for latching an overcurrent detection, and a gate output circuit 16.

[0003] In this DC / DC converter device, the fluctuation of the voltage between the terminals of the smoothing capacitor 10 which is the secondary side output voltage is determined by the connection point voltage between the secondary side output voltage detecting resistors 11 and 12 and the secondary side rectified voltage. It is detected by comparing the difference voltage with the control reference voltage 27, and the power MO
The power MOSFET 2 is driven by the driving circuit 6 of the SFET.
The ON period of the power MOSFET 2 is controlled by changing the time width of the ON / OFF control output signal output to the gate terminal of the capacitor 10 to stabilize the secondary output voltage which is the voltage between the terminals of the capacitor 10. I have. When the FET drain current exceeds the set value, the voltage between the terminals of the drain current detection resistor 5 is determined by changing the voltage value after passing through the RC filter circuit including the resistor 31 and the capacitor 32 to the overcurrent detection reference voltage. 28, an overcurrent detection comparator 29 performs comparison detection, outputs an off signal to the gate terminal of the power MOSFET 2 through the overcurrent detection latch flip-flop circuit 30, and performs overcurrent detection latch by the flip-flop circuit. The off signal output to the gate terminal of the power MOSFET 2 is held for only one cycle time until the overcurrent detection latch is reset by the next output from the PWM modulator 15 to prevent the FET drain current from becoming an overcurrent. doing.

[0004]

However, in FIG. 9, which is the conventional configuration, the secondary output power supply, which is the voltage between the terminals of the capacitor 10, is short-circuited, and the power detected when the voltage between the terminals of the capacitor 10 decreases is detected. The MOSFET drive circuit section 6 increases the width of the ON output signal output to the gate terminal of the power MOSFET 2 to rapidly increase the FET drain current. When the FET drain current exceeds a set value, the overcurrent starts from that point. Power MOSFET by detection
Since the overcurrent detection comparator 29, the overcurrent detection latch flip-flop circuit 30, and the like are interposed until the drive circuit section 6 outputs the OFF signal, a time delay occurs, and this time delay is further increased. The more it becomes, the longer the time delay from the start of the output of the off signal to the time when the gate MOSFET of the power MOSFET 2 is extracted and the power MOSFET is actually turned off is increased. Therefore, as shown in FIG. Will continue.

Further, after the power MOSFET is turned off, the overcurrent detection latch is reset by the next output from the PWM modulator 15 and the amount of magnetic flux in the pulse transformer decreases during the off period until the power MOSFET is turned on again. During the on-period of the power MOSFET, the amount of magnetic flux in the pulse transformer that increases due to the long on-period is larger, so that when the next power MOSFET is turned on, the drain current at the time of the previous on-start is further increased. Starting from a large drain current value, the drain current value immediately before turning off also becomes a larger value than the drain current value immediately before the previous turning off. Even though the overcurrent protection is working, the power MOSFET
Therefore, there is a problem that the power MOSFET cannot be protected from overcurrent of the power MOSFET due to a short circuit of the secondary power supply output.

Accordingly, the present invention solves the above-mentioned conventional problems, and when the value of the current flowing through the semiconductor switching element exceeds a set value, the semiconductor switching element is instantaneously turned off and cut off and held, whereby the secondary switching is performed. It is an object of the present invention to provide a DC / DC converter device capable of suppressing a current value flowing through a semiconductor switching element and protecting the semiconductor switching element even when a short-circuit of a side power supply output occurs.

[0007]

SUMMARY OF THE INVENTION In order to solve the above problems, the present invention provides a first DC power supply, a pulse transformer having a primary side input terminal connected to the positive side of the first DC power supply, A semiconductor switching element having an output terminal connected to the other terminal of the primary side input, and an output terminal connected to an on / off input terminal of the semiconductor switching element, and a ground connected to the negative side of the first DC power supply. Connected,
An on / off drive circuit section of the semiconductor switching element, and a resistor connected between the other output terminal of the semiconductor switching element and a ground of the on / off drive circuit section of the semiconductor switching element. DC /
In a DC converter device, a first diode having an anode terminal connected at a connection point between the output terminal of the semiconductor switching element and the resistor, a base terminal connected to a cathode terminal of the first diode, and an emitter terminal connected to the semiconductor. An NPN transistor connected to the ground of an on / off drive circuit of the switching element;
A base terminal is connected to the collector terminal of the NPN transistor, the collector terminal is a PNP transistor connected to the base terminal of the NPN transistor, and an anode terminal is connected to the on / off input terminal of the semiconductor switching element, and the cathode is The terminal includes a second diode connected to the collector terminal of the NPN transistor, and a second DC power supply having a positive electrode connected to the emitter terminal of the PNP transistor. In the second DC power supply, an emitter terminal of the PNP transistor is connected to an output terminal of an on / off driving circuit of the semiconductor switching element. Further, the second DC power supply is formed by rectifying an output voltage of the secondary winding of the pulse transformer during flyback.

[0008]

According to the present invention, when a current flows through a semiconductor switching element, a resistor connected between an output terminal of the semiconductor switching element and a ground of an on / off drive circuit section of the semiconductor switching element. A voltage corresponding to this current value is generated between the terminals.
Then, when the secondary output power supply is short-circuited, the current (hereinafter, referred to as the "current value") that this resistor terminal voltage value reaches the sum of the base-emitter voltage value of the NPN transistor and the forward voltage value of the first diode. Is the overcurrent detection level)
Flows through the semiconductor switching element, a part of the current flowing through the semiconductor switching element flows into the NPN transistor as a base current to turn on the NPN transistor. As a result, the second diode is turned on, and the voltage value at the input terminal of the semiconductor switching element is reduced. Therefore, the ON signal output from the ON / OFF drive circuit section of the semiconductor switching element to the input terminal of the semiconductor switching element is as follows. Irrespective of this, the input terminal of the semiconductor switching element is instantaneously turned off. Further, when the NPN transistor is turned on, the PNP transistor is also turned on. Since the collector current of the PNP transistor becomes the base current of the NPN transistor as it is, the semiconductor switching element is turned off and the current flowing through the semiconductor switching element is reduced. Therefore, even if the supply of the base current to the NPN transistor is stopped, the PNP transistor can maintain the ON operation, and the input terminal of the semiconductor switching element is also in the OFF input voltage application holding state.

This holding state continues until the second DC power supply voltage whose positive terminal is connected to the emitter terminal of the PNP transistor disappears, so that the amount of magnetic flux in the transformer is sufficiently reduced by the second DC power supply voltage. If it can be maintained for as long as possible, the current flowing through the semiconductor switching element can be suppressed, and the semiconductor switching element can be protected from overcurrent.

According to a second aspect of the present invention, the DC / DC converter device according to the first aspect further comprises a PNP converter.
A second DC power supply having a positive electrode connected to the emitter terminal of the transistor is replaced by connecting the emitter terminal of the PNP transistor to an output terminal of an on / off drive circuit of the semiconductor switching element. The NPN transistor is turned on by the current reaching the overcurrent detection level, the second diode is turned on, the voltage value of the input terminal of the semiconductor switching element is reduced, and the input terminal of the semiconductor switching element is turned off. When this happens, the output signal from the ON / OFF drive circuit section of the semiconductor switching element to the input terminal of the semiconductor switching element is an ON signal output, and this output voltage directly substitutes for the second DC power supply. When the NPN transistor is turned on, the PNP transistor is also turned on. Since the collector current of the PNP transistor becomes the base current of the NPN transistor as it is, the PNP transistor is turned on even if the semiconductor switching element is turned off and the base current is not supplied from the current flowing through the semiconductor switching element to the NPN transistor. The operation can be held, and therefore, the input terminal of the semiconductor switching element is also in the off-input voltage application holding state.

This holding state is reset by the output of an off signal from the on / off drive circuit of the semiconductor switching element to the input terminal of the semiconductor switching element. The semiconductor switching element is not turned on, and even if it is turned on, the off operation of the semiconductor switching element is merely repeated in the same manner as described above. Therefore, the off-hold state is the on / off state of the semiconductor switching element.
One cycle time is maintained until the next ON signal is output from the OFF drive circuit section. In this case, since the on-time of the semiconductor switching element is short and the increase in the amount of magnetic flux in the transformer is small, the amount of magnetic flux in the transformer can be sufficiently reduced by the off-hold time for one cycle, so that the current flowing through the semiconductor switching element can be reliably reduced. Thus, the semiconductor switching element can be protected from overcurrent.

According to the third aspect of the present invention, the DC / DC converter device according to the first aspect further comprises the PNP converter.
A second DC power supply having a positive electrode connected to the emitter terminal of the type transistor; a secondary terminal connected to a ground side of an on / off driving circuit of the semiconductor switching element in the transformer; And a third diode having an anode terminal connected to the other terminal on the secondary side, and a cathode terminal of the third diode connected to an emitter terminal of the PNP transistor for replacement. The NPN transistor is turned on by the current reaching the overcurrent detection level, the second diode is turned on, the voltage value of the input terminal of the semiconductor switching element is reduced, and the input terminal of the semiconductor switching element is instantly turned off. When the input voltage is applied,
Since the cathode terminal voltage of the third diode directly substitutes for the second DC power supply, the PNP transistor is also turned on by turning on the NPN transistor, and the collector current of the PNP transistor is directly changed to the NPN transistor. Therefore, even if the semiconductor switching element is turned off and the base current is not supplied from the current flowing through the semiconductor switching element to the NPN transistor to the NPN transistor, the PNP transistor can maintain the ON operation. The input terminal of the element is also in the off input voltage application holding state.

This holding state is maintained until the cathode terminal voltage of the third diode disappears, in other words, until the amount of magnetic flux in the transformer becomes zero, so that the current flowing through the semiconductor switching element can be reliably suppressed. Therefore, the semiconductor switching element can be protected from overcurrent. (Embodiment) Hereinafter, a first embodiment of the present invention will be described with reference to FIG. In FIG. 1, 1 is a first DC power supply, 2 is a power MOSFET as a main switching element, 3 is a pulse transformer (primary side), 4 is a pulse transformer (secondary side), 5 is a drain current detecting resistor, 6 is a power MOS
On / off drive circuit section of FET2, 7 and 8 are gate drive resistors of power MOSFET 2, 9 is a secondary rectifier diode of pulse transformer, 10 is a smoothing capacitor, and 11 and 12 are secondary rectifier voltages of pulse transformer. A detection resistor, 13 is an error voltage calculation output unit, 14 is a reference voltage for controlling a secondary side rectified voltage of a pulse transformer, 15 is a PWM modulation unit, 16 is a gate output circuit unit, 17 is a first diode, and 18 is an NPN transistor. , 19 is PNP
Transistor, 20 a second diode, 21 a PNP
A collector current limiting resistor of the transistor 19, 22 is a second DC power supply, 23 is a capacitor, 24 is a charging current limiting resistor of the capacitor 23, 25 is a second DC power supply rectifying diode, and 26 is a pulse transformer ( Secondary-side auxiliary winding).

Next, the operation will be described. When the terminals of the smoothing capacitor 10 that becomes the secondary side output voltage are short-circuited, the secondary side output voltage becomes zero, and the ON / OFF drive circuit unit 6 of the power MOSFET 2 detects this drop in the secondary side output voltage. To increase the gate drive ON signal pulse width from the gate output circuit section 16 to the maximum value.
The drain current of the SFET rapidly increases, and the voltage between the terminals of the drain current detecting resistor 5 increases in accordance with the increase in the drain current. Thus, the drain current detecting resistor 5
When the terminal-to-terminal voltage value reaches the sum of the base-emitter voltage value of the NPN transistor 18 and the forward voltage value of the first diode 17, a part of the drain current flowing through the power MOSFET 2 becomes as shown in FIG. The NPN transistor 18 flows into the base of the NPN transistor 18 and
Will be turned on. This NPN transistor 18
When the power MOSFET 2 is turned on, the second diode 20 becomes conductive as shown in FIG. 2, and the gate charge stored in the power MOSFET 2 is extracted through the gate driving resistor 8 of the power MOSFET 2 to turn off the power MOSFET 2. When the power MOSFET 2 is turned off, the supply of the base current to the NPN transistor 18 from the drain current of the power MOSFET 2 is stopped, but as shown in FIG.
When the N transistor 18 is turned on, the PNP transistor 1
9 is generated and the PNP transistor 19
Turns on and its collector current is directly changed to the base current to the NPN transistor 18, so that both the NPN transistor 18 and the PNP transistor 19 can maintain the on state. Therefore, power MOSFET2
The power M is clamped to the gate voltage of
The off state of the OSFET 2 can be maintained. The off state of the power MOSFET 2 at this time is maintained until the voltage value between the terminals of the capacitor 23 which is the voltage value of the second DC power supply unit 22 disappears.

As shown in FIG. 4, the voltage between the terminals of the capacitor 23 utilizes the voltage generated between the pulse transformers 26 (secondary auxiliary windings) when the power MOSFET 2 is turned on. 24, and a current flowing through the second DC power supply rectifier diode 25 is generated, and the capacitor 23 is charged by the generated current. The voltage between the terminals of the capacitor 23 is discharged as the collector current of the PNP transistor 19 via the resistor 21 by the ON-holding operation of the PNP transistor 19 by detecting the overcurrent of the drain current. When this discharge is completed, the voltage between the terminals of the capacitor 23 disappears, so that both the NPN transistor 18 and the PNP transistor 19 cannot maintain their ON states, and both of them become OFF state, and the second diode 20 changes to the non-conductive state. M
The OSFET2 gate voltage is released from the state clamped at the low voltage, and the power MOSFET 2 is released from the off state. The power MOSFET 2 is turned on again until the drain current reaches the overcurrent detection level. Here, the holding time is set to be long enough to sufficiently reduce the amount of magnetic flux in the pulse transformer, so that the drain current value at the start of on does not exceed the drain current value at the start of the previous on, and the power is maintained. The drain current of the MOSFET 2 can be reliably suppressed, so that the power MOSFET 2 can be protected from an overcurrent caused by a short circuit of the secondary output power supply.

Further, since the voltage between the terminals of the capacitor 23 which has been lost due to the discharge has been recovered by charging during the next ON period of the power MOSFET 2, the above-described operation is repeated thereafter, and accordingly, the drain of the power MOSFET 2 is drained. The current can be reliably suppressed and the power MO
The SFET 2 can be protected from an overcurrent caused by a short circuit of the secondary output power supply.

Hereinafter, a second embodiment of the present invention will be described with reference to FIG. In FIG. 5, reference numeral 1 denotes a first DC power supply;
Are power MOSFETs as main switching elements, 3
Is a pulse transformer (primary side), and 4 is a pulse transformer (2
5) A drain current detection resistor, 6 is a power MO
On / off drive circuit section of SFET 2, 7 and 8 are gate drive resistors of power MOSFET 2, 9 is a pulse transformer secondary side rectifier diode, 10 is a smoothing capacitor, 11 and 12 are pulse transformer secondary side rectified voltages A detection resistor, 13 is an error voltage calculation output unit, 14 is a reference voltage for controlling a secondary side rectified voltage of a pulse transformer, 15 is a PWM modulation unit, 16 is a gate output circuit unit, 17 is a first diode, and 18 is an NPN transistor. , 19 is PNP
Transistor, 20 a second diode, 21 a PNP
This is a collector current limiting resistor of the transistor 19.

Smoothing capacitor 1 for secondary output voltage
When the terminals 0 are short-circuited, the second diode 20 is turned on by turning on the NPN transistor 18, and the power stored in the gate of the power MOSFET 2 is extracted via the gate driving resistor 8 of the power MOSFET 2 to turn off the power MOSFET 2. The operation performed so far is the same as in the first embodiment.

When the power MOSFET 2 is turned off, the supply of the base current from the drain current of the power MOSFET 2 to the NPN transistor 18 is stopped. However, a gate drive ON signal is output from the ON / OFF drive circuit section 6 of the power MOSFET 2 thereafter. Since the output voltage is connected to the emitter of the PNP transistor 19 via the collector current limiting resistor 21 to replace the second DC power supply in the first embodiment, the output voltage of the NPN transistor 18 When turned on, the base current of the PNP transistor 19 is generated and the PNP transistor 19 is turned on, and its collector current is directly changed to the base current to the NPN transistor 18, so that both the NPN transistor 18 and the PNP transistor 19 can keep their on state. It will be, and therefore power MOS
The gate voltage of the FET2 can be clamped to a low voltage, and the power MOSFET 2 can be kept off as it is.

This holding state is reset when the gate drive output signal from the on / off drive circuit section 6 of the power MOSFET 2 to the power MOSFET 2 is turned off. MOSFET 2 does not turn on and therefore power M
The off state of the OSFET 2 is maintained for one cycle time until the next on signal output from the on / off driving circuit unit 6 of the power MOSFET 2 is generated. This second
In the case of the embodiment of FIG. 6, since the on-time of the power MOSFET 2 is short and the increase in the amount of magnetic flux in the transformer during this period is small,
(a) As shown in (a), the amount of magnetic flux in the transformer that has increased during the ON period can be reduced during the OFF period of the one cycle, so that the drain current of the power MOSFET 2 can be reliably suppressed. It is possible to protect against overcurrent generated by short circuit of the side output power supply.

Hereinafter, a third embodiment of the present invention will be described with reference to FIG. 7, reference numeral 1 denotes a first DC power supply;
Are power MOSFETs as main switching elements, 3
Is a pulse transformer (primary side), and 4 is a pulse transformer (2
5) A drain current detection resistor, 6 is a power MO
On / off drive circuit section of SFET 2, 7 and 8 are gate drive resistors of power MOSFET 2, 9 is a pulse transformer secondary side rectifier diode, 10 is a smoothing capacitor, 11 and 12 are pulse transformer secondary side rectified voltages A detection resistor, 13 is an error voltage calculation output unit, 14 is a reference voltage for controlling a secondary side rectified voltage of a pulse transformer, 15 is a PWM modulation unit, 16 is a gate output circuit unit, 17 is a first diode, and 18 is an NPN transistor. , 19 is PNP
Transistor, 20 a second diode, 21 a PNP
A collector current limiting resistor of the transistor 19, 33 is a pulse transformer (secondary auxiliary winding), 34 is a third diode, and 35 is a capacitor.

Smoothing capacitor 1 for secondary output voltage
When the terminals 0 are short-circuited, the second diode 20 is turned on by turning on the NPN transistor 18, and the power stored in the gate of the power MOSFET 2 is extracted via the gate driving resistor 8 of the power MOSFET 2 to turn off the power MOSFET 2. The operation performed so far is the same as in the first embodiment. Power M
When the OSFET 2 is turned off, the supply of the base current from the drain current of the power MOSFET 2 to the NPN transistor 18 is stopped. However, as shown in FIG.
When the OSFET 2 is turned off, a positive voltage is generated between the terminals of the pulse transformer 33 (secondary auxiliary winding), and this positive voltage is applied to the third diode 34 and the collector current limiting resistor 2.
1 is connected to the emitter of the PNP transistor 19 via the PNP transistor 19, thereby replacing the second DC power supply in the first embodiment. When the NPN transistor 18 is turned on, the base current of the PNP transistor 19 is generated. The PNP transistor 19 is turned on, and its collector current is directly changed to the base current to the NPN transistor 18, so that both the NPN transistor 18 and the PNP transistor 19 can maintain the on state.
Therefore, the gate voltage of the power MOSFET 2 can be clamped to a low voltage and the off state of the power MOSFET 2 can be maintained as it is. The second DC power supply is thus produced by rectifying the output voltage at the time of flyback of the secondary winding of the pulse transformer.

This holding state is maintained until the amount of magnetic flux in the pulse transformer becomes zero. Therefore, the next power MO
When the SFET 2 is turned on, the amount of magnetic flux in the pulse transformer is always zero, so that the drain current always starts from zero. Therefore, the drain current of the power MOSFET 2 can be reliably suppressed, and the power MOSFE
T2 can be protected from an overcurrent generated by a short circuit of the secondary output power supply.

[0024]

As described above, according to the present invention, DC
In the / DC converter device, a first DC power supply, a transformer having a primary input terminal connected to the positive electrode of the first DC power supply, and an output terminal connected to the other terminal of the primary input of the transformer. The connected semiconductor switching element, the output terminal is connected to the ON / OFF input terminal of the semiconductor switching element, and the ground is connected to the negative side of the first DC power supply.
An off-drive circuit section, a resistor connected between the other output terminal of the semiconductor switching element and the ground of the on / off drive circuit section of the semiconductor switching element, and an output terminal of the semiconductor switching element. A first diode connected to an anode terminal at a connection point with the resistor; a base terminal connected to a cathode terminal of the first diode; and an emitter terminal connected to the ground of an on / off driving circuit of the semiconductor switching element. A connected NPN transistor, and a P terminal connected to the base terminal of the collector terminal of the NPN transistor and the collector terminal connected to the base terminal of the NPN transistor.
An NP transistor, an anode terminal connected to the ON / OFF input terminal of the semiconductor switching element, a cathode terminal connected to a second diode connected to the collector terminal of the NPN transistor, and an emitter terminal of the PNP transistor. A second direct-current power supply connected to the positive electrode side, and when the secondary-side output power supply is short-circuited and the current flowing through the semiconductor switching element exceeds a set value, the semiconductor switching element is instantaneously turned off. In addition, since the off state can be maintained, the current flowing through the semiconductor switching element can be reliably suppressed, and thus the semiconductor switching element can be protected from an overcurrent caused by a short circuit of the secondary output power supply. There is.

[Brief description of the drawings]

FIG. 1 is a configuration diagram of a DC / DC converter device according to a first embodiment of the present invention.

FIG. 2 is an operation explanatory diagram for turning off a power MOSFET instantaneously at the time of overcurrent in the first embodiment;

FIG. 3 is an explanatory diagram of an operation for holding an off state of a power MOSFET.

FIG. 4 is a configuration diagram of a second DC power supply.

FIG. 5 is a configuration diagram of a DC / DC converter device according to a second embodiment of the present invention.

FIG. 6 illustrates a change in magnetic flux amount in a pulse transformer when a power MOSFET is turned on / off.

FIG. 7 is a configuration diagram of a DC / DC converter device according to a third embodiment of the present invention.

FIG. 8 is a configuration diagram relating to a power supply for holding an off state of a power MOSFET according to a third embodiment.

FIG. 9 is a configuration diagram of a DC / DC converter device in a conventional example.

[Description of Signs] 1 First DC power supply 2 Switching element (power MOSFET) 3 Primary side of pulse transformer 4 Secondary side of pulse transformer 5 Drain current detection resistor 6 On / off drive circuit section of switching element 2 7, 8 Resistance for gate drive of switching element 2, 9, 17, 20, 25, 34 Diode 10 Smoothing capacitor 11, 12 Resistance for voltage detection 13 Error voltage calculation output unit 14, 27 Reference voltage 15 PWM modulation unit 16 Gate output Circuit section 18 NPN transistor 19 PNP transistor 21 Collector current limiting resistor 22 of PNP transistor 19 Second DC power supply 23, 35 Capacitor 24 Charging current limiting resistor 26, 33 Secondary auxiliary winding of pulse transformer 28 Overcurrent detection Reference voltage 29 Overcurrent detection comparator 30 Lip-flop 31 resistor 32 capacitor filter filters

Claims (3)

[Claims] A first DC power supply, a pulse transformer having a primary input terminal connected to a positive electrode of the first DC power supply, and an output terminal connected to the other primary input terminal of the transformer. On / off driving of the semiconductor switching element, wherein the connected semiconductor switching element and an output terminal are connected to an on / off input terminal of the semiconductor switching element and a ground is connected to a negative side of the first DC power supply. A DC / DC converter device comprising: a circuit unit for use; and a resistor connected between the other output terminal of the semiconductor switching element and a ground of an on / off drive circuit unit of the semiconductor switching element. A first diode having an anode terminal connected at a connection point between the output terminal of the switching element and the resistor, and a cathode of the first diode; The emitter terminal is connected to the base terminal to the mode pin is connected to ground on-off drive circuit section of the semiconductor switching element N
A PN transistor, a PNP connected to a base terminal of the NPN transistor and a collector terminal connected to a base terminal of the NPN transistor;
Transistor, an anode terminal connected to the on / off input terminal of the semiconductor switching element, a cathode terminal connected to the collector terminal of the NPN transistor, a positive electrode connected to the emitter terminal of the PNP transistor. DC / DC converter device, comprising: a second DC power supply connected on the side. 2. The DC power supply according to claim 1, wherein in the second DC power supply, an emitter terminal of the PNP transistor is connected to an output terminal of an on / off driving circuit section of the semiconductor switching element. / DC converter device 3. The DC / DC converter device according to claim 1, wherein the second DC power supply is formed by rectifying an output voltage at the time of flyback of a secondary winding of the pulse transformer.