JPH10275957A - Optical semiconductor chip carrier - Google Patents

Abstract

(57) [Summary] [Object] To obtain an optical semiconductor chip carrier with improved high-frequency characteristics that is easy to mount. An optical semiconductor chip carrier includes a conductive base substrate and a dielectric substrate. On the dielectric substrate 41, a signal line 251, a ground line 252,
Terminating resistor 253, plated through hole 256
Are formed. Semiconductor laser 151 and optical modulator 152
The integrated light source chip 15 made of
1, and the bias chip capacitor 3 is also soldered on the base substrate. The connection between the semiconductor laser and the chip capacitor, the connection between the optical modulator and the signal line, etc. are made by bonding wires 751 to 753. [Effect] By reducing the inductance and the parasitic capacitance caused by the chip carrier and the number of bonding wire connection points, it is possible to increase the frequency and reduce the number of mounting steps.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a light source suitable for use in an optical module or the like constituted by incorporating an optical semiconductor chip such as an optical semiconductor laser or an optical modulator and components such as a chip capacitor together in a package. It relates to a semiconductor chip carrier.

[0002]

2. Description of the Related Art In general, an optical module includes an optical semiconductor chip carrier on which an optical semiconductor chip such as a semiconductor laser diode (hereinafter referred to as a semiconductor LD) or an optical modulator and a chip capacitor are mounted by soldering. , An input signal terminal, a ground terminal, an optical output fiber connector terminal, and the like. An optical semiconductor chip such as a semiconductor LD is different from a silicon semiconductor chip such as a semiconductor memory or a microprocessor in that it is necessary to not only inspect electric signal characteristics but also measure the characteristics of optical output to perform non-defective product selection.

However, in order to measure the characteristics of the light output, it is necessary to adjust the optical axis of the emitted light to an external measurement system. For this reason, in the measurement using a probe on the optical semiconductor chip, it is not possible to accurately measure the light output pattern and the light output characteristics including the high-frequency characteristics. Therefore, usually, chip selection of an optical semiconductor chip to be incorporated in an optical module is performed as follows.

[0004] For example, in the case of a semiconductor LD chip, in a state where a plurality of semiconductor LD chips are cut out from a wafer in a horizontal line, first, pulse drive selection by probe measurement inspection is performed. In this case, a rough determination of the quality of the chip is made based on a measurement item that does not require strict optical axis alignment with the external measurement system, that is, measurement of current-light output characteristics and oscillation wavelength. Here, the reason why the selection is performed by the pulse drive is that the measurement cannot be performed by the DC drive due to the problem of heat radiation. Next, the optical semiconductor chip carrier to which the non-defective chips and the capacitors and the like selected by the pulse driving selection are soldered is mounted on an evaluation stem, and CW (Continuous Wave) driving selection is performed. The mounting on the evaluation stem will be described later. In this CW drive selection, an external measurement system is connected to the evaluation stem to measure current-light output characteristics, oscillation wavelength, light emission pattern, high-frequency characteristics, and the like, and judge pass / fail. After the optical semiconductor chip carrier on which the semiconductor LD chip is mounted is removed from the evaluation stem, only the optical semiconductor chip carrier on which a good chip that satisfies the required characteristic specifications is finally incorporated into the package and the optical module and Become.

Here, mounting of an optical semiconductor chip carrier on which an integrated light source chip 11 in which a semiconductor LD and an optical modulator are integrated on an evaluation stem will be described with reference to FIG. FIG. 1 is a view schematically showing a conventional optical semiconductor chip carrier on which an integrated light source chip, a chip capacitor and the like are mounted, and FIG. 1A is a plan view of the optical semiconductor chip carrier attached to an evaluation stem. (b) is a cross-sectional view of a portion taken along line AA ′ shown in the plan view.

In FIGS. 1A and 1B, reference numeral 1
Numeral 0 indicates a high-frequency characteristic evaluation stem made of a metal conductor which is also used as a ground line. On this evaluation stem 10, microstrip lines 2a, which are high-frequency transmission lines, are provided.
The dielectric substrate 4 on which 2b and 2c are formed is fixed by soldering or the like. Further, a terminating resistor 5 for high frequency matching is soldered between the strip lines 2b and 2c on the dielectric substrate 4. Further, a plated through hole 26 reaching the evaluation stem 10 is formed in the microstrip line 2c, and is electrically connected to the evaluation stem 10. Further, the integrated light source chip 11 and the chip capacitor 3 are soldered to an optical semiconductor chip carrier 21 made of a dielectric material such as ceramic provided with a bonding pad portion 22. Between the electrodes and the integrated light source chip 1
1 and the bonding pad section 22 are electrically connected by bonding wires 711 and 712, respectively. The optical semiconductor chip carrier 21 is soldered to the evaluation stem 10 having the fixed dielectric substrate 4. Further, the back surface side electrode of the chip capacitor 3 is electrically connected to the ground potential evaluation stem 10 by a plurality of bonding wires 715, and the bonding pad portion 22 and the microstrip lines 2a and 2b are respectively connected to the bonding wires 713 and 713. 714 are electrically connected.

[0007] Thus, the optical semiconductor chip carrier 2
1 is mounted on the evaluation stem 10 and the above-described CW
Drive sorting. After the measurement in the CW drive selection, the bonding wires 713, 714, and 715 connected to the optical semiconductor chip carrier 21 and the evaluation stem side are separated, and then the optical semiconductor chip carrier fixed to the evaluation stem 10 by soldering. Remove 21. Similarly, an optical semiconductor chip carrier on which another integrated light source chip is mounted is attached to an evaluation stem, and CW drive sorting is performed. By repeating this, the quality of the integrated light source chip is determined and selected.

[0008] Regarding this related technology, for example, the Transactions of the Institute of Electronics, Information and Communication Engineers, CI, Vol. J77-C-
I, No. 5, pp. 268-275 (May 1994
), But details of the optical semiconductor chip carrier constituting the optical module are not disclosed.

[0009]

In recent years, optical semiconductor chip carriers on which optical semiconductor chips are mounted have been required to be smaller and faster in mounting optical semiconductor chips. However, as described above, conventionally, the optical semiconductor chip 11 and the chip capacitor 3 are each soldered to an optical semiconductor chip carrier 21 made of a dielectric material, and the optical semiconductor chip carrier 21 is mounted on a dielectric substrate having a microstrip line. 4 was mounted on the stem 10 for evaluation of high-frequency characteristics to which it was fixed. Further, the terminating resistor 5 for high-frequency matching is soldered on the dielectric substrate 4 of the evaluation stem as an external part of the optical semiconductor chip carrier. Further, bonding wires 711,
712, 713, 714, and 715.
For this reason, the inductance component of the bonding wire has affected the characteristics.

FIGS. 3 (b) and 3 (c) show the results of numerical calculation of high frequency characteristics using the equivalent circuit of FIG. 2 for the mounting state on the evaluation stem 10 shown in FIG. Here, the parameters of the equivalent circuit shown in FIG. 2 are as follows. Z0 is the impedance of the microstrip line of the evaluation stem 4 at 50Ω, L1 is the inductance of the bonding wire 713 of 0.3 nH, L2 is the inductance of the bonding wire 714 of 0.3 nH,
Lp is the inductance of the bonding pad 22 of 0.1 nH, L4 is the inductance of the bonding wire 715 of 0.1 nH, and L3 is the bonding wire 71.
2, an inductance of 0.9 nH, Cc is a capacitance of the bonding pad portion 0.3 of 0.3 pF, Cg is a capacitance of the optical semiconductor chip carrier 21 of 0.3 pF, and Rin is a semiconductor L.
The internal resistance of the optical modulator section of the D chip 11 is 5Ω, Cm is the capacitance of the optical modulator section of the semiconductor LD chip 11 is 0.4 pF,
Rt is the resistance of the terminating resistor 5 and is 50Ω. Since the semiconductor LD section is driven by a direct current and can be ignored in the analysis of high-frequency characteristics, only the modulator section is shown in an equivalent circuit in FIG. Therefore, the inductance component of the bonding wire 711 is omitted.

As a result of calculation using these numerical values, FIG.
As shown in FIG. 3A, peaking occurs in the vicinity of 7 GHz in the frequency response characteristics, and further, as shown in FIG.

Further, in the mounting work on the evaluation stem 10, the optical semiconductor chip 11 and the chip capacitor 3 are soldered to the optical semiconductor chip carrier 21, the external terminating resistor 5 is soldered to the dielectric substrate 4, Further, soldering the optical semiconductor chip carrier 21 to the evaluation stem 10,
In addition, there are operations such as wire bonding and the like, and there has been a problem that a time is required for a mounting process on the evaluation stem. After the bonding wire is cut off from the evaluation stem 10 and then mounted on the optical module, the same operation is required again in the mounting step, and there is a drawback that time is required. If there are many connections and cuts of the bonding wires, they may be damaged during the operation and mechanical stress may increase, which may be one cause of lowering the yield.

An object of the present invention is to provide an optical semiconductor chip carrier having improved high frequency characteristics.
It is another object of the present invention to provide an optical semiconductor chip carrier capable of reducing the number of components to be soldered and shortening a mounting time.

[0014]

The deterioration of the high-frequency characteristics of the conventional optical semiconductor chip carrier 21 shown in FIG. 1 is caused by the resonance between the inductance of the bonding wire and the parasitic capacitance of the optical semiconductor chip 11. As a countermeasure, it is effective to reduce the inductance by shortening the bonding wire length.

Therefore, in order to solve the above-mentioned problem,
The optical semiconductor chip carrier according to the present invention is configured such that a high-frequency transmission line is formed up to the vicinity of the optical semiconductor chip as shown in FIG. 6, for example, so that the bonding wire length can be reduced. That is, the optical semiconductor chip carrier according to the present invention includes a conductive base substrate having high thermal conductivity, and a dielectric substrate fixed to a part of the base substrate. At least a high-frequency transmission line serving as a signal line, a ground line having a through-hole portion including a conductive material electrically connectable to a base substrate, and a resistor for achieving high-frequency matching with an input signal of the high-frequency transmission line are formed. An optical semiconductor chip is fixed at a position adjacent to the dielectric substrate on the base substrate so that the high-frequency transmission line and the optical semiconductor chip can be connected by a bonding wire in the shortest distance. .

[0016]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A preferred embodiment of an optical semiconductor chip carrier according to the present invention is a conductive base substrate made of Si or CuW having high thermal conductivity, and a solder on a part of the base substrate. An optical semiconductor chip carrier is composed of a dielectric substrate fixed by attachment and the like, and on this dielectric substrate, a high-frequency transmission line formed by a microstrip line serving as an input signal line and electrically connectable to a base substrate. A through-hole portion containing a conductive material, for example, a grounding line having a plated-through-hole portion and a 50Ω termination resistor for high-frequency matching, that is, impedance matching with an input signal of a high-frequency transmission line, are formed at least. An optical semiconductor chip is fixed at a position adjacent to a dielectric substrate on a base substrate, and a high-frequency transmission line and an optical semiconductor chip The bonding wire is an optical semiconductor chip carrier configured as to be able to connect with the shortest distance.

As described above, the optical semiconductor chip carrier comprises the base substrate using a conductive material and the dielectric substrate provided with the high-frequency transmission line and the resistor for impedance matching, and the optical semiconductor chip is mounted on the base substrate. It can be fixed adjacent to the high-frequency transmission line. Thereby, the length of the bonding wire to the high-frequency transmission line can be reduced. At the same time, the parasitic capacitance and the number of wire bonding locations can be reduced, so that a higher frequency and a reduced number of mounting steps can be achieved.

[0018]

Next, a more specific embodiment of the optical semiconductor chip carrier according to the present invention will be described in detail with reference to the accompanying drawings.

<Embodiment 1> FIG. 6 is a view showing an embodiment of an optical semiconductor chip carrier according to the present invention. FIG. 6 (a) shows an optical semiconductor chip and a chip capacitor mounted on the optical semiconductor chip carrier. FIG. 3B is a plan view of the state, and FIG. Optical semiconductor chip carrier 6 of this embodiment
0 is composed of a base substrate 25 and a dielectric substrate 41. FIG. 6 does not show the evaluation stem.

In this embodiment, as an optical semiconductor chip, an integrated light source chip 15 in which an optical modulator 152 and a semiconductor LD 151 are integrated is mounted on a base substrate 25 at a position closest to the dielectric substrate 41. The integrated light source chip 15 and the chip capacitor 3 for the bias terminal are connected to the base substrate 2.
5 is soldered. Note that the integrated light source chip 15 used in this embodiment has a capacity of several Gbits / sec to several tens Gbits / sec.
It is a light source applicable to long-distance, large-capacity optical transmission systems that require high-speed modulation of seconds. This integrated light source chip 1
Numeral 5 is a device for applying a DC bias to the semiconductor LD 151 so as to emit light at all times, applying a high-frequency signal to the optical modulator 151 to take out the output light of the semiconductor LD modulated at high speed, and using it for optical fiber transmission. In this case, the chip capacitor 3 is provided to stabilize the DC bias by bypassing the high frequency component. Such an integrated light source chip 15 is suitable for long-distance transmission, in which the spread of the spectrum of emitted light is suppressed as compared with a configuration in which the semiconductor LD is directly turned on / off by a drive current and transmitted through an optical fiber.

The optical semiconductor chip carrier 60 of the present embodiment
Uses a conductive substrate having high thermal conductivity as the base substrate 25, for example, a Si substrate or a CuW substrate. Therefore, the potential of the base substrate 25 becomes the ground potential when measured by soldering to the evaluation stem. On the dielectric substrate 41 fixed to the base substrate 25, a signal line 251 and a ground line 252 serving as high-frequency lines are formed on the same plane by microstrip lines, and the signal line 251 and the ground line 252 are asymmetric. It is formed to have an asymmetric coplanar electrode structure arranged. Further, a termination resistor 253 of 50Ω is provided on the dielectric substrate 41 by a thin film resistor or a chip resistor. The ground line 252 is provided with a through hole 256 whose inside reaching the base substrate 25 is plated, whereby the ground line 252 is electrically connected to the base substrate 25.

Then, between the signal line 251 and the modulator 152 of the integrated light source chip, between the terminating resistor 253 and the modulator 152 of the integrated light source chip, and between the semiconductor LD 151 and the chip capacitor 3 of the integrated light source chip. Are electrically connected to each other by bonding wires 751, 752, and 753.

In the optical semiconductor chip carrier 60 of the present embodiment having the above-described structure, instead of using the bonding pad portion 22 as in the conventional example, the optical semiconductor chip carrier 60 extends to the vicinity of the integrated light source chip 15 on the optical semiconductor chip carrier 60. , A high-frequency transmission line (that is, a signal line 251) is formed to shorten the bonding wire length. Also, the base substrate 2
For 5, a conductive material such as Si or CuW is used to reduce the inductance and the parasitic capacitance caused by the optical semiconductor chip carrier 60 to a negligible level. The deterioration of the high-frequency characteristics of the conventional chip carrier 21 is caused by resonance between the inductance of the bonding wire and the parasitic capacitance of the optical semiconductor chip. Therefore, the optical semiconductor chip carrier 60 of this embodiment reduces the inductance by shortening the bonding wire length as a measure against this.

FIG. 7 shows an equivalent circuit of the optical semiconductor chip carrier 60 of this embodiment. However, in the equivalent circuit shown in FIG. 7, the DC bias system is omitted. In FIG. 7, Z0 ′ is the impedance of the signal line 251;
L1 'is the inductance of the bonding wire 751,
L2 ′ is the inductance of the bonding wire 752,
Rin 'is the internal resistance of the modulator section 152 of the integrated light source chip 15, Rt' is the resistance value of the termination resistor 253, and Cm 'is the capacitance of the modulator section 152 of the integrated light source chip 15. FIGS. 8A and 8B show the results obtained by numerical calculation of the frequency response characteristics and the high-frequency reflection characteristics using this equivalent circuit. Here, the values of the above parameters used for the calculation are Z0 ′ = 50Ω and L1 ′ = 0.6n
H, L2 ′ = 0.7 nH, Rin ′ = 10Ω, Cm ′ =
0.4 pF.

Compared to FIG. 2 showing the calculation results when the conventional optical semiconductor chip carrier 21 is used, the optical semiconductor chip carrier 60 of this embodiment has a frequency response characteristic of about 4 GHz and a high frequency reflection characteristic of about 4 GHz. It is improved by 15 dB. In the conventional example, the terminating resistor provided on the side of the evaluation stem is incorporated in the optical semiconductor chip carrier 60 in this embodiment, and a conductive material is used for the base substrate 25. Can be omitted, and the number of times of wire bonding can be reduced, so that the mounting time on the evaluation stem can be shortened. Similarly, as the number of wire bonding decreases, the optical semiconductor chip carrier 6
The mounting time when 0 is removed from the evaluation stem and incorporated into the optical module is also reduced.

Optical semiconductor chip carrier 60 of this embodiment
Is suitable when the signal line 251 and the ground line 252 have an asymmetric coplanar electrode structure and an integrated light source chip having a large emission angle is used. This is because even if the signal line on the evaluation stem and the signal line 251 of the optical semiconductor chip carrier are arranged at the shortest distance and bonded, the emitted light will not be blocked. For example, as shown in FIG. 5, the electrode pattern formed on the dielectric substrate 42 fixed on the base substrate 25 has a symmetrical coplanar electrode structure in which the ground lines 252a and 252b are formed so as to sandwich the signal line 252 in parallel. In order to shorten the bonding wire length, the mounting position of the integrated light source chip 14 is soldered to the nearest position on the base substrate 25 of the optical semiconductor chip carrier 61 at the back. Integrated light source chip 14
Has a light emission pattern with a large light emission angle, a part of the emitted light 6 is blocked by the chip carrier 61.
FIG. 5 is a plan view of an optical semiconductor chip carrier according to the present invention, and the same components as those in FIG. 6 are denoted by the same reference numerals. Therefore, the optical semiconductor chip carrier 61 shown in FIG. 5 is suitable for mounting an integrated light source chip having an emission pattern with a small light emission angle.

<Embodiment 2> FIG. 4 is a view showing another embodiment of the optical semiconductor chip carrier according to the present invention. FIG. 4A shows an optical semiconductor chip, a chip capacitor and the like as an optical semiconductor chip carrier. FIG. 4B is a plan view of the state after mounting and mounting on the evaluation stem, and FIG. 4B is a cross-sectional view taken along line BB ′.

Optical semiconductor chip carrier 70 of this embodiment
Is composed of a conductive base substrate 23 and a dielectric substrate 42 made of ceramic or the like. The dielectric substrate 42 includes
A signal line 231 composed of a microstrip line,
Ground lines 232, 23
4 form a symmetric coplanar electrode structure. Further, the bonding pad 235 and the ground line 23
4, a terminating resistor 233 formed of a thin film resistor is formed. The ground lines 232 and 234 have plated-through holes 23 reaching the base substrate 23.
6 are formed and electrically connected to the base substrate 23. The signal line 231 is a signal line 401 formed on the dielectric substrate 4 fixed to the evaluation stem 10.
Are electrically connected to each other by a bonding wire 261 at the shortest distance. A chip capacitor 3 and an optical modulator chip 13 having a Mach-Zehnder optical modulator as an optical semiconductor chip are provided on a base substrate 23 on a dielectric substrate 42.
And the signal line 231 and the optical modulator chip 1
3, the bonding electrode portion 235 and the optical modulator chip 13
Between the optical modulator chip 13 and the chip capacitor 3 are bonding wires 262, 263, 26, respectively.
4 are electrically connected. Also, the base substrate 2
The thickness of the portion of the base substrate 23 to which the dielectric substrate 42 is to be soldered so that the surface of the dielectric substrate 42 on the substrate 3, the surface of the optical modulator chip 13, and the surface of the chip capacitor 3 substantially match each other. It's a little thinner. This allows
Bonding becomes easier, and the length of the bonding wire can be shortened by that much, so that the inductance is reduced.

As in the previous embodiment, the optical semiconductor chip carrier 70 of this embodiment has a built-in terminating resistor and uses a conductive material for the base substrate 23 so that the optical semiconductor chip carrier can be soldered to the evaluation stem. The number of times of wire bonding and the number of wire bondings can be reduced, and the mounting time can be reduced. Furthermore, since the inductance and the parasitic capacitance caused by the optical semiconductor chip carrier are reduced to a negligible level, the high-frequency characteristics can be improved in the same manner as in the above embodiment. In addition, the symmetrical coplanar electrode structure reduces noise applied to the signal line 231.

<Embodiment 3> FIG. 9 is a view showing another embodiment of an optical semiconductor chip carrier according to the present invention. FIG. 9A shows an optical semiconductor chip carrier including an optical semiconductor chip and a chip capacitor. (B) is a side view thereof.

The optical semiconductor chip carrier 62 of the present embodiment
Is composed of a conductive base substrate 27 and a dielectric substrate 43. On the dielectric substrate 43, a signal line 271 and a ground line 272, and a terminating resistor 273 are integrated. Accordingly, the bonding wires 752 between the electrodes of the light modulator 152 and the terminating resistor 273 of the integrated light source chip 15 shown in FIG. 6 can be omitted. That is, in the present embodiment, in the equivalent circuit diagram shown in FIG. 7, the inductance L2 ′ caused by the bonding wire 752 can be ignored, and a higher frequency and a reduction in the number of wire bondings can be achieved.

Since the ground line 272 is provided with a plurality of plated-through holes 256, the ground line 272 is connected to the evaluation stem when the optical semiconductor chip carrier 62 is mounted on the evaluation stem. Is electrically connected to Further, between the semiconductor LD 151 and the chip capacitor 3 and between the signal line 251 and the optical modulator 15.
2, the bonding wires 7 are provided in the same manner as in FIG.
They are connected by 53 and 751.

Although the preferred embodiment of the present invention has been described above, it goes without saying that various design changes can be made without departing from the spirit of the present invention. For example, in the embodiment, the optical semiconductor chip and the chip capacitor are mounted on the optical semiconductor chip carrier. However, it is needless to say that the present invention can be applied to a case where only the semiconductor LD chip is mounted.

[0034]

According to the present invention, an optical semiconductor chip carrier is made of a base substrate using a conductive material having high thermal conductivity such as Si or CuW, and a dielectric substrate provided with signal lines, ground lines and terminating resistors. By reducing the inductance and the parasitic capacitance caused by the optical semiconductor chip carrier and the number of bonding wire connection points, the frequency can be increased and the man-hour for mounting on the evaluation stem and the man-hour for mounting on the optical module can be reduced. can do.

[Brief description of the drawings]

FIG. 1 is a view showing a state in which a conventional optical semiconductor chip carrier is mounted on an evaluation stem, (a) is a plan view,
(B) is a sectional view taken along line AA 'shown in the plan view.

FIG. 2 is an equivalent circuit diagram of the optical semiconductor chip carrier shown in FIG.

3A and 3B are diagrams showing the results of calculating high-frequency characteristics of a conventional optical semiconductor chip carrier using the equivalent circuit shown in FIG. 2, wherein FIG. 3A shows frequency characteristics and FIG. 3B shows reflection characteristics.

FIGS. 4A and 4B are views showing an embodiment in which the optical semiconductor chip carrier according to the present invention is mounted on an evaluation stem, wherein FIG. 4A is a plan view and FIG. 4B is a side view.

FIG. 5 is a view showing another embodiment of the optical semiconductor chip carrier according to the present invention, and is a plan view schematically showing a state in which a light emitting element having a large emission angle is mounted.

FIGS. 6A and 6B are diagrams showing another embodiment of the optical semiconductor chip carrier according to the present invention, in which an integrated light source and a chip capacitor are mounted, wherein FIG. 6A is a plan view and FIG. 6B is a side view.

FIG. 7 is an equivalent circuit diagram of the optical semiconductor chip carrier shown in FIG.

8A and 8B are diagrams showing the results of calculating the high-frequency characteristics of the optical semiconductor chip carrier of the present invention using the equivalent circuit shown in FIG. 7, wherein FIG. 8A shows the frequency characteristics and FIG. 8B shows the reflection characteristics.

9A and 9B are diagrams showing an integrated semiconductor light source and a chip capacitor according to still another embodiment of the optical semiconductor chip carrier according to the present invention, wherein FIG. 9A is a plan view and FIG. 9B is a side view.

[Explanation of symbols]

2a, 2b, 2c: microstrip line, 3: chip capacitor, 4, 41, 42: dielectric substrate, 6: emitted light, 10: evaluation stem, 11, 14, 15: integrated light source chip, 13: light Modulator chip, 21 optical semiconductor chip carrier, 22, 235 bonding pad part, 2
3, 25, 27 ... base substrate, 26, 236, 256 ...
Through-hole, 60, 61, 62, 70: optical semiconductor chip carrier; 151, semiconductor LD; 152, optical modulator;
231, 251, 252, 271, 401 ... signal line, 232, 234, 252a, 252b, 272 ... ground line, 233, 253, 273 ... termination resistor, 261
264: bonding wire; 711 to 715: bonding wire.

 ──────────────────────────────────────────────────続 き Continuing on the front page (72) Masahiro Aoki Inventor, Central Research Laboratory, Hitachi, Ltd., 1-280, Kokubunji, Tokyo Prefecture Central Research Laboratory

Claims (8)

[Claims] 1. A high-frequency transmission line comprising an electrically conductive base substrate having high thermal conductivity, and a dielectric substrate fixed to a part of the base substrate, wherein a high-frequency transmission line serving as an input signal line is provided on the dielectric substrate. And a ground line having a through-hole portion containing a conductive material electrically connectable to the base substrate, and at least a resistor for achieving high-frequency matching with an input signal of the high-frequency transmission line. An optical semiconductor chip carrier, wherein an optical semiconductor chip is fixed at a position adjacent to an upper dielectric substrate so that the high-frequency transmission line and the optical semiconductor chip can be connected by bonding wires. 2. The optical semiconductor chip carrier according to claim 1, wherein the conductive material of said base substrate is Si or CuW. 3. The high-frequency transmission line and the ground line,
2. The optical semiconductor chip carrier according to claim 1, which is formed by a microstrip line. 4. The optical semiconductor chip carrier according to claim 3, wherein said high-frequency transmission line is disposed adjacent to both sides thereof so as to be sandwiched by said ground line. 5. The optical semiconductor chip carrier according to claim 3, wherein the high-frequency transmission line has the ground line adjacent to the optical semiconductor chip mounted on the base substrate, at a position opposite to the outgoing light side. 6. The optical semiconductor chip carrier according to claim 1, wherein the resistor for achieving the high-frequency matching is a terminating resistor provided between the high-frequency transmission line and a ground line. 7. The optical semiconductor chip carrier according to claim 1, wherein said optical semiconductor chip is an integrated light source in which a semiconductor laser diode and an optical modulator are integrated. 8. The base substrate has a thickness at a portion to which the dielectric substrate is fixed so that the surface of the dielectric substrate and the surface of the optical semiconductor chip have substantially the same height. 2. The optical semiconductor chip carrier according to claim 1, wherein the optical semiconductor chip carrier is formed thinner than a thickness of a mounting portion.