JPH1064703A - Multilayer chip electronic components - Google Patents

Abstract

(57) [Problem] To increase the capacitance of a capacitive varistor, a multilayer capacitor type is disclosed, but the capacitance is not sufficient, and after a steep noise is applied. However, there is a problem that the rate of change of the electrical characteristics of the above is large. SOLUTION: A plurality of internal electrodes 12 are formed parallel to each other in a dielectric ceramic molded body 11 containing a SrTiO ₃ material as a main component, and the internal electrodes 12 are formed on opposing side surfaces.
The pair of external electrodes 13 are alternately connected, and the outer edge of the tip of the internal electrode 12 has a smooth curved shape, or the internal electrode has a shape having no apex of 90 ° or less at the tip.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a laminated chip type electronic component, and more particularly, to a laminated component having a current-voltage nonlinearity which is mounted as a noise absorbing component in electric / electronic circuits such as communication equipment, office / audio equipment and the like. The present invention relates to a chip-type electronic component.

[0002]

2. Description of the Related Art In a grain boundary insulating semiconductor porcelain, a relatively low-melting metal oxide or the like is thermally diffused into the crystal grain boundaries of a ceramic sintered body (ceramic) made into a semiconductor, and an oxide insulating layer is spread on the crystal grain boundaries. The grain boundary insulated semiconductor porcelain obtained by insulating the grain boundary portion is used as a capacitive element. The grain boundary insulating layer of the semiconductor porcelain generally has a thickness of several nm.
Therefore, the capacitance element made of the grain boundary insulating semiconductor ceramic has an advantage that the capacitance (C) is large.

In particular, strontium titanate (SrTi
A semiconductor ceramic element containing O ₃ ) as a main component is easy to have a grain boundary insulating structure due to thermal diffusion of the metal oxide or the like;
Electrical characteristics are stable with respect to temperature and frequency,
It has various advantages such as low dielectric loss (tan δ), and is also required to increase the control speed and signal processing speed of electronic devices and circuits in recent years and to improve reliability under various severe use environments. Easy to respond. For this reason, ceramic electronic component manufacturers have been conducting research and development to improve the performance and value of a capacitor element containing SrTiO ₃ as a main component. In addition to analog circuits, applications are expanding to noise filters for power supplies, high-frequency noise absorbing elements for protecting semiconductor devices, and the like. A typical example of the above application is a current-voltage non-linear capacitive porcelain element (hereinafter, referred to as a capacitive varistor).

[0004] The capacitive varistor is an element having a composite function and usually functions as a capacitor.
When a high-voltage external surge (lightning surge) or sudden rising noise (hereinafter referred to as “steep noise”) occurs in the circuit, it functions as a varistor, absorbs these external surges, etc. Prevent erroneous operation and dielectric breakdown of elements (various ICs, LSIs, etc.).

The main electrical characteristics required for the capacitive varistor are as follows.

[0006] The current-voltage nonlinear coefficient (α) must be sufficiently large in order to increase the response to steep noise. Varistor voltage ( _V1mA ) according to the rated voltage of the circuit
Can be freely controlled within a certain range. The capacitance (C) must be large enough to absorb steep noise. Element impedance in a steady state is small,
That is, the dielectric loss (tan δ) is sufficiently small. Excellent reproducibility of current-voltage characteristics (IV curve) (stability of current-voltage characteristics). Even after the steep noise absorption, the varistor voltage (V
_1mA ), current-voltage nonlinear coefficient (α), capacitance (C),
The rate of change in characteristics such as dielectric loss (tan δ) is small (high electrical noise resistance).

As another material having a varistor function, ZnO-based (zinc oxide) ceramics are well known.
, Have sufficiently good properties,
The relative dielectric constant (ε _r ) of the capacitance (C) of SrT
Since it is smaller than iO ₃ -based semiconductor porcelain, the capacitance (C) of the element cannot be made sufficiently large, the function as a capacitor is insufficient, and the function as a capacitive varistor is not sufficient. .

[0008]

On the other hand, SrTiO ₃ -based capacitive varistors have sufficient characteristics for, but cannot be said to have sufficient characteristics for.

That is, the SrTiO ₃ -based capacitive varistor is caused by the disorder of the grain boundary structure of the SrTiO ₃ -based semiconductor porcelain, and the stability of current-voltage characteristics and the varistor voltage (V
_{1 mA} ) and the reliability of the current-voltage nonlinear coefficient (α) is insufficient (electric noise immunity is not sufficient).
Especially for chip-type electronic components intended for mounting on the surface of a circuit board, the electrode structure and the like are finer and more complicated than those of a disc-type with lead, etc. And the electrical noise resistance becomes further insufficient.

As one method for solving these problems, for example, Japanese Unexamined Patent Publication No. 5-90062 discloses a laminated grain boundary insulating type in which the capacitance (C) is increased and the electrical characteristics are stabilized. A semiconductor ceramic capacitor is disclosed.

According to the above-mentioned publication, the structure of the ceramic is reduced to a semiconductor by reduction by forming a laminated structure and forming holes in the internal electrodes with a total area of 5 to 30% with respect to the effective electrode area. The process is sufficiently and uniformly performed, the variation in the electrical characteristics is reduced, and the reliability is improved.

However, when compared with the conventional disk-type SrTiO ₃ -based semiconductor porcelain, there is a problem that the capacitance (C) is still small even in the case of a laminated type.

Further, for example, Japanese Patent Application Laid-Open Nos. Hei 6-84686 and Hei 5-21211 disclose chip-type capacitive varistors having improved electric noise resistance.

In the chip-type capacitive varistor described in Japanese Patent Application Laid-Open No. 6-84686, an improvement in electric noise resistance is achieved by applying a steep noise to the laminated sintered body to destroy the electrode interface and lower the impedance. Is planned. Further, in the chip-type capacitive varistor described in Japanese Patent Application Laid-Open No. 5-212111, the internal electrode is formed in such a manner that the internal electrode lead-out side has a substantially T-shape with a wide width.
The contact area between the internal electrode and the external electrode is increased, and even when steep noise is applied, it is possible to prevent a large current from flowing to the contact portion between the internal electrode and the external electrode to prevent the internal electrode from being destroyed. ing.

However, even with these chip-type capacitive varistors, there is a problem that characteristics such as capacitance (C) and dielectric loss (tan δ) are not sufficient.

The present invention has been made in view of the above problems, and provides a multilayer chip type electronic component having a sufficiently large capacitance (C), capable of absorbing steep noise, and having sufficiently high electric noise resistance. It is intended to be.

[0017]

In order to achieve the above object, a multilayer chip electronic component (1) according to the present invention comprises a plurality of dielectric ceramic porcelains mainly composed of a SrTiO ₃ material. Are formed in parallel with each other,
A multilayer chip electronic component in which the internal electrodes are alternately connected to a pair of external electrodes formed on opposing side surfaces, wherein an outer edge of the internal electrode has a smooth curved shape.

Further, in the multilayer chip electronic component (2) according to the present invention, a plurality of internal electrodes are formed in parallel with each other in a dielectric ceramic molded body mainly composed of an SrTiO ₃ material.
A laminated chip electronic component in which the internal electrodes are alternately connected to a pair of external electrodes formed on opposing side surfaces, wherein the internal electrodes have a shape having no apex of 90 ° or less at a tip end. It is characterized by having.

According to the above-mentioned laminated chip type electronic component (1) or (2), the capacitance (C) is sufficiently large, and external surges and steep noise can be absorbed. Further, since the outer edge of the internal electrode has a smooth curved shape or a shape having no apex of 90 ° or less at the tip,
Even if steep noise is applied to the circuit, it is possible to prevent the occurrence of a leak current by avoiding the concentration of an electric field at one end of the internal electrode, and to prevent a change in electrical characteristics due to the occurrence of the leak current. it can. Therefore, it is possible to provide a multilayer chip electronic component that can absorb steep noise and the like and has sufficiently high electric noise resistance.

Further, the laminated chip type electronic component (3) according to the present invention comprises the laminated chip type electronic component (1) or (2).
, The distance between the opposing external electrodes is X, and the distance between the tip of the internal electrode and the external electrode opposing the internal electrode is Y, the relationship being 0.15 ≦ Y / X ≦ 0.38. It is characterized by satisfying.

According to the multilayer chip electronic component (3), since the distance between the tip of the internal electrode and the external electrode is appropriately set, the multilayer chip electronic component (1) or (2) In addition to the above effects, even when steep noise is applied, it is possible to prevent a change in electrical characteristics due to the generation of a leak current from the tip of the internal electrode, and to keep the area of the internal electrode large, Electrical characteristics such as capacitance (C) and dielectric loss (tan δ) can be kept in a sufficiently favorable range.

The multilayer chip electronic component (4) according to the present invention is the semiconductor chip composition according to any one of the multilayer chip electronic components (1) to (3), wherein the dielectric ceramic molded body is a grain boundary insulating type. It is characterized by consisting of things.

According to the multilayer chip electronic component (4), in addition to the effects of any of the multilayer chip electronic components (1) to (3), the dielectric ceramic molded body has a relative dielectric constant (ε _r ).
Since it is composed of a grain boundary insulating semiconductor porcelain composition having a large
The capacitance (C) can be set to a sufficiently large value.

The multilayer chip electronic component (5) according to the present invention is characterized in that in any one of the above-mentioned multilayer chip electronic components (1) to (4), the internal electrode is made of Ni or Cu.

According to the multilayer chip electronic component (5), in addition to the effects of any one of the multilayer chip electronic components (1) to (4), since the internal electrodes are made of Ni or Cu, firing in a reducing atmosphere is performed. Even so, no change occurs in the internal electrodes, and good electrical characteristics can be maintained.

The laminated chip type electronic component (6) according to the present invention, in any one of the above-mentioned laminated chip type electronic components (1) to (5), has on its outer surface an insulating compound layer mainly composed of borosilicate glass. Is formed.

According to the multilayer chip electronic component (6), in addition to the effects of any of the multilayer chip electronic components (1) to (5), since the insulating compound layer is formed on the outer surface, The inner ceramic layer is protected by the insulating compound layer, and the electrical noise resistance is further improved.

[0028]

DESCRIPTION OF THE PREFERRED EMBODIMENTS First, the structure of a multilayer chip electronic component according to an embodiment of the present invention will be described.

The type of the SrTiO ₃ -based dielectric porcelain composition is not particularly limited, but a grain boundary insulated semiconductor porcelain composition is preferred because of its high relative dielectric constant (ε _r ).
Also, the composition is not particularly limited, and known compositions can be used. Examples of the semiconductor porcelain composition include those in which a part of Sr is replaced by Ca, Mg, Pb, etc., and those in which a part of Ti is replaced by a rare earth element such as Nb. Examples of the metal that segregates are Co, Cu, Mn, Na, Ti, B, Bi, and the like.

FIG. 1A is a perspective view schematically showing a laminated chip type electronic component according to an embodiment, and FIG. 1B is a sectional view taken along line BB in FIG. 1A.

The multilayer chip type electronic component 10 has substantially the same configuration as a normal multilayer capacitor, and a plurality of internal electrodes 12 are formed in a dielectric ceramic molded body 11 in parallel with each other. The internal electrode 12 is formed of the dielectric ceramic molded body 1.
1 are alternately connected to external electrodes 13 formed on both left and right side surfaces (FIG. 1B). The external electrodes 13 are also extended to the ends of the surfaces adjacent to the both sides so that the external electrodes 13 are not easily peeled off from both sides of the dielectric ceramic molded body 11, and the outer surfaces other than the part where the external electrodes 13 are formed are formed. Are covered with an insulating compound layer 14.

FIG. 2A is a horizontal sectional view schematically showing the shape of the internal electrode 12 formed in the dielectric ceramic molded body 11 in the present embodiment, and FIG. FIG. 3 is a horizontal sectional view schematically showing the shape of an internal electrode 22 in the embodiment.

The shape of the internal electrode 12 should be such that the outer edge of the tip has a smooth curved shape in order to prevent electric field concentration from occurring at the tip when a steep noise is applied and to prevent leakage current. Or, a shape having no apex of 90 ° or less at the tip is preferable. As a specific example of the shape of the internal electrodes 12 and 22, one having a semi-elliptical tip portion as shown in FIG. 2A, one having a semi-circular tip portion, and FIG. As shown in b), a square having a shape obtained by cutting off a corner, a corner having an arc shape, and the like can be given.

Further, as shown in FIG.
Assuming that the distance from the tips of the electrodes 2 and 22 to the external electrodes 13 facing the internal electrodes 12 and 22 is Y and the distance between the external electrodes 13 is X, Y / X is in the range of 0.15 to 0.38. Is preferred. If Y / X is less than 0.15, external electrode 1
The distance between the internal electrode 3 and the internal electrode 12 is too short, a leak current is likely to occur even with a normal applied current, and a large change is likely to occur in the capacitance (C) after the steep noise is applied.
When / X exceeds 0.38, the area of the internal electrodes 12 and 22 becomes small, so that the capacitance (C) becomes small.

For the formation of the internal electrode 12, it is preferable to use a material which does not change even if it is fired in a reducing atmosphere during manufacture. Such an electrode material is, for example, Ni or Cu.
However, in consideration of the price and the resistance value of the electrode paste, those containing Ni as a main component are preferable.

A portion of the outer surface of the dielectric ceramic molded body 11 where the external electrode 13 is not formed is covered with an insulating compound layer 14 containing lead borosilicate glass as a main component.
The insulation properties of the multilayer chip electronic component are improved, and the electrical noise resistance is improved. The thickness of the insulating compound layer 14 is at least 3
It is preferably about 0 μm.

The capacitance (C) of the capacitor is expressed by the following equation (1).

[0038]

In Equation 1] _{C = ε r · ε 0 ·} (A / d) above equation (1), epsilon ₀ is the dielectric constant in vacuum, A is the area of the electrodes, d represents the distance between the electrodes. From the above equation, the shorter the distance (d) between the electrodes, the smaller the area (A) of the electrodes
Is larger, the value of the capacitance (C) is larger. Therefore, the distance between the internal electrodes 12 is short, and the dielectric ceramic molded body 1
In the multilayer chip-type electronic component 10 according to the embodiment in which a large number of internal electrodes 12 are formed in one, the capacitance is larger than that of a conventional capacitance varistor in which opposing electrodes are formed only on both main surfaces. The value of (C) increases.

Next, an example of a method of manufacturing the multilayer chip electronic component 10 will be briefly described.

First, a slurry is formed by mixing a raw material powder of the SrTiO ₃ -based dielectric ceramic composition, a sintering aid such as CuO and SiO ₂ , a resin, and a solvent. The raw material powder of this dielectric ceramic composition is composed of SrCO ₃ , TiO ₂ , and Nb ₂
The mixed powder of O ₅ or the like by calcination synthesized using those composition of the dielectric ceramic composition. It is confirmed by X-ray analysis, elemental analysis and the like that a predetermined composition has been synthesized at the time of calcination. Next, using this slurry, a green sheet having a thickness of 50 to 60 μm is prepared by a doctor blade method or the like, and cut into an appropriate size.

FIG. 3 is a perspective view schematically showing green sheets to be laminated.

An electrode paste containing a powder of a conductive metal such as Ni is applied to the green sheet 31 to be laminated, and an electrode paste layer 32 having a smooth curved outer end portion.
To form Next, as shown in FIG. 3, the green sheet 31 in which the blank portion 33 where the electrode paste layer 32 is not formed is located on the right side and the green sheet 31 in which the blank portion 33 is located on the left side are alternately arranged. The green sheets 31 on which the electrode paste layer 32 is not formed at all are laminated on the uppermost layer, and then pressed to form a green sheet laminate. FIG. 3 shows the green sheet 31 on which only one pattern of the electrode paste layer 32 is printed.
After laminating and pressing a large number of green sheets 31 formed vertically and horizontally, the green sheets 31 are cut to a predetermined size to produce a green sheet laminate.

The green sheet laminate has a thickness of 700 to 80
After performing binder removal treatment at 0 ° C., firing is performed at 1350 ° C. to 1450 ° C. in a mixed gas atmosphere (reducing atmosphere) containing 1 to 20% by volume of hydrogen and 80 to 99% by volume of nitrogen to form a semiconductor. Manufactures a unit (semiconductor ceramic). Next, to insulate the crystal grain boundaries of the sintered body,
Annealing heat treatment is performed at a temperature of about 00 ° C. Next, the left and right side surfaces and the ends of the surfaces adjacent to these surfaces (FIG. 1B)
Is printed, and baked at 650 ° C. or less to form an insulating compound layer 14. Then, on the left and right side surfaces and the ends of the surfaces adjacent to these surfaces, The paste for the external electrode 13 is printed and baked at 600 to 650 ° C. to form the external electrode 13, and the production of the multilayer chip electronic component 10 is completed.

The multilayer chip type electronic component 10 manufactured by the above method has a capacitance (C) and a dielectric loss (tan).
δ), varistor voltage (V _1mA ), current-voltage nonlinear coefficient (α), etc., dielectric loss (tan δ) is small even after steep noise is applied, and capacitance change rate (ΔC ), Change rate of varistor voltage (ΔV _1mA ),
In addition, the capacitive varistor has excellent characteristics in which the rate of change (Δα) of the current-voltage nonlinear coefficient is small.

The electrical characteristics can be evaluated as follows. That is, the capacitance (C) and the dielectric loss (tan δ) are measured by an impedance analyzer (for example, Y
The measurement is performed using HP 4192A) under the conditions of a frequency of 1 KHz and a measurement voltage of 1 V. Varistor voltage (V _1mA) is a DC constant voltage power supply a DC voltage to the sample element to 0～100V (e.g., YHP made 4140B) continuously applied using a terminal voltage when a 1mA current flows in the element ( _V1mA ). Current-voltage nonlinear coefficient (α)
Is obtained by measuring the voltage between terminals (V _{10 mA} ) when a current of 10 mA flows, and calculating from the following equation (2). The measurement temperature was 20 ° C. in each case.

[0046]

Α = 1 / log ( _V10mA / _V1mA ) Varistor voltage ( _V1mA ), current-voltage nonlinear coefficient (α),
After measuring the capacitance (C) and the dielectric loss (tan δ), a surge current (8 × 20 μsec waveform, 3000 A
/ Cm ² ) 5 times at 1 minute intervals, and again measure the varistor voltage (V _1mA ), the current-voltage nonlinear coefficient (α), the capacitance (C), and the dielectric loss (tan δ), and flow the surge current. The change rates of these electrical characteristics before and after the change were obtained.

[0047]

Examples and Comparative Examples Hereinafter, examples of the multilayer chip electronic component according to the present invention will be described. The manufacturing conditions of the multilayer chip electronic component according to the example and the comparative example are as follows.

(1) Example: Calcination synthesis of raw material powder Raw material compounds: SrCO ₃ , CaCO ₃ , TiO ₂ , Nb
₂ O ₅ sintering aid: average particle size of CuO, SiO ₂ raw material powder: 1.5 μm or less Composition of semiconductor ceramic composition: temperature of calcination synthesis: 1150 ° C., time: 2.0 hours, atmosphere: air conditioning Particle size after graining: 1.0 μm Preparation and stacking of green sheet 31 Application of electrode paste for internal electrode 12 Material of internal electrode 12: Ni or Cu Application shape: shape shown in FIG. Value: Lamination of green sheets shown in Table 1 Production of semiconductor ceramic molded body 11 (i) Degreasing treatment Temperature: 700 ° C, time: 2 hours, atmosphere: air (ii) Firing temperature: 1380 ° C, time: 2 hours, atmosphere : H ₂ : 10
vol%, N ₂ : 90 vol% Formation of insulating compound layer 14 and external electrode 13 Temperature of forming insulating compound layer 14: 600 ° C., time: 10 minutes Atmosphere: air Baking temperature of Ag paste for external electrode 13: 600
° C, time: 10 minutes, atmosphere: air Number of manufactured multilayer chip-type electronic components 10: 30 for each example Electrical property value: average value of 30 samples (2) Comparative example A laminated chip type electronic component 40 was manufactured in the same manner as in the example except that the shape shown in the horizontal cross-sectional view (FIG. 4) of the laminated chip type electronic component 40 was used.

(3) Results of Examples and Comparative Examples The shapes of the internal electrodes 12, the values of Y / X, and the values before the surge current is applied to the multilayer chip-type electronic electronic components 10 and 40 according to the above-described Examples and Comparative Examples. Table 1 below shows the measurement results of the electrical characteristics and the rate of change of the electrical characteristics (dielectric loss (tan δ)) after the surge current was passed. Note that, for the multilayer chip-type electronic component 40 according to the comparative example, the remarks column in Table 1 indicates *.
Marked to distinguish.

[0050]

[Table 1]

As is clear from the results shown in Table 1, the multilayer chip-type electronic component 10 according to the embodiment has a capacitance (C)
Is 1000 pF or more, the dielectric loss (tan δ) is 5% or less, the varistor voltage (V _1mA ) is 15 V or less, and the current-voltage nonlinear coefficient (α) is 10 or more. Dielectric loss (ta
nδ) is 5% or less, the rate of change of capacitance (ΔC) is 5% or less, the rate of change of varistor voltage (ΔV _1mA ) is 3% or less, and the rate of change of current-voltage nonlinear coefficient (α) (Δα) is This is 5% or less, which is an excellent property that has not been achieved in the past. The above-mentioned electrical characteristics show that not only compatibility between dielectric characteristics and varistor characteristics but also good reproducibility of varistor characteristics can be obtained even after a surge current has flowed. It is optimal as a material that can be mounted, and could sufficiently differentiate it from other chip-type electronic components.

On the other hand, in the conventional laminated chip type electronic component 40 in which the rectangular internal electrodes corresponding to the comparative examples indicated by the mark * in the remarks column, various electrical characteristics according to the embodiment are applied. It was significantly inferior to the multilayer chip type electronic component 10 and could not sufficiently satisfy the required electrical characteristics.

[Brief description of the drawings]

FIG. 1A is a perspective view schematically illustrating a multilayer chip electronic component according to an embodiment of the present invention, and FIG. 1B is a cross-sectional view taken along line BB in FIG.

FIG. 2 is a horizontal sectional view schematically showing a shape of an internal electrode formed in a dielectric ceramic molded body of the multilayer chip electronic component according to the embodiment, and FIG. 2 (b) is another embodiment. FIG. 3 is a horizontal sectional view schematically showing the shape of the internal electrode in FIG.

FIG. 3 is a perspective view schematically showing green sheets to be laminated in manufacturing the multilayer chip electronic component according to the embodiment.

FIG. 4 is a horizontal sectional view schematically showing a shape of an internal electrode formed in a dielectric ceramic molded body of a multilayer chip electronic component according to a comparative example.

[Description of Signs] 10, 20 Multilayer chip-type electronic component 11 Dielectric ceramic molded body 12, 22 Internal electrode 13 External electrode 14 Insulating compound layer

Claims (6)

[Claims] A plurality of internal electrodes are formed parallel to each other in a dielectric ceramic molded body containing a SrTiO ₃ material as a main component, and the internal electrodes alternate with a pair of external electrodes formed on opposing side surfaces. , Wherein the outer edge of the tip of the internal electrode has a smooth curved shape. 2. A plurality of internal electrodes are formed parallel to each other in a dielectric ceramic molded body mainly composed of a SrTiO ₃ material, and the internal electrodes alternate with a pair of external electrodes formed on opposing side surfaces. Wherein the internal electrode has a shape that does not have an apex of 90 ° or less at a tip end of the multilayer chip-type electronic component. 3. Assuming that the distance between the external electrodes facing each other is X and the distance between the tip of the internal electrode and the external electrode facing the internal electrode is Y, both are 0.15 ≦ Y / X ≦ 0. The multilayer chip-type electronic component according to claim 1, wherein the electronic component satisfies the relationship of (38). 4. The multilayer chip electronic component according to claim 1, wherein the dielectric ceramic molded body is made of a semiconductor ceramic composition of a grain boundary insulating type. 5. The multilayer chip electronic component according to claim 1, wherein the internal electrode is made of Ni or Cu. 6. The multilayer chip electronic component according to claim 1, wherein an insulating compound layer mainly composed of borosilicate glass is formed on an outer surface.