JPH1065285A - Mounting structure for electronic component - Google Patents

Mounting structure for electronic component

Info

Publication number
JPH1065285A
JPH1065285A JP21345296A JP21345296A JPH1065285A JP H1065285 A JPH1065285 A JP H1065285A JP 21345296 A JP21345296 A JP 21345296A JP 21345296 A JP21345296 A JP 21345296A JP H1065285 A JPH1065285 A JP H1065285A
Authority
JP
Japan
Prior art keywords
printed wiring
wiring board
mounting
electronic component
board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP21345296A
Other languages
Japanese (ja)
Other versions
JP2848346B2 (en
Inventor
Michinaga Tanioka
道修 谷岡
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP8213452A priority Critical patent/JP2848346B2/en
Publication of JPH1065285A publication Critical patent/JPH1065285A/en
Application granted granted Critical
Publication of JP2848346B2 publication Critical patent/JP2848346B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0284Details of three-dimensional rigid printed circuit boards
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/18Printed circuits structurally associated with non-printed electric components
    • H05K1/182Printed circuits structurally associated with non-printed electric components associated with components mounted in printed circuit boards [PCB], e.g. insert-mounted components [IMC]
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/18Printed circuits structurally associated with non-printed electric components
    • H05K1/189Printed circuits structurally associated with non-printed electric components characterised by the use of flexible or folded printed circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistors
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3465Application of solder
    • H05K3/3478Application of solder preforms; Transferring prefabricated solder patterns

Landscapes

  • Manufacturing Of Printed Wiring (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Structure Of Printed Boards (AREA)

Abstract

PROBLEM TO BE SOLVED: To approximately uniformize the heights of electronic components, mounted on both sides of a printed wiring board, by forming protrusions and recessions or curved surfaces beforehand, so that the height of each component on both the board surfaces are the same after their mounting. SOLUTION: A flux is applied beforehand onto a printed wiring board 1 having protrusions and recessions, and solder ribbons are punched out by a punch, and are mounted on the pads of the board and reflowed by using a μ-press method. This μ-press method enables supplying solder, even if the printed wiring board 1 has protrusions and recessions. After mounting electronic components 21-23 on a printed wiring board 1 after supplying the solder, reflowing is performed and soldering is completed. When component mounting on one surface is finished, mounting on the other surface is performed. By doing this way, it becomes possible to approximately uniformize the heights of the electronic components after having been mounted.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【発明の属する技術分野】本発明は、電子部品の実装構
造に関し、特にプリント配線板への電子部品の実装構造
に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a mounting structure for electronic components, and more particularly to a mounting structure for electronic components on a printed wiring board.

【0001】[0001]

【従来の技術】電子部品をプリント基板へ実装する方法
としては、図3に示すように、例えば特開平3−535
89号公報に記載された方法がある。
2. Description of the Related Art As a method for mounting an electronic component on a printed circuit board, as shown in FIG.
There is a method described in JP-A-89-89.

【0002】図3(a)および3(b)は、それぞれ同
公報に記載された電子部品の表面実装方法を示す外観斜
視図およびB−B面断面図である。
FIGS. 3 (a) and 3 (b) are an external perspective view and a cross-sectional view taken along the line BB, respectively, showing a surface mounting method of an electronic component described in the publication.

【0003】図3において、多数の接続ピンを配列した
コネクタ101(電子部品)は、ハウジング102によ
り形成され、該ハウジング102の背面にはリード10
3が設けられ、プリント基板104と接する部分には穴
部105が形成されている。プリント基板104には凸
部106と回路導体107に接続されたパッド108と
が形成されている。
In FIG. 3, a connector 101 (electronic component) in which a number of connection pins are arranged is formed by a housing 102, and a lead 10 is provided on the back of the housing 102.
3 is provided, and a hole 105 is formed in a portion in contact with the printed circuit board 104. On the printed circuit board 104, a projection 106 and a pad 108 connected to a circuit conductor 107 are formed.

【0004】ハウジング102の穴部105はプリント
基板104の凸部106に嵌合させてハウジング102
をプリント基板104に固定し、リード102をパッド
108に半田付けすることにより、電子部品にかかる外
力をプリント基板の凸部により受けとめ、リードとパッ
ドの半田付け部に外力がかからないようにしている。
A hole 105 of the housing 102 is fitted into a projection 106 of the
Is fixed to the printed circuit board 104, and the leads 102 are soldered to the pads 108, so that the external force applied to the electronic component is received by the projections of the printed circuit board, so that no external force is applied to the soldered portions between the leads and the pads.

【0005】また、特開平3−101188号公報に
は、図4に示すように、プリント配線板201の半導体
集積回路202実装領域の下部に凹部203を設け、そ
の凹部203にチップ部品204を実装する電子回路部
品の実装方法が記載されている。
In Japanese Patent Laid-Open Publication No. 3-101188, as shown in FIG. 4, a concave portion 203 is provided below a semiconductor integrated circuit 202 mounting region of a printed wiring board 201, and a chip component 204 is mounted in the concave portion 203. It describes a method of mounting electronic circuit components.

【0006】半導体集積回路202のリード205はプ
リント配線板201に半田206により固定される。
The leads 205 of the semiconductor integrated circuit 202 are fixed to the printed wiring board 201 by solder 206.

【0007】このようにして、図4に示した実装方法で
は、電子回路部品実装後の部品高を高くせずに高密度化
を達成している。
As described above, the mounting method shown in FIG. 4 achieves high density without increasing the component height after mounting electronic circuit components.

【0008】さらに、多層プリント配線基板を用いた機
能モジュールでは、図5に示すように、積み重ねられた
最上層パターン301と最下層パターン302とを有
し、最上層パターン301上に表面実装部品303を実
装し、また、最上層パターン301の凹部304部分に
露出した最下層パターン302の内装パターン305上
に表面実装部品306を実装する方法がある。
Further, a functional module using a multilayer printed wiring board has an uppermost layer pattern 301 and a lowermost layer pattern 302 which are stacked as shown in FIG. In addition, there is a method of mounting the surface mount component 306 on the interior pattern 305 of the lowermost layer pattern 302 exposed at the concave portion 304 of the uppermost layer pattern 301.

【0009】このような実装方法は、例えば、実開平1
−165677号公報に記載されている。
Such a mounting method is disclosed in, for example,
No. 165677.

【0010】[0010]

【発明が解決しようとする課題】しかしながら、図3に
示した方法では、電子部品固定用の凸部以外は平面のプ
リント基板を用いているため、実装後の部品の高さの凹
凸が発生し、デッドスペースが発生するという問題点が
ある。
However, in the method shown in FIG. 3, since a flat printed board is used except for the projections for fixing the electronic components, unevenness in the height of the components after mounting occurs. However, there is a problem that a dead space occurs.

【0011】図4に示した方法では、チップ部品を実装
するための凹部をプリント配線板に形成するための特殊
な手法を用いるため、プリント基板の製造コストが高く
なるという問題点がある。
In the method shown in FIG. 4, a special method for forming a concave portion for mounting a chip component on a printed wiring board is used, so that there is a problem that the manufacturing cost of a printed circuit board is increased.

【0012】また、チップ部品の定数変更やリペアを実
施する場合、上に搭載されている半導体集積回路を取り
外す必要がある。さらに、リフロー時に半導体集積回路
下部の部品には熱が伝わりにくく、半田付け不良も発生
する。
Further, when changing constants or repairing chip components, it is necessary to remove the semiconductor integrated circuit mounted thereon. Further, during the reflow, heat is hardly transmitted to the parts below the semiconductor integrated circuit, and a soldering failure occurs.

【0013】図5に示した方法では、多層プリント基板
の場合には実装後の部品の高さの凹凸をなくすことは可
能であるが、単層プリント基板を使用する電子部品の実
装方法では適用できない。
In the method shown in FIG. 5, in the case of a multilayer printed circuit board, it is possible to eliminate the unevenness of the height of the component after mounting, but it is not applied to the mounting method of an electronic component using a single-layer printed circuit board. Can not.

【0014】また、多層プリント配線基板の内層パター
ンを露出させるために、プリント配線基板をルーターに
より削り出すか、あるいは積層前の基板に穴を開けてお
いて積層時の接着剤のはみ出しを考慮して積層する必要
がある。そのため、配線密度が低下してしまう。さら
に、削りだしは多層化されてくると積層後の銅箔のうね
りや機材の熱収縮により、銅箔の凹凸が発生し、製造止
まりが悪くなる。しかも、歩止まり悪化によりコストも
上昇してしまう。
Also, in order to expose the inner layer pattern of the multilayer printed wiring board, the printed wiring board is cut out by a router, or a hole is formed in the board before lamination, and the protrusion of the adhesive at the time of lamination is considered. Need to be stacked. Therefore, the wiring density decreases. Further, when the shaving is multi-layered, unevenness of the copper foil occurs due to undulation of the copper foil after lamination and thermal shrinkage of the equipment, and the production stop is deteriorated. In addition, the cost rises due to the deterioration of the yield.

【0015】さらに、上述した実装方法は、小型・薄型
化が急激に進んでいる携帯機器等への適用に向いていな
い。
Furthermore, the above-described mounting method is not suitable for application to portable devices and the like, which are rapidly becoming smaller and thinner.

【0016】本発明の目的は、簡単な構成によりプリン
ト配線板に実装された電子部品の高さを略一定にするこ
とが可能な電子部品の実装構造を提供することにある。
An object of the present invention is to provide a mounting structure of an electronic component capable of making the height of an electronic component mounted on a printed wiring board substantially uniform with a simple structure.

【0017】[0017]

【課題を解決するための手段】本発明の電子部品の実装
構造は、プリント配線板上に半導体集積回路等の電子部
品を搭載する構造において、前記プリント配線板が電子
部品実装後の各部品高さが両面ともに同じになるような
凹凸もしくは曲面を有する。
SUMMARY OF THE INVENTION According to the present invention, there is provided a mounting structure of an electronic component in a structure in which an electronic component such as a semiconductor integrated circuit is mounted on a printed wiring board. Have the same irregularities or curved surfaces on both sides.

【0018】前記凹凸は基板製造最終工程でプレス法に
より形成することが好ましい。
Preferably, the irregularities are formed by a press method in the final step of manufacturing the substrate.

【0019】このような構成により、本願発明では配線
密度の低下なく、かつ高歩留まり・低コスト化が可能で
ある。
With such a configuration, in the present invention, high yield and low cost can be achieved without lowering the wiring density.

【0020】また、デッドスペースを最小限に抑えるこ
とができ、装置の小型・薄型化が可能になる。
Further, the dead space can be minimized, and the device can be reduced in size and thickness.

【0021】[0021]

【発明の実施の形態】次に、本発明の一実施例を図面を
参照して詳細に説明する。
Next, an embodiment of the present invention will be described in detail with reference to the drawings.

【0022】図1(a)および1(b)は、それぞれ本
発明の一実施例を示す平面図およびA−A面断面図であ
る。
FIGS. 1 (a) and 1 (b) are a plan view and an AA sectional view, respectively, showing an embodiment of the present invention.

【0023】図1において、サブトラクテッブ工法、ア
ディティブ工法あるいはビルドアップ工法等により作ら
れたプリント配線板1の上面および下面には半導体集積
回路等の表面実装部品(SMD:Surface Mo
unt Device)(以下、電子部品という)21
ないし23が実装される。電子部品21ないし23はプ
リント配線板1に半田や接着剤等の接合材料3により固
定される。
In FIG. 1, the upper surface and the lower surface of a printed wiring board 1 made by a subtractive method, an additive method, a build-up method or the like are provided with surface mount components (SMD: Surface Mo) such as a semiconductor integrated circuit.
unt Device (hereinafter referred to as “electronic component”) 21
To 23 are implemented. The electronic components 21 to 23 are fixed to the printed wiring board 1 by a bonding material 3 such as a solder or an adhesive.

【0024】図1において、電子部品21は例えばQu
ad Flat Package等のLSIパッケー
ジ、22はタルタルコンデンサ、23は抵抗やコンデン
サ等のチップ部品を示しているが、その他トランジス
タ、ダイオード、クリスタル等でも良いことは明らかで
ある。
In FIG. 1, the electronic component 21 is, for example, Qu
Although an LSI package such as ad Flat Package, 22 indicates a tantalum capacitor, and 23 indicates a chip component such as a resistor and a capacitor, it is apparent that other components such as a transistor, a diode, and a crystal may be used.

【0025】プリント配線板1には電子部品の搭載後の
高さがほぼ一定になるように凹凸が形成されている。
The printed wiring board 1 is formed with irregularities so that the height after mounting electronic components is substantially constant.

【0026】プリント配線板1の凹凸の形成フローは、
まず回路設計時に部品情報と回路情報とから実装後の高
さが一定になるようにプリント配線板1の凹凸を設計し
ておき、基板製造の最終工程で金型によるプレス法を用
いて形成する。
The flow of forming the unevenness of the printed wiring board 1 is as follows.
First, at the time of circuit design, the unevenness of the printed wiring board 1 is designed based on the component information and the circuit information so that the height after mounting is constant, and is formed by using a pressing method with a mold in the final step of substrate manufacturing. .

【0027】次に、プリント配線板1への電子部品の実
装方法について説明する。
Next, a method for mounting electronic components on the printed wiring board 1 will be described.

【0028】凹凸の形成されたプリント配線板1に半田
を供給する。半田供給には、好ましくは、プリント配線
板1上にフラックスを塗布しておき、半田リボンをポン
チで打ち抜き基板のパッド(図示せず)上に搭載し、リ
フローするμプレス法を用いる。このμプレス法により
プリント配線板1に凹凸があっても半田供給が可能とな
る。
The solder is supplied to the printed wiring board 1 having the unevenness. Preferably, the solder is supplied by applying a flux to the printed wiring board 1, punching a solder ribbon with a punch, mounting the solder ribbon on a pad (not shown) of a board, and performing a reflow μ press method. By this μ-press method, solder can be supplied even if the printed wiring board 1 has irregularities.

【0029】半田供給後に、プリント配線板1を洗浄
し、再度フラックスを塗布する。その後、通常の部品実
装装置により電子部品をプリント配線板1上に搭載す
る。
After supplying the solder, the printed wiring board 1 is washed and flux is applied again. Thereafter, the electronic component is mounted on the printed wiring board 1 by a normal component mounting apparatus.

【0030】この電子部品実装に際し、プリント配線板
1には凹凸が形成されているので、この凹凸に合うよう
所定の位置を座ぐったバックアッププレートを用意する
ことが望ましい。
In mounting the electronic components, the printed wiring board 1 is formed with irregularities. Therefore, it is desirable to prepare a backup plate that sits at a predetermined position so as to match the irregularities.

【0031】部品搭載後、リフローを行い、半田付けを
完了する。
After the components are mounted, reflow is performed to complete the soldering.

【0032】一方の面への部品実装が終了すると、他方
の面への実装を行う。
When component mounting on one surface is completed, mounting on the other surface is performed.

【0033】このようにして、電子部品を搭載した後の
高さはほぼ一定となる。
In this way, the height after mounting the electronic components is substantially constant.

【0034】図2は、本発明の他の実施例を示す断面図
である。
FIG. 2 is a sectional view showing another embodiment of the present invention.

【0035】図2において、図1に示した実施例との相
違する点は、電子部品21ではなくベアチップ4である
点である。すなわち、搭載される電子部品のうちLSI
が通常のパッケージ品ではない点である。
In FIG. 2, the difference from the embodiment shown in FIG. 1 is that the electronic component 21 is not the bare chip 4. That is, among the electronic components to be mounted, LSI
Is not a normal packaged product.

【0036】本実施例では、ベアチップ4を用いている
ので、製造フローとしては、基板電極の汚染等を考慮し
て、ベアチップ搭載は他の電子部品搭載よりも先に行う
ことが好ましい。
In this embodiment, since the bare chip 4 is used, it is preferable to mount the bare chip before mounting other electronic components in consideration of the contamination of the substrate electrode and the like in the manufacturing flow.

【0037】その他の点については図1の実施例と同様
であり、冗長を避けるために、その説明を省略する。
The other points are the same as those of the embodiment of FIG. 1, and the description thereof will be omitted to avoid redundancy.

【0038】[0038]

【発明の効果】以上説明したように、本発明では、両面
に実装された電子部品の高さをほぼ一定に揃えることが
可能であるため、デッドスペースを最小限に抑えること
ができる。しかも、単装プリント配線板を適用する場合
に特に効果的である。
As described above, according to the present invention, since the heights of the electronic components mounted on both sides can be made substantially constant, the dead space can be minimized. Moreover, it is particularly effective when a single printed wiring board is applied.

【0039】また、電子手帳、携帯電話、PHS、ポケ
ットベル、ハンディワープロあるいはそれらの複合端末
等の携帯機器の小型、薄型化が可能になる。
Further, it is possible to reduce the size and thickness of portable devices such as an electronic organizer, a mobile phone, a PHS, a pager, a handy word processor, and a composite terminal thereof.

【0040】さらに、構造設計が非常に容易になる。Further, the structural design becomes very easy.

【0041】本発明では、また、プリント配線板の凹凸
の形成方法として、プレス法を用いているため、座ぐ
り、張り付け等の製造方法に比べ、高歩留まりを得るこ
とができ、製造コストを安価にすることができる。
In the present invention, since the press method is used as the method for forming the unevenness of the printed wiring board, a higher yield can be obtained and the manufacturing cost can be reduced as compared with a manufacturing method such as spot facing or pasting. Can be

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の一実施例を示す平面図およびA−A面
断面図である。
FIG. 1 is a plan view and an AA plane cross-sectional view showing one embodiment of the present invention.

【図2】本発明の他の実施例を示す断面図である。FIG. 2 is a sectional view showing another embodiment of the present invention.

【図3】従来の電子部品の第1の実装方法を示す外観斜
視図および断面図。
FIG. 3 is an external perspective view and a sectional view showing a first mounting method of a conventional electronic component.

【図4】従来の電子部品の第2の実装方法を示す断面
図。
FIG. 4 is a sectional view showing a second mounting method of a conventional electronic component.

【図5】従来の電子部品の第3の実装方法を示す断面
図。
FIG. 5 is a sectional view showing a third method for mounting an electronic component in the related art.

【符号の説明】[Explanation of symbols]

1 プリント配線板 3 接合材料 4 ベアチップ 21〜23 電子部品 DESCRIPTION OF SYMBOLS 1 Printed wiring board 3 Joining material 4 Bare chip 21-23 Electronic component

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】 プリント配線板上の半導体集積回路等の
電子部品の実装構造において、前記プリント配線板が電
子部品実装後の各部品高さが両面ともに略一定になるよ
うな凹凸もしくは曲面を有することを特徴とする電子部
品の実装構造。
In a mounting structure of an electronic component such as a semiconductor integrated circuit on a printed wiring board, the printed wiring board has unevenness or a curved surface such that the height of each component after mounting the electronic component is substantially constant on both sides. An electronic component mounting structure, characterized in that:
【請求項2】 前記プリント配線板の凹凸もしくは曲面
をプレス法により形成することを特徴とする請求項1記
載の電子部品の実装構造。
2. The electronic component mounting structure according to claim 1, wherein the unevenness or the curved surface of the printed wiring board is formed by a press method.
【請求項3】 前記プリント配線板の電子部品がベアチ
ップであることを特徴とする請求項1記載の電子部品の
実装構造。
3. The mounting structure according to claim 1, wherein the electronic component of the printed wiring board is a bare chip.
JP8213452A 1996-08-13 1996-08-13 Electronic component mounting method Expired - Lifetime JP2848346B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2015032691A (en) * 2013-08-02 2015-02-16 株式会社村田製作所 Resin multilayer substrate and method for producing the same
US9036359B2 (en) 2010-10-15 2015-05-19 Leonovo Innovations Limited (Hong Kong) Component built-in module, electronic device including same, and method for manufacturing component built-in module

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9036359B2 (en) 2010-10-15 2015-05-19 Leonovo Innovations Limited (Hong Kong) Component built-in module, electronic device including same, and method for manufacturing component built-in module
JP2015032691A (en) * 2013-08-02 2015-02-16 株式会社村田製作所 Resin multilayer substrate and method for producing the same

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