JPH1075178A - Quantizer - Google Patents

Abstract

PROBLEM TO BE SOLVED: To widen the utilization rate of an output level with less output gradations by taking out a quantization error generated by a specified local quantizer, adding the output of the filter for feedback of a specified transmission function for filtering the quantization error and quantizer input and inputting them to the local quantizer. SOLUTION: A subtractor 3 takes out the quantization error Vq generated by the local quantizer 2 for which values outputted to the input are the seven ways of -3N to 1N, 0 and +1N to +3N (N is a natural number) and the filter 4 for the feedback provided with the transmission function indicated by an expression (1-z<-1> )<3> Vq/(1-z<-1> +0.5z<-2> )-1 filters the quantization error. An adder 1 adds the output of the filter 4 for the feedback and the input X of this quantizer and inputs them to the local quantizer 2. Thus, a feedback amount in a high band is made less than a normal third-order ΔΣ modulator, the stability of a system is enhanced, and an inputtable level is taken up to ±2.37, even while setting the output gradations to the seven values of -3N to +3N.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a quantizer for performing bit compression of an input digital signal.

[0002]

2. Description of the Related Art Conventional D / A converters are published by Ia Publishing Co., Ltd. and published in Radio Technology Magazine December 1989, pages 56 to 5.
What is described on page 9 is known. Hereinafter, a conventional example will be described with reference to the drawings. FIG. 5 is a block diagram of a conventional quantizer. The local quantizer 100 requantizes an input digital signal into eleven values of -5 to +5, and outputs the digital signal. A subtractor 104 extracts a quantization error generated by the local quantizer 100. Here, the value actually output by the subtractor 104 is −Vq, where Vq is the quantization error generated by the local quantizer 100. This value is sequentially delayed by delay units 105 to 107,
After each output is weighted by 109, the outputs are added by adders 102 and 103, and the output of the adder 102 is added to the input digital signal by the adder 101 and added to the local quantizer 100. Where the multiplier 10
The values of the coefficients a and b included in 8, 109 are as follows. A = 3-k b = -3 + k The value of k determines the zero point (the point at which the quantization noise due to noise shaving becomes zero). If the value is small, the frequency of the zero point approaches 0 Hz. The frequency of the zero point increases, and this value is reduced to 1/512 (=
If 0.001953125) is selected, the frequency at the zero point is around 10 KHz, which is just a good point.

[0003] By operating as described above and operating with 32 times oversampling, a third-order noise shaving characteristic having one zero point in the audible band can be obtained.
A quantizer having a dynamic range of about 110 dB can be obtained.

[0004]

However, in the above configuration, when the power supply voltage is 5 V, the value of -5 to +5 is used.
Assuming that -5 is 0 V and +5 is 5 V, the maximum input signal component ± 3 (the remainder is a component due to noise) is -3 for 1 V and +3 for 4 V, (4
V-1V), the input signal component has an amplitude of 3 V, and although the power supply voltage is 5 V, only a maximum of 3 V signal can be obtained. The power supply voltage utilization rate when mounted on a P board or the like Was low.

SUMMARY OF THE INVENTION The present invention has been made in view of the above problems, and provides a quantizer having a smaller output gradation and an increased output level utilization rate.

[0006]

In order to solve this problem, a quantizer according to the present invention is arranged such that an output value is-
3N, -2N, -1N, 0, + 1N, + 2N, + 3N,
(N is a natural number), a local quantizer, means for extracting a quantization error Vq generated by the local quantizer, and a transfer function H (z). And a means for adding the output of the feedback filter and the input of the quantizer and inputting the result to the local quantizer. The transfer function H of the feedback filter
A quantizer characterized in that (z) is a transfer function of the following equation (1): H (z) = (1−z ⁻¹ ) ³ · Vq / (1−z ⁻¹ +0) .5z ^-2 ) -1 (1) It is possible to increase the output level utilization rate with less output gradation.

[0007]

DESCRIPTION OF THE PREFERRED EMBODIMENTS According to the first aspect of the present invention, an output value is -3N, -2N, -1 for an input.
N, 0, + 1N, + 2N, + 3N, (N is a natural number) 7
And a means for extracting a quantization error Vq generated by the local quantizer, and a transfer function H (z)
And a feedback filter for filtering the quantization error, and means for adding the output of the feedback filter and a quantizer input and inputting the result to the local quantizer,
A transfer function H (z) of the feedback filter is a transfer function represented by the following equation (1). Since the stability of the system is increased by using the following ΔΣ modulator, there is an effect that the inputtable level can be set to ± 2.37 while the output gradation is set to seven values of −3N to + 3N.

H (z) = (1−z ⁻¹ ) ³ · Vq / (1−z ⁻¹ +0.5 z ⁻² ) −1 (1) In the invention according to claim 2, the value of N is 864. 2. The quantizer according to claim 1, wherein the value of N is 13824 (= 864 × 16) when the input data is 16 bits. This eliminates the need to monitor the lower 9 bits when actually performing quantization by the quantizer, and has the effect of simplifying the structure of the quantizer.

According to a third aspect of the present invention, the value of N is 896.
2. The quantizer according to claim 1, wherein the value of N is 14336 (= 896 × 16) when the input data is 16 bits.
If the quantization is actually performed by the quantizer,
This eliminates the need to monitor one bit, and has the effect of simplifying the quantization configuration.

An embodiment of the present invention will be described below with reference to the drawings. (Embodiment 1) FIG. 1 is a block diagram showing an outline of a quantizer according to Embodiment 1 of the present invention, wherein 1 denotes an adder to which a digital input signal X is input, and 2 denotes an output of the adder 1. The input local quantizer 3 is an output Y of the local quantizer 2
, 4 is a feedback filter inserted between the subtractor 3 and the adder 1, and the local quantizer 2 converts the input data into -3N to + 3N. 7
The gradation is quantized and output. Here, the value of N is 138
24. The subtracter 3 extracts the difference between the input and output of the local quantizer 2. This difference corresponds to the quantization noise Vq generated by the local quantizer 2. Transfer function H expressed by equation (1)
The quantization noise Vq is fed back to the adder 1 via the feedback filter 4 having (z). Therefore, assuming that the input is X and the output is Y, the relationship expressed by equation (2) holds between the inputs and outputs X and Y.

Y = X + (1−z ⁻¹ ) ³ Vq / (1−z ⁻¹ + 0.5z ⁻² ) (2) FIG. 2 shows a 16-bit, 0-dB quantizer constructed as described above. This is an output spectrum when a sine wave is input, and a dynamic range of 115 dB can be obtained when operating with 64 times oversampling in the first embodiment.

Considering the output level of the present quantizer, the output of the local quantizer 2 is -7N of + 3N to + 3N.
It is a gradation. Since the quantization level of the local quantizer 2 is 13824 as described above, inputting a 16-bit 0 dB sine wave means inputting a sine wave having an amplitude difference of ± 32767.

This value, 32767, is changed to N, 13824.
When normalized with 16 bits, it is ± 32767 which is 0 dB.
Is divided by 13824 (normalized value) is 2.37. Conversely, 32767 is 2.37N, and the output of the local quantizer 2 is -3N to + 3N. When a signal is input, the local quantizer 2 outputs a value of ± 2.37N as an average value, and when mounted on a P board or the like, 2.37 / 3 of the power supply voltage can be used. The signal amplitude level of about 2.4 dB can be increased as compared with 3/5 = 0.6 in the conventional example, and a larger dynamic range can be obtained in mounting.

FIG. 3 is a block diagram showing the feedback filter 4 in FIG. 1 more specifically. 3, portions having the same functions as those in FIG. 1 are denoted by the same reference numerals as those in FIG. 1, and description thereof will be omitted. 3, the output terminal of the subtractor 3 is connected to the adder 1 via delay circuits 5, 6, 7, a multiplier 8, and an adder 9 connected in series.
6 and each series connection point between the delay circuits 6 and 7 are connected to a multiplier 1
0 and 11 are connected to adders 12 and 13, and the output terminal of the adder 9 is a delay circuit 1 connected in series.
4, 15 are connected to the adder 12 via the multiplier 16, and the series connection point of the delay circuits 14, 15 is connected to the adder 13 via the multiplier 17, and is obtained by the subtractor 3. The quantization noise Vq is sequentially delayed by the delay circuits 5, 6, and 7. Multipliers 10, 11, and 8 multiply the outputs of delay circuits 5, 6, and 7 by counts a, b, and c, and output the result.
Here, the values of the respective counts, a, b, and c are a = -2, b = +
2.5, c = -1. Therefore, the adder 9 has (-2z ^-1 + 2.5z ^-2 -z ^-3 ).
Vq is given. The output of the adder 9 is provided to the delay circuit 14 and the adder 1. The output of the adder 9 is a delay circuit 14,
Then, the multipliers 17 and 16 multiply the counts d and e, and the adders 13 and 12 add the multiplication results. Here, the values of the respective counts d and e are d = 1 and e = -0.5. Assuming that the output value of the adder 9 is S, the output values of the multipliers 17 and 16 are Sz ⁻¹ ,
0.5Sz ^-2 . When this is arranged, it becomes as shown in Formula (3).

S = (− 2z ⁻¹ + 2.5z ⁻² −z ⁻³ ) · Vq / (1−z ⁻¹ + 0.5z ⁻² ) (3) Therefore, if the input is X and the output is Y, Y = X + S + Vq
Therefore, when the equation (3) is substituted, the relational expression as shown in the equation (2) is established.

(Embodiment 2) FIG. 4 is a block diagram of Embodiment 2 in which a feedback filter in Embodiment 1 is simplified. In FIG. 4, parts having the same functions as those in FIG. Are given the same reference numerals as in, and description thereof is omitted. In FIG. 4, the output terminal of the subtractor 3 is connected to a subtracter 20 via a delay circuit 18 and a multiplier 19 connected in series, and the output terminal of the delay circuit 18 is connected to a subtractor 2 connected in series.
1, connected to a subtractor 20 via a delay circuit 22, a multiplier 23 and an adder 24, and an output terminal of the adder 24 is connected to an adder 24 and a subtractor 21 via a delay circuit 25; The quantization noise Vq generated by the local quantizer 2 is extracted by the subtractor 3. This quantization noise Vq is delayed by one clock by the delay circuit 18 and then
1 and sent to the multiplier 19. In the multiplier 19, the count a = 2
And output. In the subtracter 21, the delay circuit 25
Of the output of the delay circuit 18 and the output of the
Give to. The output of the delay circuit 22 is counted by a multiplier 23 as b
= 0.5 and a delay circuit 25
Is added to the output of The output of the adder 24 is provided to the delay circuit 25 and the subtractor 20. The adder 1 adds the input and the output S of the subtractor 20. Assuming that the output of the adder 24 is L, L = Lz ^-1 +0.5 (Vqz ^-1 -Lz ^-1 ) z ^-1 . Therefore, L is as shown in the equation (4).

L = 0.5z− ² · Vq / (1−z− ¹ + 0.5z− ² ) (4) Therefore, the output S of the adder 20 is as shown in Expression (5).

S = L−2z− ¹ · Vq = (− 2z− ¹ + 2.5z− ²⁻ z− ³ ) · Vq / (1−z ⁻ 1−0.5z− ² ) (5) Equation (5) ) And equation (3) have the same value, and it can be seen that the circuit shown in FIG. 4 and the circuit shown in FIG. 3 have similar functions.

[0019]

As described above, according to the present invention, a sufficient theoretical dynamic range can be obtained with a small number of gradations, and a larger signal amplitude can be obtained as compared with the prior art.
The dynamic range on board mounting can also be improved. Also, since the output gradation is small in the local quantizer, there is an effect that the local quantizer itself can be reduced in size as compared with the related art.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an outline of a quantizer according to a first embodiment of the present invention.

FIG. 2 is a spectrum diagram of an output obtained by a quantizer according to the first embodiment of the present invention.

FIG. 3 is a block diagram more specifically showing a feedback filter in the quantizer shown in FIG. 1;

FIG. 4 is a block diagram of a quantizer according to a second embodiment of the present invention.

FIG. 5 is a block diagram showing a conventional quantizer.

[Explanation of symbols]

1,9,12,13,24,101,102,103
Adder 2,100 local quantizer 3,20,21,104 subtractor 4 feedback filter 5,6,7,14,15,18,22,25,105,
106,107 delay circuit 8,10,11,16,17,19,23,108,1
09 Multiplier

Claims (3)

[Claims] An output value corresponding to an input is -3N,-
2N, −1N, 0, + 1N, + 2N, + 3N, where N is a natural number, and a means for extracting a quantization error Vq generated by the local quantizer, and a transfer function H ( z), a feedback filter for filtering the quantization error, and means for adding an output of the feedback filter and a quantizer input and inputting the sum to the local quantizer, A quantizer characterized in that the transfer function H (z) of the feedback filter is the transfer function of the following equation (1). H (z) = (1- z -1) 3 · Vq / (1-z -1 + 0.5z -2) -1 (1) 2. The quantizer according to claim 1, wherein the value of N is 864 times a power of 2. 3. The quantizer according to claim 1, wherein the value of N is 896 times a power of 2.