JPH11231273A - Optical semiconductor device - Google Patents

Optical semiconductor device

Info

Publication number
JPH11231273A
JPH11231273A JP10033265A JP3326598A JPH11231273A JP H11231273 A JPH11231273 A JP H11231273A JP 10033265 A JP10033265 A JP 10033265A JP 3326598 A JP3326598 A JP 3326598A JP H11231273 A JPH11231273 A JP H11231273A
Authority
JP
Japan
Prior art keywords
layer
light
inp
semiconductor layer
intensity
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10033265A
Other languages
Japanese (ja)
Inventor
Noriyuki Yokouchi
則之 横内
Jiyunji Yoshida
順自 吉田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Furukawa Electric Co Ltd
Original Assignee
Furukawa Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Furukawa Electric Co Ltd filed Critical Furukawa Electric Co Ltd
Priority to JP10033265A priority Critical patent/JPH11231273A/en
Priority to PCT/JP1999/000609 priority patent/WO1999041634A1/en
Publication of JPH11231273A publication Critical patent/JPH11231273A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/015Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on semiconductor elements having potential barriers, e.g. having a PN or PIN junction
    • G02F1/025Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on semiconductor elements having potential barriers, e.g. having a PN or PIN junction in an optical waveguide structure
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/015Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on semiconductor elements having potential barriers, e.g. having a PN or PIN junction
    • G02F1/0155Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on semiconductor elements having potential barriers, e.g. having a PN or PIN junction modulating the optical absorption
    • G02F1/0157Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on semiconductor elements having potential barriers, e.g. having a PN or PIN junction modulating the optical absorption using electro-absorption effects, e.g. Franz-Keldysh [FK] effect or quantum confined stark effect [QCSE]

Landscapes

  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • General Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Optical Modulation, Optical Deflection, Nonlinear Optics, Optical Demodulation, Optical Logic Elements (AREA)
  • Light Receiving Elements (AREA)

Abstract

(57)【要約】 【課題】 フランツ・ケルディッシュ効果を利用する光
半導体装置において、入射光強度が大きく、かつ印加電
圧が高い場合であっても、入射光強度と出射光強度の間
で良好な線形特性が得られる光半導体装置を提供する。 【解決手段】 この光半導体装置は、n型またはp型の
第1半導体から成る第1半導体層2と、その第1半導体
とは逆導電型の第2半導体から成る第2半導体層4の間
に真性半導体の層3が介装されたダブルヘテロ構造Hを
有し、真性半導体の層3は光の進行方向に厚みが漸減し
ていく。
(57) [Summary] [PROBLEMS] In an optical semiconductor device utilizing the Franz-Keldysh effect, even when the incident light intensity is large and the applied voltage is high, good between the incident light intensity and the output light intensity. Provided is an optical semiconductor device capable of obtaining excellent linear characteristics. The optical semiconductor device includes a first semiconductor layer 2 made of an n-type or p-type first semiconductor and a second semiconductor layer 4 made of a second semiconductor having a conductivity type opposite to that of the first semiconductor. Has a double hetero structure H in which an intrinsic semiconductor layer 3 is interposed, and the thickness of the intrinsic semiconductor layer 3 gradually decreases in the light traveling direction.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は光半導体装置に関
し、更に詳しくは、フランツ・ケルディッシュ効果を利
用して動作する装置であって、入射光強度が大きくかつ
印加する逆バイアス電圧が高い場合であっても、入射光
強度と出射光強度の間では良好な線形特性が得られる光
半導体装置に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an optical semiconductor device, and more particularly, to an optical semiconductor device which operates by utilizing the Franz-Keldysh effect when the intensity of incident light is large and the applied reverse bias voltage is high. Even so, the present invention relates to an optical semiconductor device capable of obtaining good linear characteristics between the intensity of incident light and the intensity of output light.

【0002】[0002]

【従来の技術】半導体から成る電界吸収型の光変調器
は、通常、真性(i型)半導体層を、そのi型半導体の
バンドギャップエネルギーよりも大きいバンドギャップ
エネルギーを有するp型半導体とn型半導体の層で挟ん
だpin構造またはnip構造のダブルヘテロ構造を有
している。
2. Description of the Related Art An electro-absorption type optical modulator made of a semiconductor generally has an intrinsic (i-type) semiconductor layer formed of a p-type semiconductor having a band gap energy larger than that of the i-type semiconductor and an n-type semiconductor. It has a double hetero structure of a pin structure or a nip structure sandwiched between semiconductor layers.

【0003】このダブルヘテロ構造の場合、i型半導体
層と、その上下に接合されているp型およびn型半導体
層との間における屈折率差に基づいて光導波路が形成さ
れ、i型半導体層に光を伝搬させることが可能になって
いる。そして、このダブルヘテロ構造に逆バイアス電圧
を印加すると、いわゆるフランツ・ケルディッシュ効果
が発揮され、i型半導体の光吸収係数が変化し、そのこ
とによってここを伝搬する光の強度が変調する。
In the case of this double hetero structure, an optical waveguide is formed based on the refractive index difference between the i-type semiconductor layer and the p-type and n-type semiconductor layers which are joined above and below the i-type semiconductor layer. It is possible to propagate light to the light. When a reverse bias voltage is applied to this double heterostructure, a so-called Franz-Keldysh effect is exerted, and the light absorption coefficient of the i-type semiconductor changes, thereby modulating the intensity of light propagating therethrough.

【0004】また、このような光変調器を導波路型受光
素子の前段に配置した状態で作動せしめ、当該受光素子
への入射光強度を減衰させることにより、受光素子に実
効的な感度可変動作を行わせるような光減衰器集積導波
路型受光素子も知られている。
Further, such an optical modulator is operated in a state arranged in front of a waveguide type light receiving element, and the intensity of light incident on the light receiving element is attenuated, so that an effective variable sensitivity operation of the light receiving element is achieved. There is also known an optical attenuator integrated waveguide type light receiving element for performing the following.

【0005】[0005]

【発明が解決しようとする課題】ところで、pin構造
に逆バイアス電圧を印加したときのフランツ・ケルディ
ッシュ効果の場合、i型半導体では、吸収された光によ
って電子と正孔が生成する。そして、これら電子と正孔
によって電界が形成され、この電界によって、外部から
印加した逆バイアス電圧が相殺されるという現象、いわ
ゆるクリーニング現象が発現する。このような現象は印
加する逆バイアス電圧の効果を減殺することであって装
置の動作にとっては好ましいことではない。
By the way, in the case of the Franz-Keldysh effect when a reverse bias voltage is applied to a pin structure, in an i-type semiconductor, electrons and holes are generated by absorbed light. Then, an electric field is formed by these electrons and holes, and a phenomenon that a reverse bias voltage applied from the outside is canceled out by this electric field, that is, a so-called cleaning phenomenon appears. Such a phenomenon reduces the effect of the applied reverse bias voltage and is not preferable for the operation of the device.

【0006】また、生成した正孔は、i型半導体層とp
型半導体層のヘテロ界面に蓄積し、そのため、外部から
印加した逆バイアス電圧はこのヘテロ界面に集中的に印
加されるという、いわゆるホールパイルアップ効果も発
現する。上記した2つの問題は、i型半導体層内に生成
する電子と正孔の濃度が高ければ高いほど顕著に引き起
こされる。すなわち、装置への入射光の強度が大きく、
かつ装置へ印加する逆バイアス電圧が大きく、i型半導
体層における光吸収が大きい状態にあるときほど上記し
た問題は顕著に発生してくる。
The generated holes are formed between the i-type semiconductor layer and the p-type semiconductor layer.
It accumulates at the hetero interface of the type semiconductor layer, so that a reverse bias voltage applied from the outside is concentratedly applied to this hetero interface, so that a so-called hole pile-up effect is also exhibited. The above two problems are more prominent as the concentration of electrons and holes generated in the i-type semiconductor layer is higher. That is, the intensity of light incident on the device is large,
In addition, the above-described problem becomes more prominent as the reverse bias voltage applied to the device is larger and the light absorption in the i-type semiconductor layer is larger.

【0007】そのため、フランツ・ケルディッシュ効果
を利用する電界吸収型光変調器の場合、印加電圧が大き
くなると、出射光強度が入射光強度に比例しなくなると
いう問題が発生する。いわゆる非線形特性を示すように
なる。このような問題に対しては、i型半導体層とp型
半導体層の間に、これら半導体のバンドギャップエネル
ギーの中間的なバンドギャップエネルギーを有する半導
体から成る層を導入することが提案されている(M. Suz
uki et al. Electronics Letters, vol. 25, p88〜89,
1989を参照)。
For this reason, in the case of an electroabsorption type optical modulator utilizing the Franz-Keldysh effect, when the applied voltage increases, a problem arises in that the intensity of the emitted light is not proportional to the intensity of the incident light. It shows a so-called non-linear characteristic. In order to solve such a problem, it has been proposed to introduce a layer made of a semiconductor having a band gap energy intermediate between the i-type semiconductor layer and the p-type semiconductor layer. (M. Suz
uki et al. Electronics Letters, vol. 25, p88-89,
1989).

【0008】しかしながら、上記した層構造を有する光
変調器の場合も前記した非線形特性を完全に解決するこ
とはできていない。しかも、上記層構造の場合は、強度
の大きい光信号の変調を行ったときに変調された光信号
が歪んで伝送特性の劣化を招くことが考えられる。ま
た、上記光変調器に導波路型受光素子を光結合した光減
衰器集積導波路型受光素子の場合、光変調器で変調され
た光信号の強度が大きくなると、受光素子で得られる受
光電流が歪んでしまうということが考えられる。
However, even in the case of the optical modulator having the above-mentioned layer structure, the above-mentioned nonlinear characteristics cannot be completely solved. In addition, in the case of the above-mentioned layer structure, it is conceivable that when a high intensity optical signal is modulated, the modulated optical signal is distorted to cause deterioration of transmission characteristics. Also, in the case of an optical attenuator integrated waveguide type light receiving element in which a waveguide type light receiving element is optically coupled to the above light modulator, when the intensity of the optical signal modulated by the optical modulator increases, the light receiving current obtained by the light receiving element May be distorted.

【0009】本発明は、フランツ・ケルディッシュ効果
を利用する光半導体装置における上記した問題、すなわ
ち、印加する逆バイアス電圧が大きくなると出射光強度
と入射光強度の間に非線形特性が生じてくるという問題
を解決し、高電圧印加においても出射光強度と入射光強
度の間で線形特性が得られる新規な光半導体装置と、そ
れを組み込んだ光減衰器集積導波路型受光素子の提供を
目的とする。
According to the present invention, the above-mentioned problem in the optical semiconductor device utilizing the Franz-Keldysh effect, that is, when the applied reverse bias voltage is increased, a non-linear characteristic is generated between the output light intensity and the incident light intensity. It aims to provide a novel optical semiconductor device that solves the problem and obtains linear characteristics between the intensity of emitted light and the intensity of incident light even when a high voltage is applied, and an optical attenuator integrated waveguide type photodetector incorporating the same. I do.

【0010】[0010]

【課題を解決するための手段】上記した目的を達成する
ために、本発明においては、n型またはp型の第1半導
体から成る第1半導体層と、前記第1半導体とは逆導電
型の第2半導体から成る第2半導体層との間に真性半導
体の層が介装されたダブルヘテロ構造を有し、前記真性
半導体の層は光の進行方向に厚みが漸減していくことを
特徴とする光半導体装置(第1装置という)が提供され
る。これはフランツ・ケルディッシュ効果を利用する光
変調器として使用される。
In order to achieve the above-mentioned object, according to the present invention, a first semiconductor layer made of an n-type or p-type first semiconductor is provided, and a first semiconductor layer having a reverse conductivity type to the first semiconductor is provided. It has a double hetero structure in which a layer of an intrinsic semiconductor is interposed between a second semiconductor layer made of a second semiconductor and the thickness of the layer of the intrinsic semiconductor gradually decreases in a light traveling direction. An optical semiconductor device (hereinafter referred to as a first device) is provided. This is used as an optical modulator utilizing the Franz-Keldysh effect.

【0011】また、本発明においては、上記光半導体装
置の光出射端に導波路型受光素子が光結合している光半
導体装置(第2装置という)、いわゆる光減衰器集積導
波路型受光素子が提供される。
Also, in the present invention, an optical semiconductor device in which a waveguide type light receiving element is optically coupled to a light emitting end of the optical semiconductor device (referred to as a second device), a so-called optical attenuator integrated waveguide type light receiving element. Is provided.

【0012】[0012]

【発明の実施の形態】以下、図面に基づいて本発明の装
置を詳細に説明する。図1は、電界吸収型の光変調器と
して機能する第1装置Aの断面構造を示す断面図であ
り、図2は図1のII−II線に沿う断面図である。この装
置Aの場合は、例えばn−InPから成る基板1の上に
同じくn−InPから成るバッファ層2が積層され、更
に、n−InPバッファ層2の上に、i−GaInAs
Pから成る光吸収層3aとi−InPから成る層3bが
この順序で積層されてi型半導体層3が形成され、i−
InP層3bの上には、p−InPから成るクラッド層
4、p−GaInAsから成るコンタクト層5が順次積
層された積層構造になっている。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The apparatus of the present invention will be described below in detail with reference to the drawings. FIG. 1 is a cross-sectional view showing a cross-sectional structure of a first device A functioning as an electro-absorption type optical modulator, and FIG. 2 is a cross-sectional view taken along line II-II of FIG. In the case of this device A, for example, a buffer layer 2 also made of n-InP is laminated on a substrate 1 made of n-InP, and further, on the n-InP buffer layer 2, i-GaInAs
A light absorbing layer 3a made of P and a layer 3b made of i-InP are stacked in this order to form an i-type semiconductor layer 3, and i-type semiconductor layer 3 is formed.
On the InP layer 3b, a clad layer 4 made of p-InP and a contact layer 5 made of p-GaInAs are sequentially laminated.

【0013】そして、p−InPクラッド層4とp−G
aInAsコンタクト層5の一部はエッチング除去され
てリッジ導波路を形成し、その側面と表面は誘電体絶縁
膜6で被覆され、p−GaInAsコンタクト層5の上
には上部電極7aが装荷され、基板1の裏面には下部電
極7bが装荷されている。また装置Aの両端面には例え
ばSiNxから成る無反射膜8a,8bが成膜され、光
の入射端面S1と光の出射端面S2が形成されている。
The p-InP cladding layer 4 and the p-G
A part of the aInAs contact layer 5 is removed by etching to form a ridge waveguide, and its side and surface are covered with a dielectric insulating film 6, and an upper electrode 7a is loaded on the p-GaInAs contact layer 5, A lower electrode 7b is loaded on the back surface of the substrate 1. Antireflection films 8a and 8b made of, for example, SiNx are formed on both end surfaces of the device A, and a light incident end surface S1 and a light output end surface S2 are formed.

【0014】この装置Aにおいて、n−InPバッファ
層2はn型の第1半導体層であり、その上のi−GaI
nAsP層3aは導波路層として機能し、その上のi−
InP層3bと一緒になってi型半導体層3を構成し、
更にその上のp−InPクラッド層4はp型の第2半導
体層であり、これらをもってpin構造のダブルヘテロ
構造Hが形成されている。
In this device A, the n-InP buffer layer 2 is an n-type first semiconductor layer, and the i-GaI
The nAsP layer 3a functions as a waveguide layer, and the i-
The i-type semiconductor layer 3 is constituted together with the InP layer 3b,
Further, the p-InP clad layer 4 thereover is a p-type second semiconductor layer, and a double hetero structure H having a pin structure is formed by these layers.

【0015】この装置Aにおける最大の特徴は、i型半
導体層3が光の入射端面S1から光の出射端面S2にか
けて、すなわち光の進行方向に沿ってその厚みが漸減し
ていることである。図1においては、i−InP層3b
の厚みを漸減させることにより、i型半導体層3の全体
を上記した状態にしている。この装置Aは、入射端面S
1から所定強度の光信号を入射しながら、上部電極7a
と下部電極7bの間に逆バイアス電圧を印加して作動さ
せる。このとき、i型半導体層3の厚みが光信号の進行
方向で漸減していくので、入射端面S1からの入射光強
度と出射端面S2からの出射光強度の間では、印加電圧
が大きい場合であっても良好な線形特性を得ることがで
きる。
The greatest feature of the device A is that the thickness of the i-type semiconductor layer 3 gradually decreases from the light incident end face S1 to the light emitting end face S2, that is, along the light traveling direction. In FIG. 1, the i-InP layer 3b
Is gradually reduced, so that the entire i-type semiconductor layer 3 is in the above-described state. This device A has an incident end surface S
While an optical signal having a predetermined intensity from 1 is incident, the upper electrode 7a
It operates by applying a reverse bias voltage between the lower electrode 7b and the lower electrode 7b. At this time, since the thickness of the i-type semiconductor layer 3 gradually decreases in the traveling direction of the optical signal, between the intensity of the incident light from the incident end face S1 and the intensity of the emitted light from the exit end face S2, when the applied voltage is large. Even so, good linear characteristics can be obtained.

【0016】これは次のような理由に基づくものである
と考えられる。i型半導体層3の厚みは光の進行方向に
沿って漸次薄くなっているために、逆バイアス電圧の印
加によって導波路層であるi−GaInAsP層3aに
生ずる電界強度は、光の進行方向に沿って漸次大きくな
っていく。したがって、フランツ・ケルディッシュ効果
は、i型半導体層3の厚みが厚い入射端面S1の近傍で
は小さく、またi型半導体層3の厚みが薄い出射端面S
2の近傍ほど大きくなっていく。そのため、このi型半
導体層3を伝搬する光信号は、光吸収係数が入射端面S
1で小さく、出射端面S2の方に進行するにつれて徐々
に大きくなっていく。
This is considered to be based on the following reasons. Since the thickness of the i-type semiconductor layer 3 is gradually reduced in the light traveling direction, the electric field strength generated in the waveguide layer i-GaInAsP layer 3a by the application of the reverse bias voltage is in the light traveling direction. Along with it. Therefore, the Franz-Keldysh effect is small near the incident end face S1 where the thickness of the i-type semiconductor layer 3 is large, and the emission end face S where the thickness of the i-type semiconductor layer 3 is small.
It becomes larger in the vicinity of 2. Therefore, the optical signal propagating through the i-type semiconductor layer 3 has a light absorption coefficient of the incident end face S
1 and gradually increases as it proceeds toward the emission end face S2.

【0017】一方、入射光の光強度は入射端面S1で最
も大きく、出射端面S2の方に進行する過程で徐々に吸
収され、その光強度を下げていく。したがって、装置A
のi型半導体層3においては、光強度が大きい領域での
電界強度は小さく、光強度の小さい領域におけるほどそ
の電界強度が大きくなっていく。そのため、光強度が大
きく、かつ電界強度も大きい場合に顕著に発現する電界
スクリーニング現象やホールパイルアップ効果が抑制さ
れ、伝搬光は良好な線形特性を示すようになるものと考
えられる。
On the other hand, the light intensity of the incident light is highest at the incident end face S1, and is gradually absorbed in the process of traveling toward the output end face S2, and the light intensity is reduced. Therefore, device A
In the i-type semiconductor layer 3 described above, the electric field intensity is low in the region where the light intensity is high, and the electric field intensity is higher in the region where the light intensity is lower. Therefore, it is considered that the electric field screening phenomenon and the hole pile-up effect, which are remarkably exhibited when the light intensity is high and the electric field intensity is high, are suppressed, and the propagating light is considered to exhibit good linear characteristics.

【0018】次に、この装置Aの具体例とその特性につ
いて説明する。まず、MOCVD法で、大きなn−In
P基板1の上に、厚み0.5μmのn−InPバッファ
層2,厚み0.1μmのi−GaInAsP光吸収層
(バンドギャップ波長1.2μm)3aを成膜した。つ
いで、i−GaInAsP光吸収層3aの上に、図3で
示したように、一対のマスク9a,9bで1個のユニッ
トマスク9を構成しているマスクパターンを例えばSi
Nxで成膜したのち、ここにi−InPを選択成長させ
る。ここで、このユニットマスク9は、狭幅な開口部9
cと漸次広幅になっていく開口部9dとを有しているの
で、i−GaInAsP光吸収層3aの上に成膜される
i−InP層は、狭幅開口部9cでは厚く、また広幅開
口部9dでは、前記狭幅開口部9cから遠ざかる箇所ほ
ど漸次その厚みは薄くなっている。具体的には、マスク
9a,9cの幅が最も広い領域ではi−InP層の厚み
が0.2μmとなり、狭幅開口部9cでのi−InP層
の厚みは0.6μmとなるようにマスクのパターンを調
整して選択成長を行った。
Next, a specific example of the device A and its characteristics will be described. First, by MOCVD, a large n-In
On the P substrate 1, an n-InP buffer layer 2 having a thickness of 0.5 μm and an i-GaInAsP light absorbing layer (band gap wavelength 1.2 μm) 3a having a thickness of 0.1 μm were formed. Next, as shown in FIG. 3, a mask pattern forming one unit mask 9 by a pair of masks 9a and 9b is formed on the i-GaInAsP light absorbing layer 3a by, for example, Si.
After film formation with Nx, i-InP is selectively grown here. Here, the unit mask 9 has a narrow opening 9.
c and the opening 9d that gradually widens, the i-InP layer formed on the i-GaInAsP light absorption layer 3a is thick in the narrow opening 9c and wide in the narrow opening 9c. In the portion 9d, the thickness is gradually reduced as the distance from the narrow opening 9c increases. Specifically, in the region where the width of the masks 9a and 9c is the widest, the thickness of the i-InP layer is 0.2 μm, and the thickness of the i-InP layer in the narrow opening 9c is 0.6 μm. The pattern was adjusted for selective growth.

【0019】i−InPの選択成長の終了後、ユニット
マスク9を全て除去し、全体の表面にp−InPを結晶
成長させて厚み2μmのp−InPクラッド層4を成膜
し、更にその上に厚み0.3μmのp−GaInAsコ
ンタクト層(バンドギャップ波長1.67μm)5を成
膜した。したがって、この時点で、n−InPバッファ
層2を第1半導体層とし、p−InPクラッド層4を第
2半導体層とし、その間に厚みが漸減しているi型半導
体層3が介装されているダブルヘテロ構造Hが形成され
る。
After the selective growth of i-InP, the unit mask 9 is completely removed, and p-InP is crystal-grown on the entire surface to form a 2 μm-thick p-InP cladding layer 4. Then, a 0.3 μm-thick p-GaInAs contact layer (band gap wavelength 1.67 μm) 5 was formed. Therefore, at this point, the n-InP buffer layer 2 is used as the first semiconductor layer, the p-InP cladding layer 4 is used as the second semiconductor layer, and the i-type semiconductor layer 3 whose thickness is gradually reduced is interposed therebetween. A double heterostructure H is formed.

【0020】ついで、p−GaInAsコンタクト層5
の表面のうち、ユニットマスク9の狭幅開口部9cであ
った箇所を被覆して幅10μmのストライプ状のエッチ
ングマスクを例えばSiNxで形成したのちエッチング
処理を行い、p−GaInAsコンタクト層とp−In
Pクラッド層の一部を除去し、図2で示したようなリッ
ジ導波路を形成した。
Next, the p-GaInAs contact layer 5
Of the surface of the unit mask 9, which was the narrow opening 9c of the unit mask 9, a 10 μm-wide striped etching mask was formed of, for example, SiNx, and then an etching process was performed to form a p-GaInAs contact layer and a p-GaInAs contact layer. In
A part of the P clad layer was removed to form a ridge waveguide as shown in FIG.

【0021】そして、全体の表面に例えばSiNxから
成る誘電体絶縁膜6を成膜したのちリッジ導波路の頂上
部分を除去してp−GaInAsコンタクト層5を表出
せしめ、ここに、例えばTi/Pt/Auを蒸着して上
部電極7aを装荷する。また基板1の裏面を研磨して全
体の厚みを100μm程度にしたのちそこに例えばAu
GeNi/Auを蒸着して下部電極7bを装荷する。
Then, after forming a dielectric insulating film 6 made of, for example, SiNx on the entire surface, the top portion of the ridge waveguide is removed to expose the p-GaInAs contact layer 5, where, for example, Ti / The upper electrode 7a is loaded by depositing Pt / Au. The back surface of the substrate 1 is polished to reduce the overall thickness to about 100 μm, and then, for example, Au
GeNi / Au is deposited to load the lower electrode 7b.

【0022】ついで、図3で示したC0,C1の箇所で
劈開して複数個の積層構造を製造し、それぞれの両劈開
面に例えばSiNxを用いて波長1.3μmの光の反射
率が1%以下となるような無反射膜8a,8bを成膜す
ることにより図1で示した装置Aが得られる。ここで、
図3のC1の箇所で劈開した端面が入射端面S1とな
り、C0の箇所で劈開した端面が出射端面となる。
Next, the substrate is cleaved at the locations C0 and C1 shown in FIG. 3 to produce a plurality of laminated structures, and the reflectance of light having a wavelength of 1.3 μm is set to 1 on both of the cleavage surfaces using, for example, SiNx. %, The device A shown in FIG. 1 is obtained. here,
The end face cleaved at the point C1 in FIG. 3 is the incident end face S1, and the end face cleaved at the point C0 is the output end face.

【0023】この装置Aの変調特性を図4の○印で示
す。図4は、光源として発振波長1.3μmの半導体レ
ーザを用い、入射光の光強度が1mWであるときの結果
である。比較のために、i−GaInAsP光吸収層3
aの上にユニットマスク9を形成せず、i−InP層3
bの成膜時には選択成長を行わずに、当該i−InP層
3bを均一な厚み0.5μmで形成したことを除いては
装置Aと同様の条件で光変調器を製造した。その変調特
性も図4の●印で示した。
The modulation characteristic of the device A is indicated by a circle in FIG. FIG. 4 shows the results when a semiconductor laser having an oscillation wavelength of 1.3 μm is used as the light source and the light intensity of the incident light is 1 mW. For comparison, the i-GaInAsP light absorbing layer 3
a, the unit mask 9 is not formed on the i-InP layer 3
An optical modulator was manufactured under the same conditions as in the apparatus A except that the i-InP layer 3b was formed to have a uniform thickness of 0.5 μm without performing selective growth when forming the film b. The modulation characteristics are also shown by the mark ● in FIG.

【0024】図4から明らかなように、本発明の装置
A,比較例装置は、いずれも、逆バイアス電圧10Vの
印加で約10dBの出射光強度の低下が認められ、良好な
光変調器として動作している。また、装置Aと比較例装
置のそれぞれにおいて印加する逆バイアス電圧を変化さ
せ、そのときの入射光強度と出射光強度の関係を測定し
た。装置Aの場合の結果を図5に、比較例装置の場合の
結果を図6にそれぞれ示した。
As is apparent from FIG. 4, in the device A of the present invention and the comparative example device, the emission light intensity was reduced by about 10 dB when the reverse bias voltage of 10 V was applied, and as a good optical modulator. It is working. Further, the reverse bias voltage applied in each of the apparatus A and the comparative example apparatus was changed, and the relationship between the incident light intensity and the output light intensity at that time was measured. The result in the case of the apparatus A is shown in FIG. 5, and the result in the case of the comparative example apparatus is shown in FIG.

【0025】図5から明らかなように、本発明の装置A
では、印加電圧10Vまでの間、出射光強度と入射光強
度は比例関係にあり、良好な線形特性が得られている。
一方、比較例装置の場合は、印加電圧が5V以上になる
と出射光強度と入射光強度の比例関係は崩れ、非線形に
なってしまう。次に本発明の別の装置Bについて説明す
る。
As is clear from FIG. 5, the apparatus A of the present invention
In this case, the outgoing light intensity and the incident light intensity are in a proportional relationship up to an applied voltage of 10 V, and excellent linear characteristics are obtained.
On the other hand, in the case of the comparative example device, when the applied voltage is 5 V or more, the proportional relationship between the intensity of the emitted light and the intensity of the incident light is broken, and the device becomes non-linear. Next, another apparatus B of the present invention will be described.

【0026】図7は本発明の別の装置Bの断面構造を示
す断面図であり、図8は図7のVIII−VIII線に沿う断面
図であり、また図9は図7のIX−IX線に沿う断面図であ
る。この装置Bは、図1と図2で示した断面構造の光変
調器A、すなわち、ダブルヘテロ構造Hを有する装置A
と導波路型受光素子B1が光結合して集積された構造に
なっている。
FIG. 7 is a sectional view showing a sectional structure of another apparatus B of the present invention, FIG. 8 is a sectional view taken along line VIII-VIII of FIG. 7, and FIG. 9 is IX-IX of FIG. It is sectional drawing which follows a line. This device B is an optical modulator A having a cross-sectional structure shown in FIGS.
And the waveguide type light receiving element B1 are optically coupled and integrated.

【0027】この装置Bでは、入射端面S1からの入射
光は、i型半導体層3を伝搬する過程で、既に説明した
ように、良好な線形特性を有する出射光となって、後述
する導波路型受光素子B1に入射し、そこで受光電流と
して検出される。このとき、光変調器Aからの出射光の
線形特性は良好であって歪んでいないため、導波路型受
光素子B1における受光電流も歪むことはない。
In this device B, the incident light from the incident end face S1 becomes an outgoing light having a good linear characteristic as described above in the process of propagating through the i-type semiconductor layer 3, and becomes a waveguide to be described later. The light enters the light receiving element B1, where it is detected as a light receiving current. At this time, since the linear characteristic of the light emitted from the optical modulator A is good and not distorted, the light receiving current in the waveguide type light receiving element B1 is not distorted.

【0028】ここで、受光素子B1は例えば次のような
層構造になっている。すなわち、n−InPから成る基
板1の上にn−InPから成るバッファ層2が積層さ
れ、そのn−InPバッファ層2の上に、i−GaIn
AsPから成る光吸収層3a,i−InPから成るスペ
ーサ層3c,i−GaInAsPから成る光吸収層3d
がこの順序で積層されてi型半導体層3が形成され、更
に、i−GaInAsP光吸収層3dの上にはp−In
Pから成るクラッド層4’,p−GaInAsから成る
コンタクト層5が順次積層された積層構造になってい
る。そして、この積層構造は少なくともn−InPバッ
ファ層2に到達するまでエッチング除去されてリッジ導
波路が形成され、このリッジ導波路はFeドープInP
層10で埋設され、表面は誘電体絶縁膜6で被覆され、
p−GaInAsコンタクト層5の上には受光電流検知
用の上部電極7cが装荷されている。なお、この受光素
子B1における下部電極は光変調器Aの下部電極7bと
共通になっている。
Here, the light receiving element B1 has, for example, the following layer structure. That is, a buffer layer 2 made of n-InP is laminated on a substrate 1 made of n-InP, and i-GaIn
Light absorption layer 3a made of AsP, spacer layer 3c made of i-InP, light absorption layer 3d made of i-GaInAsP
Are stacked in this order to form an i-type semiconductor layer 3, and p-In is further formed on the i-GaInAsP light absorbing layer 3d.
It has a laminated structure in which a cladding layer 4 'made of P and a contact layer 5 made of p-GaInAs are sequentially stacked. Then, the laminated structure is etched away at least until it reaches the n-InP buffer layer 2 to form a ridge waveguide, and this ridge waveguide is made of Fe-doped InP.
Buried with a layer 10, the surface is covered with a dielectric insulating film 6,
On the p-GaInAs contact layer 5, an upper electrode 7c for detecting a received light current is loaded. The lower electrode of the light receiving element B1 is common to the lower electrode 7b of the optical modulator A.

【0029】次に、この装置Bの具体例とその特性につ
いて説明する。まず最初に導波路型受光素子B1の層構
造を形成する。すなわち、MOCVD法で、装置Aの場
合と同じように、大きなn−InP基板1の上に、厚み
0.5μmのn−InPバッファ2,厚み0.1μmのi
−GaInAsP光吸収層(バンドギャップ波長1.2
μm)3aを成膜し、続けて、その上に厚み0.01μ
mの非常に薄いi−InPスペーサ層3c,厚み0.1
μmのi−GaInAsP光吸収層(バンドギャップ波
長1.45μm)3d,厚み0.1μmの薄いp−InP
クラッド層4’,図示しない厚み0.05μmのp−G
aInAsエッチング停止層(バンドギャップ波長1.
67μm)を順次成膜する。
Next, a specific example of the device B and its characteristics will be described. First, the layer structure of the waveguide type light receiving element B1 is formed. That is, as in the case of the apparatus A, a 0.5 μm thick n-InP buffer 2 and a 0.1 μm thick i-type
-GaInAsP light absorbing layer (bandgap wavelength 1.2
μm) 3a is formed into a film, followed by a thickness of 0.01 μm
m very thin i-InP spacer layer 3c, thickness 0.1
3 μm i-GaInAsP light absorption layer (bandgap wavelength 1.45 μm), thin p-InP 0.1 μm thick
Cladding layer 4 ', p-G having a thickness of 0.05 μm (not shown)
aInAs etching stop layer (band gap wavelength 1.
67 μm).

【0030】ついで、形成すべき受光素子B1に相当す
る箇所の表面を例えばSiNxのような誘電体膜で被覆
したのち選択エッチングを行なってi−GaInAsP
光吸収層3aの上の積層構造部分を除去する。具体的に
は、p−GaInAsエッチング停止層とi−GaIn
AsP光吸収層3dをエッチング除去するときは、硫酸
と過酸化水素と水の混合物をエッチャントAとして用
い、またp−InPクラッド層4’をエッチング除去す
るときは、塩酸とリン酸の混合液をエッチャントBとし
て用いる。このとき、i−InPスペーサ層3cは、上
記エッチング処理時に、i−GaInAsP光吸収層3
aを残置せしめるための緩衝層として機能する。
Next, after covering the surface of a portion corresponding to the light receiving element B1 to be formed with a dielectric film such as SiNx, selective etching is performed to form i-GaInAsP.
The layered structure on the light absorbing layer 3a is removed. Specifically, the p-GaInAs etching stop layer and the i-GaIn
A mixture of sulfuric acid, hydrogen peroxide, and water is used as the etchant A when etching the AsP light absorbing layer 3d, and a mixture of hydrochloric acid and phosphoric acid is used when etching the p-InP cladding layer 4 '. Used as etchant B. At this time, the i-InP spacer layer 3c becomes the i-GaInAsP light absorbing layer 3 during the etching process.
It functions as a buffer layer for leaving a.

【0031】ついで、誘電体膜を除去したのち、全体の
表面のうち、光変調器Aを形成すべき箇所に装置Aの製
造に関して図3で示したと同じような選択成長用のマス
クパターンを形成し、平坦部の厚みが0.2μmとなる
ようにi−InPを選択成長させる。光変調器を形成す
べき箇所におけるi−GaInAsP光吸収層3a(ま
たはその上のi−InPスペーサ層3c)の上には光の
進行方向に沿って厚みが漸減するi−InP層3bが成
膜され、また受光素子B1を形成すべき箇所には厚みが
略均一なi−InP層が形成される。
Then, after removing the dielectric film, a mask pattern for selective growth similar to that shown in FIG. 3 for manufacturing the device A is formed on the entire surface where the optical modulator A is to be formed. Then, i-InP is selectively grown so that the thickness of the flat portion becomes 0.2 μm. On the i-GaInAsP light absorbing layer 3a (or the i-InP spacer layer 3c thereon) at the position where the optical modulator is to be formed, there is formed an i-InP layer 3b whose thickness gradually decreases along the traveling direction of light. An i-InP layer having a substantially uniform thickness is formed at a place where the light receiving element B1 is to be formed.

【0032】ついで、選択成長用のマスクパターンを除
去し、形成すべき光変調器Aに相当する箇所を誘電体膜
で被覆したのち、前記エッチャントB,エッチャントA
を用いたエッチング処理を順次行う。その結果、形成す
べき受光素子B1に相当する箇所に成膜されているi−
InP層はエッチング除去され、また図示しないp−G
aInAsエッチング停止層もエッチング除去され、厚
み0.1μmのp−InPクラッド層4’が表出する。
Next, after removing the mask pattern for selective growth and covering a portion corresponding to the optical modulator A to be formed with a dielectric film, the etchant B and the etchant A are formed.
Are sequentially performed. As a result, the i- film formed at a position corresponding to the light receiving element B1 to be formed is formed.
The InP layer is removed by etching, and p-G (not shown)
The aInAs etching stop layer is also etched away, exposing a 0.1 μm thick p-InP cladding layer 4 ′.

【0033】ついで、形成すべき光変調器Aの箇所を被
覆する誘電体膜を除去して、その部分のi−InP層3
bを表出せしめたのち、全体の表面を被覆して光変調器
A,受光素子B1に相当する箇所に厚み2μmのp−I
nPクラッド層4,厚み0.3μmのp−GaInAs
コンタクト層(バッドギャップ波長1.67μm)5を
順次成膜する。
Next, the dielectric film covering the portion of the optical modulator A to be formed is removed, and the i-InP layer 3 in that portion is removed.
After exposing b, the entire surface is covered and a 2-μm-thick p-I is formed at a position corresponding to the optical modulator A and the light receiving element B1.
nP cladding layer 4, 0.3 μm thick p-GaInAs
A contact layer (bad gap wavelength 1.67 μm) 5 is sequentially formed.

【0034】つぎに、全体の表面に、幅約10μmのス
トライプ形状をなし、かつ形成すべき光変調器Aと受光
素子B1との境界箇所には幅3μmの開口部を有するマ
スクを例えばSiNxで形成したのちエッチング処理を
行い、少なくともn−InPバッファ層2に到達するま
での部分をエッチング除去して前記境界箇所が横断溝に
なっているリッジ導波路を形成する。
Next, a mask having a stripe shape with a width of about 10 μm on the entire surface and having an opening with a width of 3 μm at the boundary between the optical modulator A and the light receiving element B1 to be formed is made of, for example, SiNx. After the formation, an etching process is performed, and at least a portion until reaching the n-InP buffer layer 2 is removed by etching to form a ridge waveguide in which the boundary portion is a transverse groove.

【0035】ついで、前記マスクを残置せしめたまま、
FeドープInPを結晶成長させて、当該リッジ導波路
の側面と前記横断溝をFeドープInP層10で埋設す
る。その後、前記マスクを一旦除去し、あらためて全体
の表面に誘電体絶縁膜6を成膜したのち、形成すべき光
変調器Aと受光素子B1の上面に相当する箇所の誘電体
絶縁膜の部分を除去してp−GaInAsコンタクト層
6,6を表出せしめ、そこに、それぞれの上部電極7
a,7cを装荷する。
Then, while leaving the mask,
The crystal of Fe-doped InP is grown, and the side surface of the ridge waveguide and the transverse groove are buried with the Fe-doped InP layer 10. Thereafter, the mask is once removed, and a dielectric insulating film 6 is newly formed on the entire surface. Then, the portions of the dielectric insulating film corresponding to the upper surfaces of the optical modulator A and the light receiving element B1 to be formed are removed. After removal, the p-GaInAs contact layers 6 and 6 are exposed.
a, 7c are loaded.

【0036】また、基板1の裏面を研磨して全体の厚み
を100μm程度にし、そこに下部電極7bを装荷した
のち、形成すべき光変調器Aの前端部を劈開しその劈開
面に波長1.3μmの光の反射率が1%以下になるよう
な無反射膜8aを成膜して入射端面S1を形成する。そ
して、全体を分離することにより、光変調器Aと導波路
型受光素子B1が光の進行方向ではFeドープInP層
12を介して光結合されている図7の装置B1が得られ
る。
The back surface of the substrate 1 is polished to a total thickness of about 100 μm, a lower electrode 7b is loaded thereon, and the front end of the optical modulator A to be formed is cleaved. An incident end face S1 is formed by forming a non-reflective film 8a such that the reflectivity of 0.3 μm light becomes 1% or less. Then, by separating the whole, the device B1 of FIG. 7 in which the optical modulator A and the waveguide type light receiving element B1 are optically coupled via the Fe-doped InP layer 12 in the light traveling direction is obtained.

【0037】この装置Bの受光感度特性を図10に示
す。図10は、受光素子B1に5Vの逆バイアス電圧を
印加した状態で、光変調器Aに印加する逆バイアス電圧
をパラメータとしてそのときの入射光強度と受光素子B
1における受光電流との関係を示す。図10から明らか
なように、光変調器Aに10Vの逆バイアス電圧を印加
した場合であっても、入射光強度と受光電流とは比例関
係にあり、良好な線形特性が得られている。これは、光
減衰器である光変調器Aが、入射光強度大、かつ印加電
圧大であっても、入射光強度と出射光強度の開では良好
な線形特性を示し、したがってその出射端面から受光素
子B1に入射する光も歪んでいないからである。
FIG. 10 shows the light receiving sensitivity characteristics of the device B. FIG. 10 shows a state in which a reverse bias voltage of 5 V is applied to the light receiving element B1 and the incident light intensity and the light receiving element B at that time using the reverse bias voltage applied to the optical modulator A as a parameter.
1 shows the relationship with the light receiving current. As is clear from FIG. 10, even when a reverse bias voltage of 10 V is applied to the optical modulator A, the incident light intensity and the received light current are in a proportional relationship, and good linear characteristics are obtained. This is because even if the optical modulator A, which is an optical attenuator, has a large incident light intensity and a large applied voltage, it shows good linear characteristics when the incident light intensity and the outgoing light intensity are open, and therefore, from the exit end face. This is because the light incident on the light receiving element B1 is not distorted.

【0038】また、装置A,装置Bのいずれにおいて
も、従来からの慣用技術である中間層を用いていない
が、本発明の層構造と中間層は互いに独立した効果を発
揮するので、両者を組み合わせることにより更に多様な
効果を発揮させることができる。更に、装置A,装置B
は波長1.3μmの光で動作する事例であるが、本発明
装置の技術思想は、フランツ・ケルディッシュ効果を利
用する装置であるならば、波長1.55μmや波長0.8
5μmなどの光に対しても同様の効果を発揮し得ること
は明らかである。
In each of the apparatuses A and B, the intermediate layer, which is a conventional technique, is not used. However, since the layer structure and the intermediate layer of the present invention exhibit an effect independent of each other, both are used. Various effects can be exhibited by combining them. Further, device A, device B
Is an example of operating with light having a wavelength of 1.3 μm, but the technical idea of the device of the present invention is that if the device utilizes the Franz-Keldysh effect, the wavelength is 1.55 μm or 0.8.
It is clear that a similar effect can be exerted even for light of 5 μm or the like.

【0039】[0039]

【発明の効果】以上の説明で明らかなように、本発明の
光半導体装置は、それを光変調器として用いた場合、入
射光強度が大きく、かつ印加電圧が高いときであっても
入射光強度と出射光強度の間では良好な線形特性が得ら
れる。また、それを集積した光減衰器集積導波路型受光
素子の場合には、入射光強度が大きくてもそれに比例し
た受光電流を得ることができる。
As is clear from the above description, when the optical semiconductor device of the present invention is used as an optical modulator, the incident light intensity is high and the incident light intensity is high even when the applied voltage is high. Good linear characteristics can be obtained between the intensity and the output light intensity. Also, in the case of an optical attenuator integrated waveguide type light receiving element in which the light receiving element is integrated, a light receiving current proportional to the incident light intensity can be obtained.

【0040】これは、pin構造またはnip構造のダ
ブルヘテロ構造において、i型半導体層の厚みを光の進
行方向に沿って漸減させたことがもたらす効果である。
This is an effect that the thickness of the i-type semiconductor layer is gradually reduced along the light traveling direction in the double heterostructure of the pin structure or the nip structure.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明装置Aの断面構造を示す断面図である。FIG. 1 is a sectional view showing a sectional structure of a device A of the present invention.

【図2】図1のII−II線に沿う断面図である。FIG. 2 is a cross-sectional view taken along the line II-II of FIG.

【図3】i−InPを選択成長させるときのマスクパタ
ーン例を示す部分斜視図である。
FIG. 3 is a partial perspective view showing an example of a mask pattern when selectively growing i-InP.

【図4】装置Aの変調特性を示すグラフである。FIG. 4 is a graph showing a modulation characteristic of the device A;

【図5】装置Aにおける入射光強度と出射光強度の関係
を示すグラフである。
FIG. 5 is a graph showing a relationship between an incident light intensity and an outgoing light intensity in the device A.

【図6】比較例装置における入射光強度と出射光強度の
関係を示すグラフである。
FIG. 6 is a graph showing a relationship between an incident light intensity and an outgoing light intensity in the comparative example device.

【図7】本発明装置Bの断面構造を示す断面図である。FIG. 7 is a sectional view showing a sectional structure of the device B of the present invention.

【図8】図7のVIII−VIII線に沿う断面図である。8 is a sectional view taken along the line VIII-VIII in FIG.

【図9】図7のIX−IX線に沿う断面図である。FIG. 9 is a sectional view taken along line IX-IX in FIG. 7;

【図10】装置Bの受光感度特性を示すグラフである。FIG. 10 is a graph showing the light receiving sensitivity characteristics of the device B.

【符号の説明】[Explanation of symbols]

1 n−InP基板 2 n−InPバッファ層(第1半導体層) 3 i型半導体層 3a i−GaInAsP光吸収層 3b i−InP層 3c i−InPスペーサ層 3d i−GaInAs光吸収層 4,4’ p−InPクラッド層(第2半導体層) 5 p−GaInAsコンタクト層 6 誘電体絶縁膜 7a,7c 上部電極 7b 下部電極 8a,8b 無反射膜 9 ユニットマスク 9a,9b マスク 10 FeドープInP層 Reference Signs List 1 n-InP substrate 2 n-InP buffer layer (first semiconductor layer) 3 i-type semiconductor layer 3 a i-GaInAsP light absorbing layer 3 bi-InP layer 3 ci i-InP spacer layer 3 di-GaInAs light absorbing layer 4, 4 'p-InP cladding layer (second semiconductor layer) 5 p-GaInAs contact layer 6 dielectric insulating film 7a, 7c upper electrode 7b lower electrode 8a, 8b antireflection film 9 unit mask 9a, 9b mask 10 Fe-doped InP layer

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 n型またはp型の第1半導体から成る第
1半導体層と、前記第1半導体とは逆導電型の第2半導
体から成る第2半導体層との間に真性半導体の層が介装
されたダブルヘテロ構造を有し、前記真性半導体の層は
光の進行方向に厚みが漸減していくことを特徴とする光
半導体装置。
An intrinsic semiconductor layer is interposed between a first semiconductor layer made of an n-type or p-type first semiconductor and a second semiconductor layer made of a second semiconductor having an opposite conductivity type to the first semiconductor. An optical semiconductor device having an interposed double hetero structure, wherein the thickness of the intrinsic semiconductor layer gradually decreases in the light traveling direction.
【請求項2】 請求項1の光半導体装置の光出射端に導
波路型受光素子が光結合されている光半導体装置。
2. An optical semiconductor device according to claim 1, wherein a waveguide type light receiving element is optically coupled to the light emitting end of the optical semiconductor device according to claim 1.
JP10033265A 1998-02-16 1998-02-16 Optical semiconductor device Pending JPH11231273A (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP10033265A JPH11231273A (en) 1998-02-16 1998-02-16 Optical semiconductor device
PCT/JP1999/000609 WO1999041634A1 (en) 1998-02-16 1999-02-12 Optical semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10033265A JPH11231273A (en) 1998-02-16 1998-02-16 Optical semiconductor device

Publications (1)

Publication Number Publication Date
JPH11231273A true JPH11231273A (en) 1999-08-27

Family

ID=12381701

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10033265A Pending JPH11231273A (en) 1998-02-16 1998-02-16 Optical semiconductor device

Country Status (2)

Country Link
JP (1) JPH11231273A (en)
WO (1) WO1999041634A1 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001117058A (en) * 1999-10-14 2001-04-27 Oki Electric Ind Co Ltd Semiconductor waveguide element and method for manufacturing the same

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06100737B2 (en) * 1988-02-26 1994-12-12 国際電信電話株式会社 Light modulator
JPH0498880A (en) * 1990-08-17 1992-03-31 Nec Corp Photodetector
JP2715864B2 (en) * 1993-11-15 1998-02-18 日本電気株式会社 Nonlinear optical element
JP2921397B2 (en) * 1994-06-14 1999-07-19 日本電気株式会社 Nonlinear optical element

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001117058A (en) * 1999-10-14 2001-04-27 Oki Electric Ind Co Ltd Semiconductor waveguide element and method for manufacturing the same

Also Published As

Publication number Publication date
WO1999041634A1 (en) 1999-08-19

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