JPH11249766A - Power supply voltage abnormality detector for multiple boards - Google Patents
Power supply voltage abnormality detector for multiple boardsInfo
- Publication number
- JPH11249766A JPH11249766A JP10047318A JP4731898A JPH11249766A JP H11249766 A JPH11249766 A JP H11249766A JP 10047318 A JP10047318 A JP 10047318A JP 4731898 A JP4731898 A JP 4731898A JP H11249766 A JPH11249766 A JP H11249766A
- Authority
- JP
- Japan
- Prior art keywords
- power supply
- supply voltage
- board
- voltage abnormality
- monitoring
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
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- Power Sources (AREA)
Abstract
(57)【要約】
【課題】 多数基板で構成されている回路装置に、電源
電圧が基板駆動のためにある規定範囲から外れた場合、
基板単位で電源電圧異常を示し、かつ電源電圧値を自動
保持し、保持データを読み出し、電源電圧異常を基板単
位で検証する保守機能を持たせる。
【解決手段】 複数の基板を有する回路装置に、基板の
電源電圧を監視する監視手段と、電源電圧が規定範囲を
越えた場合アラームを発生させるアラーム手段を備える
とともに、全基板から電源電圧の監視データを受信、エ
ラー発生時にどの基板が電源電圧異常を生じていたかを
識別する識別手段を備える。
(57) [Summary] [PROBLEMS] When a power supply voltage deviates from a predetermined range for driving a substrate in a circuit device composed of many substrates,
A maintenance function is provided for indicating a power supply voltage abnormality on a board-by-board basis, automatically holding the power supply voltage value, reading stored data, and verifying the power supply voltage abnormality on a board-by-board basis. SOLUTION: A circuit device having a plurality of boards is provided with monitoring means for monitoring a power supply voltage of the boards, alarm means for generating an alarm when the power supply voltage exceeds a specified range, and monitoring of the power supply voltages from all the boards. An identification means is provided for receiving data and identifying which board has a power supply voltage abnormality when an error occurs.
Description
【0001】[0001]
【発明の属する技術分野】本発明は多数基板で構成され
ていても、基板駆動のために供給される直流電源電圧が
ある範囲から外れた時、各基板ごとに電圧異常発生が検
出でき、かつ異常電圧値を記録・読み出しができ、さら
に文字表示やブザーで検出結果を知らせることにより、
基板単位の保守効率を高めるるようにした多数基板を持
つ回路装置における電源電圧異常検出装置に関するもの
である。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention can detect the occurrence of a voltage abnormality for each substrate when a DC power supply voltage supplied for driving the substrate is out of a certain range, even if the substrate comprises a large number of substrates. The abnormal voltage value can be recorded and read out, and furthermore, by notifying the detection result by character display and buzzer,
The present invention relates to a power supply voltage abnormality detecting device in a circuit device having a large number of substrates for improving the maintenance efficiency of each substrate.
【0002】[0002]
【従来の技術】メイン基板において、供給される電源電
圧が基板駆動のためにある規定範囲から外れた場合、そ
の電圧値を検出して電源電圧異常時の待避動作のみ行っ
ていた。しかし、装置が多数の基板で構成されている場
合、各基板における電源電圧は供給電源からのケーブル
等による電圧降下によりまちまちであり、各基板の電源
電圧異常による誤動作で多種にわたるエラーが発生する
場合もありうる。そのため、メイン基板の電源電圧異常
検出のみならず、全ての基板において電源電圧異常が原
因でエラーが発生したか明確に判別できるより詳細な検
証が必要となった。また、電源電圧異常を検出した場
合、基板毎にデータとして電源電圧値を読み出せるよう
に電源電圧値の自動保持を行い、異常電圧値の検証・警
告できる保守性の向上が必要となった。2. Description of the Related Art In a main board, when a supplied power supply voltage deviates from a predetermined range for driving the board, the voltage value is detected and only a retreat operation is performed when the power supply voltage is abnormal. However, when the device is composed of a large number of boards, the power supply voltage on each board varies due to the voltage drop from the power supply cable, etc., and various errors occur due to malfunction due to abnormal power supply voltage on each board. It is possible. For this reason, not only detection of the power supply voltage abnormality of the main board but also more detailed verification that can clearly determine whether an error has occurred due to the power supply voltage abnormality in all the boards is required. Further, when a power supply voltage abnormality is detected, the power supply voltage value is automatically held so that the power supply voltage value can be read as data for each board, and it is necessary to improve maintainability to verify and warn the abnormal voltage value.
【0003】[0003]
【発明が解決しようとする課題】本発明の目的は、多数
基板で構成されている回路装置で、電源電圧が基板駆動
のためにある規定範囲から外れた場合、基板単位で電源
電圧異常を示し、かつ電源電圧値を自動保持し、その保
持されたデータを読み出し、電源電圧異常の発生や動作
不良の原因が電源電圧異常であるかどうかを基板単位で
詳細に検証できる保守機能を持たせることである。SUMMARY OF THE INVENTION It is an object of the present invention to provide a circuit device having a large number of substrates, and when a power supply voltage is out of a predetermined range for driving the substrates, a power supply voltage abnormality is indicated for each substrate. In addition, a maintenance function that automatically holds the power supply voltage value, reads out the stored data, and verifies whether the cause of the power supply voltage abnormality or malfunction due to the power supply voltage abnormality in detail for each board is provided. It is.
【0004】[0004]
【課題を解決するための手段】ある範囲の電源電圧で駆
動している複数の基板を有する回路装置において、基板
の電源電圧を監視する監視手段と、電源電圧が規定範囲
を越えた場合アラームを発生させるアラーム手段を備え
るとともに、全基板から電源電圧の監視データを受信、
エラー発生時にどの基板が電源電圧異常を生じていたか
を識別する識別手段とを備えたことを特徴とする電源電
圧異常検出装置により達成される。SUMMARY OF THE INVENTION In a circuit device having a plurality of substrates driven by a certain range of power supply voltage, monitoring means for monitoring the power supply voltage of the substrate, and alarming when the power supply voltage exceeds a specified range. In addition to providing alarm means for generating, receiving monitoring data of power supply voltage from all boards,
This is achieved by a power supply voltage abnormality detection device, comprising: identification means for identifying which substrate has caused a power supply voltage abnormality when an error has occurred.
【0005】[0005]
【発明の実施の形態】回路Aは各基板に実装される電源
電圧チェック回路からなる監視手段及びデータ保持回路
からなる電圧保持手段である。抵抗1〜4は監視したい
任意の電圧の上下しきい値を規定し、監視手段であるコ
ンパレータ5、6により電源電圧が規定電圧の範囲にあ
るかどうか監視する。電源電圧が規定値の範囲から外れ
た場合、コンパレータ5、6いずれかの出力信号が反転
し、かつその出力信号が入力されるオア回路7の出力信
号も反転する。オア回路7の反転した出力信号はトリガ
となって、フリップ・フロップ回路10の出力信号を反
転させ、電圧異常が発生した基板を示す信号として保持
されI/O14に入力される。また、同時にオア回路7
の反転した出力信号をトリガにして、A/D変換器9に
よりデジタルデータに変換された電源電圧値を電圧保持
手段であるラッチ回路10で自動的に保持する。尚、回
路Aは電源電圧が規定値の範囲から外れた場合、一連の
動作を各基板上で全て自動で行う。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A circuit A is a monitoring means comprising a power supply voltage check circuit mounted on each board and a voltage holding means comprising a data holding circuit. The resistors 1 to 4 define upper and lower thresholds of an arbitrary voltage to be monitored, and the comparators 5 and 6 as monitoring means monitor whether the power supply voltage is within a specified voltage range. When the power supply voltage is out of the specified range, the output signal of one of the comparators 5 and 6 is inverted, and the output signal of the OR circuit 7 to which the output signal is input is also inverted. The inverted output signal of the OR circuit 7 serves as a trigger, inverts the output signal of the flip-flop circuit 10, is held as a signal indicating the substrate on which the voltage abnormality has occurred, and is input to the I / O 14. At the same time, the OR circuit 7
Using the inverted output signal as a trigger, the power supply voltage value converted into digital data by the A / D converter 9 is automatically held by the latch circuit 10 as voltage holding means. The circuit A automatically performs a series of operations on each substrate when the power supply voltage is out of the range of the specified value.
【0006】回路Bはメイン基板に実装される電源電圧
チェック及びデータ保持回路である。基本動作は回路A
と同じである。しかし、メインCPU11が実装されて
いる基板の電源電圧の監視を行っているため、電源電圧
に異常が発生した場合、基板動作が保証できないので基
板の誤動作を防止するため、オア回路7の電圧異常が発
生したことを示す信号はメインCPU11のノンマスカ
ラブルインタラプト信号に入力する。メインCPU11
はノンマスカラブルインタラプト信号が入力されると、
その原因を検証するため、I/O14のデータを読み出
し、メイン基板に電圧異常が発生していないかどうかチ
ェックする。もし電圧異常が発生していた場合は、ラッ
チ回路10から異常電圧値を読み出し、デコーダ回路1
6によりEEPROM17を選択し書き込む。この処理
により、もし、電源電圧異常が停電であった時でも異常
電圧値を保持でき、後から読み出すことにより解析する
ことができる。Circuit B is a power supply voltage check and data holding circuit mounted on the main board. Basic operation is circuit A
Is the same as However, since the power supply voltage of the board on which the main CPU 11 is mounted is monitored, if an abnormality occurs in the power supply voltage, the operation of the board cannot be guaranteed, so that the malfunction of the board is prevented. Is input to the non-mascarable interrupt signal of the main CPU 11. Main CPU 11
When the non-mascarable interrupt signal is input,
In order to verify the cause, the data of the I / O 14 is read, and it is checked whether a voltage abnormality has occurred in the main board. If a voltage abnormality has occurred, an abnormal voltage value is read from the latch circuit 10 and the decoder circuit 1
6 to select and write the EEPROM 17. By this processing, even if the power supply voltage abnormality is a power failure, the abnormal voltage value can be held and analyzed by reading it out later.
【0007】回路Cはメイン基板における電源電圧異常
発生基板識別と異常電圧値読み出しと警告表示を行う回
路である。メインCPU11はデコーダ回路12により
I/O14を選択し、どのビットのデータが変化したか
読み取り、どの基板で電圧異常が発生したか識別する識
別手段である。識別結果により、電圧異常を起こした基
板のラッチ回路10から異常電圧値を読み取り手段であ
るデータバス接続用バストランシーバ13によって読み
とり、異常が発生した基板名と異常電圧値の発生を文字
表示及びブザー機能を備えるアラーム手段であるアラー
ム回路15により文字表示及びブザーにて知らせる。The circuit C is a circuit for identifying a board on which a power supply voltage abnormality has occurred in the main board, reading an abnormal voltage value, and displaying a warning. The main CPU 11 is an identification means for selecting the I / O 14 by the decoder circuit 12, reading which bit data has changed, and identifying which board has a voltage abnormality. Based on the identification result, the abnormal voltage value is read from the latch circuit 10 of the substrate on which the voltage abnormality has occurred by the data bus connection bus transceiver 13 which is a reading means, and the name of the abnormal substrate and the occurrence of the abnormal voltage value are displayed in characters and a buzzer. The alarm circuit 15 which is an alarm means having a function notifies the user by character display and a buzzer.
【0008】また、メイン基板で電源電圧異常が発生し
検出された場合は、停電時電圧保持手段であるEEPR
OM17に異常電圧値を書き込み後、基板の誤動作を防
止するためのデータ保護等の待避動作を行う。When a power supply voltage abnormality occurs in the main board and is detected, an EEPR serving as a power failure voltage holding means is used.
After writing the abnormal voltage value to the OM 17, a save operation such as data protection for preventing a malfunction of the substrate is performed.
【0009】尚、I/O14の各ビットを基板単位にあ
らかじめ割り振っておき、どのビットの値が反転してい
るか読み取ることで電源電圧異常がどの基板で発生した
か検索[0009] Each bit of the I / O 14 is allocated in advance to each board, and by reading which bit is inverted, it is possible to find out on which board the power supply voltage abnormality has occurred.
【0010】できるようにする。Make it possible.
【発明の効果】本発明により、多数の基板で構成される
装置において、エラー検出処理の中で電源電圧異常を起
こした基板の有無を検索し、電源電圧値の読み出し・デ
ータ比較を実施することにより、電源電圧異常が発生し
たかどうか基板単位に検証・警告でき、より詳細に保守
効果を高めることができる。According to the present invention, in an apparatus composed of a large number of substrates, the presence or absence of a substrate having a power supply voltage abnormality in an error detection process is searched, and the power supply voltage value is read and data is compared. Accordingly, it is possible to verify and warn whether a power supply voltage abnormality has occurred on a board-by-board basis, and it is possible to enhance the maintenance effect in more detail.
【図1】 本発明の一実施例を示す。FIG. 1 shows an embodiment of the present invention.
1〜4は電源電圧分圧用抵抗、5、6は電源電圧異常検
出用コンパレータ、7はオア回路、8はフリップ・フロ
ップ回路、9はアナログ電圧のデジタルデータ変換用A
/D変換器、10はデジタルデータ化された電源電圧値
の保持回路、11はメインCPU、12はI/Oセレク
ト用デコーダ回路、13はデータバス接続用バストラン
シーバ、14はI/O回路、15は文字表示回路及びブ
ザー回路を有するアラーム回路、16はEEPROMセ
レクト用デコーダ回路、17はEEPROMを示す。Reference numerals 1 to 4 are power supply voltage dividing resistors, 5 and 6 are power supply voltage abnormality detection comparators, 7 is an OR circuit, 8 is a flip-flop circuit, and 9 is an A for digital data conversion of analog voltage.
A / D converter, 10 a holding circuit for a power supply voltage value converted into digital data, 11 a main CPU, 12 a decoder circuit for I / O selection, 13 a bus transceiver for data bus connection, 14 an I / O circuit, Reference numeral 15 denotes an alarm circuit having a character display circuit and a buzzer circuit, 16 denotes an EEPROM select decoder circuit, and 17 denotes an EEPROM.
Claims (3)
数の基板を有する回路装置において、基板の電源電圧を
監視する監視手段と、電源電圧が規定範囲を越えた場合
アラームを発生させるアラーム手段と、全基板から電源
電圧の監視データを受信し、エラー発生時にどの基板が
電源電圧異常を生じていたかを識別する識別手段とを備
えたことを特徴とする電源電圧異常検出装置。1. A circuit device having a plurality of substrates driven by a power supply voltage within a predetermined range, a monitoring means for monitoring the power supply voltage of the substrate, and an alarm for generating an alarm when the power supply voltage exceeds a specified range. A power supply voltage abnormality detection device, comprising: a power supply voltage monitoring unit that receives power supply voltage monitoring data from all of the substrates and identifies which substrate has a power supply voltage abnormality when an error occurs.
電圧値を自動的に保持する保持手段と、保持された電源
電圧値を読み出す読み出し手段とを備えたことを特徴と
する請求項1記載の電源電圧異常検出装置。2. The apparatus according to claim 1, further comprising: holding means for automatically holding a power supply voltage value when a power supply voltage abnormality occurs for each substrate; and reading means for reading out the held power supply voltage value. A power supply voltage abnormality detection device as described in the above.
保持手段を備え、電源回復後に読み出して解析すること
を特徴とする請求項2記載の電源電圧異常検出装置。3. The power supply voltage abnormality detection device according to claim 2, further comprising a holding unit that holds an abnormal power supply voltage value even at the time of a power failure, and reads and analyzes the power supply voltage after power recovery.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10047318A JPH11249766A (en) | 1998-02-27 | 1998-02-27 | Power supply voltage abnormality detector for multiple boards |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10047318A JPH11249766A (en) | 1998-02-27 | 1998-02-27 | Power supply voltage abnormality detector for multiple boards |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH11249766A true JPH11249766A (en) | 1999-09-17 |
Family
ID=12771944
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10047318A Pending JPH11249766A (en) | 1998-02-27 | 1998-02-27 | Power supply voltage abnormality detector for multiple boards |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH11249766A (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2007140779A (en) * | 2005-11-16 | 2007-06-07 | Omron Corp | Power management device, failure monitoring device, failure monitoring program, and recording medium |
| JP2007226348A (en) * | 2006-02-21 | 2007-09-06 | Denso Corp | Voltage monitoring system and electronic control device |
| JP2008054434A (en) * | 2006-08-25 | 2008-03-06 | Nec Computertechno Ltd | Power supply control unit, power supply system and method for controlling power supply |
| JP2011061968A (en) * | 2009-09-09 | 2011-03-24 | Nec Computertechno Ltd | Power supply monitoring circuit, power supply monitoring method used for the same, power supply monitoring control program, and electronic apparatus |
-
1998
- 1998-02-27 JP JP10047318A patent/JPH11249766A/en active Pending
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2007140779A (en) * | 2005-11-16 | 2007-06-07 | Omron Corp | Power management device, failure monitoring device, failure monitoring program, and recording medium |
| JP2007226348A (en) * | 2006-02-21 | 2007-09-06 | Denso Corp | Voltage monitoring system and electronic control device |
| JP2008054434A (en) * | 2006-08-25 | 2008-03-06 | Nec Computertechno Ltd | Power supply control unit, power supply system and method for controlling power supply |
| JP2011061968A (en) * | 2009-09-09 | 2011-03-24 | Nec Computertechno Ltd | Power supply monitoring circuit, power supply monitoring method used for the same, power supply monitoring control program, and electronic apparatus |
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