JPH1126691A - Semiconductor device - Google Patents

Abstract

An object of the present invention is to provide a highly reliable semiconductor device that prevents dielectric breakdown due to the generation of voids in a filler at a peripheral portion of an insulating substrate on which a semiconductor chip is mounted. An insulating substrate on which a semiconductor chip is mounted.
And a metal base plate 1 on which an insulating substrate is mounted, an outer resin case 2 with an upper lid surrounding the insulating substrate and fixed to the metal base plate, and an external lead-out terminal. In a semiconductor device sealed with a filler material 8 such as silicone gel, the insulating substrate forms a conductor pattern 4b for mounting a semiconductor chip on a main surface thereof with an insulating plate 4a interposed therebetween, and a metal foil adhered on a back surface side. 4c is solder-bonded to a metal base plate, the peripheral edge of the metal foil 4c of the insulating substrate overlaps the peripheral edge of the insulating plate 4a, and is adhered to the entire back surface of the substrate. In addition to the relaxation, a dead space which is a factor of void generation of the filler is eliminated to prevent dielectric breakdown.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a semiconductor device for a power transistor module and the like.

[0002]

2. Description of the Related Art First, a configuration of a power transistor module according to the present invention is shown in FIG. In the figure, 1 is a metal base plate for heat dissipation, 2 is an outer resin case covering the metal base plate 1, 3 is an upper lid of the resin case 2 also serving as a terminal block, and 4 is an insulating substrate mounted on the metal base plate 1. Reference numeral 5 denotes a semiconductor chip (power transistor, diode, or the like) mounted on the insulating substrate 4, reference numeral 6 denotes an external lead terminal, reference numeral 7 denotes a connection wire for internal wiring, reference numeral 8 denotes a semiconductor chip 5 injected into the resin case 2, and connection wire. 7 is a filler (silicone gel) that seals 7 and the like.

Next, FIGS. 3A and 3B show a conventional structure of the insulating substrate 4 employed in the semiconductor device. As shown in the figure, a conductor pattern 4b for mounting a semiconductor chip 5 is formed on the main surface side (upper surface) of the insulating substrate 4 with a ceramic insulating plate 4a interposed therebetween, and a metal foil for soldering is formed on the back surface side. 4c is attached. When the insulating substrate 4 is mounted on the metal base plate 1, the above-mentioned metal foil 4c is overlapped on the upper surface of the metal base plate 1 so that the two are joined by soldering.

Here, in the conventional insulating substrate 4, in order to secure a sufficient creepage insulation distance on the insulating plate 4a between the conductor pattern 4b on the main surface side and the metal foil 4c on the back surface, FIG.
As shown in (b), the peripheral edge of the metal foil 4c is attached to a surface area which is slightly inward from the peripheral edge of the insulating plate 4a by a distance δ (about 0.5 to 2 mm).

[0005]

However, in the semiconductor device employing the above-described insulating substrate 4 having the conventional structure, the following problems occur in terms of withstand voltage characteristics. That is, (1) When a voltage is applied to the main circuit in the product assembled state shown in FIG.
The electric field concentrates on a peripheral portion of the insulating plate 4 a of the insulating substrate 4 and a narrow portion on the outer peripheral side of the metal foil 4 c sandwiched between the metal base plate (ground side) 1.

On the other hand, when injecting the filler (silicone gel) 8 into the surrounding resin case 2 in the process of assembling the semiconductor device, great care is taken so that air bubbles are not generated inside the filler 8 as much as possible. ing. However, in the assembled state after the filling of the filler 8, as shown in FIG.
Since the outer peripheral portion of the metal foil 4c sandwiched between the peripheral portion of the metal foil 4c and the metal base plate 1 forms a dead space (blank alley), a void v is formed without a bubble generated in this portion being completely removed.

For this reason, if a voltage is applied in a state where the void v remains in the dead space, there is a possibility that the dielectric breakdown may occur at the void generating portion due to the concentration of the electric field. Reference numeral 9 denotes a solder joined between the metal base plate 1 and the metal foil 4c of the insulating substrate 4. (2) Measures for preventing voids from being generated in the filler 8 at the peripheral portion of the insulating plate 4a of the insulating substrate 4 and the outer peripheral portion of the metal foil 4c sandwiched between the metal base plates 1 as described above. As shown in FIG. 6, the supply amount of the solder 9 for joining between the metal base plate 1 and the metal foil 4c of the insulating substrate 2 is slightly increased to fill the dead space with the solder 9. However, in practice, it is difficult to control the amount of supplied solder and to keep the shape of the solder fillet constant, and as shown in the figure, the solder fillet protrudes to the outer peripheral end surface of the insulating plate 4a. A new problem arises in that the creeping insulation distance L with respect to the surface 4a is reduced (particularly, the vertical creepage distance), and as a result, a required dielectric strength cannot be secured.

SUMMARY OF THE INVENTION The present invention has been made in view of the above problems, and an object of the present invention is to solve the above-mentioned problems and to prevent a dielectric breakdown caused by generation of voids in a filler at a peripheral portion of an insulating substrate, thereby achieving high reliability. It is to provide a semiconductor device.

[0009]

According to the present invention, there is provided an insulating substrate having a semiconductor chip mounted thereon, a metal base plate having the insulating substrate mounted thereon, and a metal base surrounding the insulating substrate. A semiconductor device comprising an assembly of an outer resin case with an upper lid fixed to a plate and an external lead terminal incorporated in the resin case, wherein the inside of the resin case is sealed with a filler, and the insulating substrate is insulated. A conductor pattern for mounting a semiconductor chip on the main surface side of the plate is formed, and a metal foil is adhered on the back surface side, and the metal foil is overlapped on a metal base plate and soldered, (1) The metal foil is applied to the entire back surface of the insulating plate such that the peripheral edge of the metal foil and the peripheral edge of the insulating plate overlap (claim 1).

(2) The metal foil is adhered to the back surface of the insulating plate such that its peripheral edge projects outward from the peripheral edge of the insulating plate. According to the above configuration, in a state where the insulating substrate is mounted on the metal base plate and soldered, a dead space which causes a void is not formed in the peripheral portion of the insulating substrate, and the surrounding resin case is filled. Even in the assembled state where the material is filled, voids of the filler are not generated in the dead space. In addition, since the metal foil is spread at least to the periphery of the insulating plate, the concentration of the electric field intensity at the periphery of the insulating plate is reduced, and as a result, the occurrence of dielectric breakdown at the periphery of the insulating substrate can be prevented.

Further, as described in the above item (2), by forming the periphery of the metal foil to protrude outward from the periphery of the insulating plate, it is possible to eliminate the dead space which causes the generation of voids as described above. In addition, even when the amount of solder supplied when soldering the insulating substrate to the metal base plate varies somewhat, the possibility that the solder fillet will protrude so as to cover the outer peripheral end surface of the insulating plate is reduced. A sufficient creepage insulation distance with the surface side conductive pattern can be ensured.

[0012]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to FIGS. In the drawings of the respective embodiments, the same members corresponding to FIGS. 3 and 4 are denoted by the same reference numerals. [Embodiment 1] FIG. 1 shows an embodiment of the present invention. In this embodiment, basically, the insulating substrate 4
Is the same as the conventional structure shown in FIG. 3, but the metal foil 4c applied on the back side of the insulating plate 4a is so formed that its peripheral edge overlaps with the peripheral edge of the insulating plate 4a. It is applied so as to cover the entire rear surface area.

With this configuration, when the insulating substrate 4 is mounted on the metal base plate 1 and soldered as shown in the figure, the peripheral portion of the insulating plate 4a of the insulating substrate 4 and the metal base plate 1
No dead space, which is a cause of air bubble generation, is formed between them. In addition, by optimizing the amount of the supplied solder, the solder fillet does not protrude to the outer peripheral end surface of the insulating plate 4a to reduce the creeping insulation distance with the conductor pattern 4b, thereby securing a sufficient dielectric strength. it can.

[Embodiment 2] FIGS. 2 (a) and 2 (b) show an embodiment corresponding to claim 2, in which a metal foil adhered to the back side of an insulating substrate 4 is shown. 4c is set to be slightly larger than the insulating plate 4a, and the peripheral edge of the metal foil 4c is separated from the peripheral edge of the insulating plate 4a by a distance δ (for example, 0.5 to 2).
(approximately mm) It is attached to the back surface of the insulating plate 4a so as to slightly protrude toward the outer peripheral side.

According to this structure, when the insulating substrate 4 is mounted on the metal base plate 1 and soldered in the same manner as in the first embodiment, the insulating plate 4a and the metal base plate 1 No dead space, which is a cause of air bubble generation, is formed between them. In addition, when the solder is supplied to the metal base plate 1, the amount of the supplied solder varies slightly, and therefore, as shown in FIG.
c does not cover the outer peripheral end surface of the insulating plate 4a, which is recessed slightly inward from the peripheral edge portion of the metal foil 4c. Between them, a sufficient creepage insulation distance L can be secured.

[0016]

As described above, according to the structure of the present invention, in a semiconductor device in which the inside of a package is sealed with a filler such as silicone gel, a metal base is formed by being adhered to the back side of an insulating substrate. The metal foil to be soldered to the board has its periphery overlapped with the periphery of the insulating plate, or the periphery extends outward from the periphery of the insulating plate. No dead space is formed at the periphery of the substrate, which causes voids in the filler, thereby preventing dielectric breakdown of the insulating substrate due to voids in the filler and improving the reliability of the semiconductor device.

[Brief description of the drawings]

FIG. 1 is a configuration sectional view of a semiconductor device according to a first embodiment of the present invention;

FIGS. 2A and 2B are cross-sectional views of a configuration of a semiconductor device according to a second embodiment of the present invention, in which FIG. 2A is a configuration diagram of an entire insulating substrate, and FIG. 2B is a solder fillet in a case where the supplied amount of solder is slightly varied; Enlarged sectional view of the periphery of the substrate showing the state of formation of

3A and 3B are conventional structural views of an insulating substrate incorporated in a semiconductor device, wherein FIG. 3A is a plan view and FIG. 3B is a side view.

FIG. 4 is an overall configuration diagram of a semiconductor device to which the present invention is applied;

FIG. 5 is a diagram illustrating a state in which voids are generated in a filler at a peripheral portion of the substrate with respect to the insulating substrate of FIG. 3;

FIG. 6 is a view showing a state in which a solder fillet is protruding when the amount of solder supplied to the insulating substrate of FIG. 3 is increased;

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Metal base plate 2 Surrounding resin case 3 Upper lid 4 Insulating substrate 4a Insulating plate 4b Conductor pattern 4c Metal foil 5 Semiconductor chip 6 External lead-out terminal 8 Filler 9 Solder v Void of filler L Creepage insulation distance of insulating substrate

Claims (2)

[Claims] An insulating substrate on which a semiconductor chip is mounted;
It consists of an assembly of a metal base plate on which an insulating substrate is mounted, an outer resin case with an upper lid surrounding the insulating substrate and fixed to the metal base plate, and an external lead-out terminal incorporated in the resin case. A semiconductor device in which the inside is sealed with a filler, wherein the insulating substrate forms a conductor pattern for mounting a semiconductor chip on a main surface side of the insulating plate,
In a configuration in which a metal foil is adhered to the back side, and the metal foil is solder-joined to a metal base plate,
A semiconductor device, wherein the metal foil is applied to the entire back surface of the insulating plate such that the peripheral edge of the metal foil overlaps the peripheral edge of the insulating plate. 2. An insulating substrate on which a semiconductor chip is mounted;
It consists of an assembly of a metal base plate on which an insulating substrate is mounted, an outer resin case with an upper lid surrounding the insulating substrate and fixed to the metal base plate, and an external lead-out terminal incorporated in the resin case. A semiconductor device in which the inside is sealed with a filler, wherein the insulating substrate forms a conductor pattern for mounting a semiconductor chip on a main surface side of the insulating plate,
In a configuration in which a metal foil is adhered to the back side, and the metal foil is solder-joined to a metal base plate,
A semiconductor device, wherein the metal foil is attached to the back surface of the insulating plate such that its peripheral edge extends outward from the peripheral edge of the insulating plate.