JPH1127583A - Solid-state imaging device, driving method thereof, and camera - Google Patents

Abstract

(57) [Summary] [Problem] Since the minimum value of the ratio of the two types of storage time is limited by the time ratio between the vertical blanking period and the vertical effective video period, an external device must be added to achieve a high dynamic range. Circuit is required. SOLUTION: In a CCD solid-state imaging device capable of independently reading out signal charges of first and second photoelectric conversion element groups 1 and 2, a first photoelectric conversion element group 1 after a certain accumulation time has elapsed. Each signal charge is read out to the vertical transfer unit 3 and becomes a signal component A. Thereafter, all signal charges of the photoelectric conversion element groups 1 and 2 are discharged, and after a predetermined time has elapsed, the first and second photoelectric conversions are performed. The signal charges of the element groups 1 and 2 are read out and mixed in the vertical transfer unit 3 to form a signal component B, so that the signal component A on the long accumulation time side is composed of the signal charge of one pixel, The signal component B on the shorter time side is composed of signal charges of two pixels, and the ratio of the accumulation time of the two types of signal components A and B is reduced.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a solid-state imaging device, a driving method thereof, and a camera, and more particularly, to a solid-state imaging device capable of independently reading out signal charges of two-dimensionally arranged pixels and a driving method thereof. About the camera.

[0002]

2. Description of the Related Art Solid-state imaging devices such as CCD (Charge Co.)
As a driving method for expanding the dynamic range of a solid-state imaging device of the type (upled Device), a method of outputting signal charges of individual photoelectric conversion elements as signal charges of two or more different accumulation times has been conventionally used. It is known (see, for example, JP-A-7-177433, JP-A-7-250286, and JP-A-8-84298).

That is, in these driving methods, signal charges stored during a vertical effective video period are read once during a vertical blanking period, and then a short exposure period is set once again using the vertical blanking period to perform photoelectric conversion. Then, the signal charges are read out again, and the signal charges on the longer side and the shorter side are independently transferred and output. In this case, the photoelectric conversion elements (pixels) constituting a plurality of signal components having different accumulation times are the same.

[0004]

However, in the above-described conventional driving method of the CCD solid-state imaging device, the minimum value of the ratio of the two types of accumulation times is determined unless a line memory or a field memory is provided inside or outside the device. ,
It is limited by the time ratio between the vertical blanking period and the vertical effective video period.

Therefore, when the output signal of the CCD solid-state imaging device is directly input to a conventional signal processing circuit, a contrast ratio of a high illuminance portion cannot be obtained, and a wide dynamic range image is realized using such a CCD solid-state imaging device. In order to do so, it is necessary to perform processing such as externally performing gain processing on the two types of signal components or externally performing selective sampling, and it is necessary to add a processing circuit therefor. Also, in the conventional driving method, the ratio of the accumulation time of the two types of signal components can be reduced by shortening the accumulation time of the signal charge on the long accumulation time side by the electronic shutter. In contrast, there is a problem that the sensitivity on the low illuminance side is reduced due to the shortening of the distance.

SUMMARY OF THE INVENTION The present invention has been made in view of the above problems, and has as its object to provide a wider light source without sacrifice of sensitivity on the low illuminance side without providing an additional circuit in the circuit. An object of the present invention is to provide a solid-state imaging device capable of achieving a dynamic range and a driving method thereof.

[0007]

According to the present invention, in a solid-state imaging device capable of independently reading out signal charges of two-dimensionally arranged pixels, when reading out signal components having different accumulation times from the same pixel group, It is characterized in that the number of pixels constituting the first signal component having a long accumulation time is different from the number of pixels constituting the second signal component having a short accumulation time.

Here, for example, when the number of pixels constituting the first signal component is set to 1 and the number of pixels constituting the second signal component is set to 2, the accumulation time of the first signal component and the second signal component Is 1/2 of the case where the number of pixels is the same. Accordingly, when the line memory or the field memory is not provided inside or outside the device, the dynamic range can be expanded without shortening the accumulation time of the first signal component.

On the other hand, when one signal component is composed of a plurality of pixels, a transfer operation time is required between readings for each pixel. This transfer operation time is a time that does not contribute to the accumulation time within the field period. Therefore, the number of pixels constituting the second signal component is set smaller than the number of pixels constituting the first signal component, and the unnecessary transfer operation time is reduced to the first.
By applying the accumulation time of the signal component, the sensitivity at low illuminance can be improved.

[0010]

Embodiments of the present invention will be described below in detail with reference to the drawings. FIG. 1 shows a first embodiment of the present invention.
It is a schematic structure figure showing an embodiment. The first embodiment is an example of a structure in which a signal component A having a long accumulation time and a signal component B having a short accumulation time are each composed of a maximum of two pixels.

In FIG. 1, a group of photoelectric conversion elements (pixels) which are two-dimensionally arranged on a semiconductor substrate and convert incident light into signal charges having a charge amount corresponding to the light amount and accumulate the signal charges are line units (row units). , The first and second photoelectric conversion element groups 1 and 2
are categorized. A plurality of vertical transfer units 3 are provided for each vertical column of the photoelectric conversion element group. The vertical transfer unit 3 is configured by a set (packet sequence) of packets 3a and 3b provided in each pixel with a 1: 1 correspondence. Here, a packet refers to a unit that handles one signal component.

One horizontal transfer unit 4 is provided below the vertical transfer unit 3 in the drawing. This horizontal transfer unit 4
Packets 4a, 4 of at least twice the number of pixels in the horizontal direction
b (packet sequence). On the output end side of the horizontal transfer unit 4, a charge detection unit 5 that detects the signal charge transferred by the horizontal transfer unit 4 and outputs it as a signal voltage is provided. The output signal of the charge detection unit 5 is led to the outside via the output amplifier 6.

As described above, the signal component A having a long accumulation time
When each of the signal components B having a short accumulation time is composed of a maximum of two pixels, two photoelectric conversion element groups 1 and 2 and a vertical transfer unit (packets 3a and 3) handling the two signal components A and B are used.
b) 3 and a horizontal transfer unit (packets 4 a and 4 b) 4. In this embodiment, the signal component A is set to 1
It is assumed that the signal component B is composed of the signal charges of the pixels, and the signal component B is composed of the signal charges of the two pixels.

Next, in the CCD solid-state imaging device having the above-described structure, a driving method in the case where the signal component A is composed of the signal charges of one pixel and the signal component B is composed of the signal charges of two pixels will be described with reference to the timing chart of FIG. This will be described using a chart. The driving is performed by a field identification signal generated by the timing generator 7, a vertical blanking identification signal, a read pulse 1, a read pulse 2, a vertical transfer pulse, a charge discharge pulse, and the like.

Here, the read pulse 1 is a pulse for reading a signal charge from the first photoelectric conversion element group 1 to the vertical transfer section 3. The read pulse 2 is a pulse for reading a signal charge from the second photoelectric conversion element group 2 to the vertical transfer unit 3. The vertical transfer pulse is a pulse for driving the vertical transfer unit 3. The charge discharge pulse is a pulse for discharging signal charges of the first and second photoelectric conversion element groups 1 and 2 to, for example, a semiconductor substrate.

In the timing chart of FIG. 2, first, starting at time t0, photoelectric conversion in the first and second photoelectric conversion element groups 1 and 2 and accumulation of signal charges associated therewith are started. Then, when the read pulse 2 is generated at time t1 when the time T1 has elapsed, each signal charge of the second photoelectric conversion element group 2 is read out to the packet 3a of the vertical transfer unit 3. The signal charge for one pixel of the second photoelectric conversion element group 2 becomes the signal component A.

Thereafter, a signal discharge pulse is generated at time t2, whereby each signal charge of the first and second photoelectric conversion element groups 1 and 2 is discharged to the semiconductor substrate. Subsequently, time T
When the read pulse 1 is generated at time t3 when 2 has elapsed, each signal charge of the first photoelectric conversion element group 1 is read into the packet 3b of the vertical transfer unit 3. The signal charge read out to the packet 3b is reduced to one unit, that is, the packet 3a by generating a vertical transfer pulse at time t4.
Is forwarded to

Thereafter, at time t5, a read pulse 2 is generated, so that each signal charge of the second photoelectric conversion element group 2 is read into the packet 3a of the vertical transfer unit 3. As a result, the signal charges of the first photoelectric conversion element group 1 read at time t3 and the signal charges of the second photoelectric conversion element group 2 read at time t5 are converted into packets 3a of the vertical transfer unit 3.
Mixed in. The mixed signal charges for two pixels are signal components B. In the other field, an interlaced signal is obtained by reversing the order of transfer from the first and second photoelectric conversion element groups 1 and 2 to the vertical transfer unit 3.

Here, in the timing chart of FIG. 2, the periods T1 (T3) and T2 (T4) correspond to the respective accumulation times of the signal components A and B, respectively.
In the structure in which the solid-state imaging device does not have a line memory or a field / frame memory, all of 3, 3, t5, t6, t8, t9, and t10 are within the vertical blanking period. The minimum value of the ratio of T2 (T4) is limited.

However, in the present embodiment, only the signal component B on the short accumulation time side is composed of two pixels, so that the ratio between the periods T1 (T3) and T2 (T4), that is, the long side is used. The ratio between the accumulation time and the accumulation time on the shorter side can be substantially reduced to の of the conventional one. Thereby, the dynamic range of the CCD solid-state imaging device can be further expanded.

The signal components A and B are sequentially vertically transferred by the vertical transfer unit 3, and the packets 4 a and 4 b of the horizontal transfer unit 4 are further transferred.
And sequentially transferred horizontally, and then transferred to the charge detection unit 5 for each signal component. The charge detection unit 5 has a function of adding the sequentially transferred signal components A and B, and also has a clip function for slicing unevenness at the time of signal saturation included in the signal component A which is the signal component to be added. Have.

FIG. 3 shows an example of the structure of the charge detector 5 having the clip function. In FIG. 1, a charge detection unit 5 according to the present embodiment includes a P well 9 on an N-type semiconductor substrate 8.
Floating diffusion (FD) 10 and reset drain (RD) 11 made of N-type impurities formed at predetermined intervals on the surface side of the semiconductor device, and, for example, two reset gates disposed above a channel region between them. The floating diffusion amplifier has electrodes 12-1 and 12-2.

In the charge detecting section 5 having the above-described configuration, the floating diffusion 10 adds the signal components A and B sequentially injected from the horizontal transfer section 4 and converts them into a voltage.
The reset drain 11 discharges signal charges in the floating diffusion 10 after voltage conversion. The two reset gate electrodes 12-1 and 12-2 are arranged in series between the floating diffusion 10 and the reset drain 11, and independent clock pulses and bias voltages are applied to each of them.

Here, the reset gate electrodes 12-1 and 12-1
By setting each of the -2 bias voltages to a level corresponding to the clip level, it becomes possible to remove saturation unevenness included in the signal component A that is the signal to be added and to perform addition. That is, by applying a bias voltage of a level corresponding to the clip level to the reset gate electrodes 12-1 and 12-2, the potential below the reset gate electrodes 12-1 and 12-2 becomes a depth corresponding to the clip level. The electric charge corresponding to the saturation unevenness of the signal component A exceeding this potential is discharged to the reset drain 11.

Then, by thinning out the reset operation once, the signal component A from which the saturation unevenness has been removed is held in the floating diffusion 10 as it is, and subsequently the signal component B is injected into the floating diffusion 10 to thereby reduce the signal component. A and B are added. Also, 2
Since the two reset gate electrodes 12-1 and 12-2 are arranged in series, each reset gate electrode 12-1 and 12-2 has two reset gate electrodes 12-1 and 12-2.
A clock operation at a value level becomes possible, and a clock operation with three or more values is not required.

FIG. 4 shows a timing chart of a driving example for obtaining a wide dynamic range output by one added signal (long-time accumulated signal component) and one added signal (short-time accumulated signal component).

In the figure, clocks A and B are clocks applied to the two reset gate electrodes 12-1 and 12-2, and clock C is a clock for driving the final stage of the horizontal transfer unit 4. The period P1 is a period during which the floating diffusion 10 is completely reset, the period P2 is a period during which the signal to be added is clipped, and the period P3 is a signal in which a signal component having a wide dynamic range is output by adding the addition signal to the signal to be added. It is a period that is.

FIG. 5 shows the signal components A and B and the charge detector 5 when driven by the driving method of the present invention and the conventional driving method.
5 shows an example of the light amount output characteristic after clipping / addition.

In the figure, a is the output characteristic of the signal component A, b is the output characteristic of one pixel constituting the signal component B, c
Represents the output characteristic after addition when the signal components A and B are formed of the same pixel in the conventional driving method, and d represents the output characteristic after addition when the signal component B is formed of twice as many pixels.

The output characteristic c is a characteristic when driven by the conventional driving method. However, since the change at the inflection point is large, the signal component A and the signal component B are not preprocessed by a method such as amplification or selection. When the addition is performed, it is difficult to secure the signal contrast near the inflection point and in the high illuminance region. On the other hand, although the output characteristic d is reduced only in the dynamic range width, an appropriate contrast can be secured even when the addition is performed without preprocessing.

FIG. 6 is a schematic diagram showing a modification of the first embodiment. In the drawing, the same parts as those in FIG. 1 are denoted by the same reference numerals. In the CCD solid-state imaging device according to the first embodiment, the horizontal transfer unit 4 is configured by a set of packets 4a and 4b having twice the number of pixels in the horizontal direction. , The horizontal transfer unit 4 has the same number of packets 4 as the number of pixels in the horizontal direction.
The horizontal transfer columns 4A and 4B are composed of two lines a and b.

As described above, when the horizontal transfer unit 4 has a two-line configuration, the horizontal drive frequency can be halved compared to the case of a one-line configuration, which is advantageous in reducing power consumption. . Two-line horizontal transfer columns 4A, 4B
Is provided with a gate section 4c for alternately transferring the signal components A and B transferred by the horizontal transfer columns 4A and 4B to the charge detection section 5 in signal component units.

In the case of this modification, the configuration of the horizontal transfer section 4 is different from that of the first embodiment only, and the driving method for obtaining a wide dynamic range and the charge detection section 5
Is exactly the same as that of the first embodiment, and the operation and effect associated therewith are also the same.

As described above, in the present embodiment,
In a CCD solid-state imaging device capable of independently reading each signal charge of the first and second photoelectric conversion element groups 1 and 2,
After a lapse of a certain accumulation time, each signal charge of the first photoelectric conversion element group 1 is read out to the vertical transfer unit 3 to be a signal component A, and then all signal charges of the photoelectric conversion element groups 1 and 2 are discharged. After the time elapses, the signal charges of the first and second photoelectric conversion element groups 1 and 2 are read out and mixed in the vertical transfer unit 3 to obtain the signal component B.

As a result, the signal component A on the long accumulation time side can be constituted by the signal charges of one pixel, and the signal component B on the short accumulation time side can be constituted by the signal charges of two pixels.
By configuring only the signal component B with the signal charges of the two pixels, the ratio of the accumulation time of the two types of signal components A and B can be reduced to の of that in the related art. As a result, the dynamic range of the CCD solid-state imaging device can be further expanded.

Since the charge detecting section 5 has a function of adding the signal components A and B, a signal having a wide dynamic range can be output by directly adding the signals inside the CCD solid-state imaging device. A signal with a wide dynamic range can be obtained without providing an additional circuit outside the solid-state imaging device. In addition, since the charge detection unit 5 also has a clipping function, it is possible to remove unevenness at the time of signal saturation included in the signal component A having a long accumulation time, thereby improving S / N.

In the above embodiment, the signal component A on the long accumulation time side is constituted by signal charges of one pixel, and the signal component B on the short accumulation time side is constituted by signal charges of two pixels. To realize a wider dynamic range, but conversely, the signal component A on the long side of the accumulation time is 2
Higher sensitivity can be realized by using the signal charges of the pixels and configuring the signal component B on the shorter accumulation time side with the signal charges of one pixel.

That is, when the signal component A is composed of the signal charges of two pixels and the signal component B is composed of the signal charges of one pixel, the operation at time t4 and time t5 in the timing chart of FIG. After transferring the signal charges of the first photoelectric conversion element group 1 read out by one unit, the operation of reading and mixing the signal charges of the second photoelectric conversion element group 2 becomes unnecessary.

As a result, the time at time t1 and time t2 can be delayed by the time at time t4 and time t5, so that the accumulation time of the signal component A can be extended by that amount. Therefore, the sensitivity can be improved by the extension of the signal charge accumulation time. At the same time, the maximum dynamic range can be doubled as compared with the case where the number of pixels constituting the two types of signal components is the same.

That is, when one signal component is constituted by a maximum of two pixels, the operation (time) of the vertical transfer unit 3 is required between readings for each pixel, and this time contributes to the accumulation time in the field period. It will not be time. Therefore, when the sensitivity of low illuminance is more important than the contrast problem, by reducing the number of constituent pixels of the signal component of the short-time accumulation and allocating the unnecessary transfer operation time to the long-time accumulation, a high-sensitivity signal can be obtained. Is obtained.

In each of the above embodiments, the case where each signal component is constituted by a maximum of two pixels has been described as an example, but the invention is not limited to two pixels. Generally, when each signal component is composed of signal charges of a maximum of n pixels, it is represented by the structure of FIG.

FIG. 8 is a schematic configuration diagram of a camera according to the present invention using the solid-state imaging device having the above-described configuration and a driving method thereof. In FIG. 8, incident light from a subject is imaged on an imaging surface of a CCD solid-state imaging device 22 by an optical system including a lens 21. As the CCD solid-state imaging device 22, one having the configuration shown in FIG. 1, FIG. 6, or FIG. 7 is used. The CCD solid-state imaging device 22 is driven by a driving system 23 including the timing generator 7 in FIG. 1 based on the driving method described above. The output signal of the CCD solid-state imaging device 22 is
Various signal processing is performed by the signal processing system 24 to obtain a video signal.

In the camera having the above-described configuration, a signal having an appropriately controlled dynamic range is directly output from the CCD solid-state imaging device 22. By inputting this output signal to a signal processing system 24 having the same configuration as that of the related art,
It is possible to realize a camera that can obtain contrast from low illuminance to high illuminance and has high compatibility with the conventional system. In addition, by changing the number of pixels constituting the signal component having a long accumulation time and the signal component having a short accumulation time, an operation with improved sensitivity / maximum dynamic range can be performed.

[0044]

As described above, according to the present invention,
In a solid-state imaging device capable of independently reading signal charges of two-dimensionally arranged pixels, when reading signal components having different accumulation times from the same pixel group, the number of pixels constituting the signal component A having a long accumulation time is Signal component B with short accumulation time
When the number of pixels constituting the signal component A is set smaller than the number of pixels constituting the signal component B, the number of pixels constituting the signal component A is set to be different from the number of pixels constituting the signal component B. Since the ratio of the accumulation time can be made lower than the case where the number of pixels is the same, the dynamic range can be expanded without sacrificing the sensitivity on the low illuminance side, and the signal component B
When the number of pixels constituting the signal component A is set to be smaller than the number of pixels constituting the signal component A, the unnecessary transfer operation time can be used for the accumulation time of the signal component A, thereby improving the sensitivity at low illuminance. You can do it.

[Brief description of the drawings]

FIG. 1 is a schematic configuration diagram showing a first embodiment of the present invention.

FIG. 2 is a timing chart for explaining the operation of the first embodiment.

FIG. 3 is a cross-sectional view illustrating an example of a configuration of a charge detection unit.

FIG. 4 is a timing chart for explaining the operation of the charge detection unit.

FIG. 5 is a characteristic diagram showing an example of light amount output characteristics after clipping / addition by signal components A and B and a charge detection unit when driven by the driving method of the present invention and the conventional driving method.

FIG. 6 is a schematic configuration diagram illustrating a modification of the first embodiment.

FIG. 7 is a schematic configuration diagram when a signal component is composed of a maximum of n pixels.

FIG. 8 is a schematic configuration diagram of a camera according to the present invention.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... 1st photoelectric conversion element group, 2 ... 2nd photoelectric conversion element group, 3 ... Vertical transfer part, 4 ... Horizontal transfer part, 5 ... Charge detection part, 7 ... Timing generator, 10 ... Floating diffusion, 11 ... Reset drain, 12-
1,12-2 ... Reset gate electrode

Claims (13)

[Claims] A solid-state imaging device capable of independently reading signal charges of two-dimensionally arranged pixels and reading signal components having different accumulation times from the same pixel group, wherein the first signal having a long accumulation time is provided. A solid-state imaging device, comprising: a driving system that performs read driving of signal charges by making the number of pixels constituting a component different from the number of pixels constituting a second signal component having a short accumulation time. 2. The number of pixels constituting the first signal component is:
2. The solid-state imaging device according to claim 1, wherein the number of pixels constituting the second signal component is smaller than the number of pixels. 3. The number of pixels constituting the first signal component is:
The solid-state imaging device according to claim 1, wherein the number of pixels constituting the second signal component is larger than the number of pixels. 4. The solid-state imaging device according to claim 1, further comprising a charge detection unit that adds the first signal component and the second signal component and converts the sum into a voltage. 5. The solid-state imaging device according to claim 4, wherein the charge detection section slices the first signal component at a predetermined clip level. 6. A driving method for reading out signal components having different accumulation times from the same pixel group in a solid-state imaging device capable of independently reading out signal charges of pixels arranged two-dimensionally, the method comprising: A method for driving a solid-state imaging device, wherein the number of pixels constituting one signal component is different from the number of pixels constituting a second signal component having a short accumulation time. 7. The number of pixels constituting the first signal component is:
7. The method according to claim 6, wherein the number of pixels constituting the second signal component is smaller than the number of pixels. 8. The number of pixels constituting the first signal component is:
7. The method according to claim 6, wherein the number of pixels constituting the second signal component is larger than the number of pixels. 9. A signal charge of a first pixel group is read out to be the first signal component, and then signal charges of all pixels are discharged. After a predetermined time has passed, each signal charge of the first and second pixel groups is read out. 8. The method according to claim 7, wherein signal charges are read out and mixed to form the second signal component. 10. The driving method for a solid-state imaging device according to claim 9, wherein the first signal component and the second signal component are independently transferred, added, and output. 11. An optical system for forming an image of incident light from a subject, and photoelectrically converting the image light formed by the optical system in units of two-dimensionally arranged pixels and independently reading signal charges of the pixels. And a signal component having a different accumulation time are read from the same pixel group of the solid-state image sensor, and a second signal component having a shorter accumulation time and the number of pixels constituting a first signal component having a longer accumulation time are read out. A camera comprising: a driving system that performs readout driving by making the number of pixels different from each other; and a signal processing system that processes an output signal of the solid-state imaging device. 12. The camera according to claim 11, wherein the solid-state imaging device has a charge detection unit that adds the first signal component and the second signal component and converts the sum into a voltage. 13. The camera according to claim 12, wherein the charge detection section slices the first signal component at a predetermined clip level.