JPH11345896A - Circuit board - Google Patents

Circuit board

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Publication number
JPH11345896A
JPH11345896A JP15147598A JP15147598A JPH11345896A JP H11345896 A JPH11345896 A JP H11345896A JP 15147598 A JP15147598 A JP 15147598A JP 15147598 A JP15147598 A JP 15147598A JP H11345896 A JPH11345896 A JP H11345896A
Authority
JP
Japan
Prior art keywords
plating film
electroless
bump
palladium plating
circuit board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15147598A
Other languages
Japanese (ja)
Inventor
Masao Nakazawa
昌夫 中沢
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shinko Electric Industries Co Ltd
Original Assignee
Shinko Electric Industries Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shinko Electric Industries Co Ltd filed Critical Shinko Electric Industries Co Ltd
Priority to JP15147598A priority Critical patent/JPH11345896A/en
Publication of JPH11345896A publication Critical patent/JPH11345896A/en
Pending legal-status Critical Current

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Abstract

(57)【要約】 【課題】 無電解ニッケルめっき皮膜と無電解パラジウ
ムめっき皮膜との間の接合性を向上し、バンプの接合強
度を高めることのできる回路基板を提供する。 【解決手段】 外部接続端子部20に無電解ニッケルめ
っき皮膜、無電解パラジウムめっき皮膜、無電解金めっ
き皮膜がこの順に形成され、該めっき皮膜上にバンプが
形成される回路基板10において、前記無電解パラジウ
ムめっき皮膜のリン含有量が0.001〜1wt%であ
ることを特徴としている。
(57) [Problem] To provide a circuit board capable of improving the bondability between an electroless nickel plating film and an electroless palladium plating film and increasing the bonding strength of a bump. An electroless nickel plating film, an electroless palladium plating film, and an electroless gold plating film are formed on an external connection terminal portion in this order, and a bump is formed on the plating film. It is characterized in that the electrolytic palladium plating film has a phosphorus content of 0.001 to 1 wt%.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明はBGA(ボールグリ
ッドアレイ)型半導体装置用パッケージ等の、外部接続
端子部にバンプが形成される回路基板に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a circuit board having bumps formed on external connection terminals, such as a package for a BGA (ball grid array) type semiconductor device.

【0002】[0002]

【従来の技術】BGA型半導体装置用パッケージには外
部接続端子部に所要のめっき皮膜が形成され、このめっ
き皮膜上にはんだバンプ等のバンプが形成される。上記
めっき皮膜は、一般的には、無電解ニッケル皮膜、さら
にその上に無電解金めっき皮膜を形成するものが多い
が、昨今、コストの低減が要求されるようになり、金に
代わる代替金属として無電解パラジウムめっき皮膜が適
用されるようになってきている。この場合には、バンプ
の下地として、無電解ニッケルめっき皮膜、無電解パラ
ジウムめっき皮膜のめっき構成か、無電解ニッケルめっ
き皮膜、無電解パラジウムめっき皮膜、無電解金めっき
皮膜(薄いもの)のめっき構成が採用される。無電解パ
ラジウムめっきの場合、還元剤に種々のものが用いられ
る。リン酸塩系の還元剤を用いた場合、めっき皮膜中に
リンが含有される。還元剤にトリメチルアミンボランを
用いる場合にはめっき皮膜中にホウ素が含有されるが、
このめっき浴はほとんど実用化されていない。
2. Description of the Related Art In a package for a BGA type semiconductor device, a required plating film is formed on an external connection terminal portion, and a bump such as a solder bump is formed on the plating film. In general, the above-mentioned plating film is generally formed of an electroless nickel film and an electroless gold plating film thereon, but recently, cost reduction has been required, and an alternative metal to gold has been required. An electroless palladium plating film has been applied. In this case, the electroless nickel plating film, electroless palladium plating film, or the electroless nickel plating film, electroless palladium plating film, electroless gold plating film (thin) as the base of the bump Is adopted. In the case of electroless palladium plating, various reducing agents are used. When a phosphate-based reducing agent is used, the plating film contains phosphorus. When using trimethylamine borane as a reducing agent, boron is contained in the plating film,
This plating bath has hardly been put to practical use.

【0003】[0003]

【発明が解決しようとする課題】上記半導体装置用パッ
ケージの場合、バンプと下地めっき皮膜との接合性が問
題となる。バンプの密着性の試験に、VPS(Vaper Phase
Solder) とよばれる加熱試験がある。これは温度220
℃の溶媒蒸気中にサンプルを入れ、一定時間加熱した後
のバンプ接合強度をみるものである。この加熱試験で過
酷な条件を付与した場合、上記次亜リン酸塩を還元剤に
用いた無電解パラジウムめっき皮膜を形成したもので
は、要求されるバンプの接合強度が得にくいという課題
がある。
In the case of the above-mentioned package for a semiconductor device, the bonding property between the bump and the underlying plating film becomes a problem. VPS (Vaper Phase)
There is a heating test called Solder). This is temperature 220
A sample is put in a solvent vapor at a temperature of ° C., and the bump bonding strength after heating for a certain period of time is observed. When severe conditions are given in this heating test, there is a problem that it is difficult to obtain the required bonding strength of bumps in the case of forming an electroless palladium plating film using the above hypophosphite as a reducing agent.

【0004】発明者が鋭意検討した結果、バンプの剥が
れは、バンプと下地めっきとの間での剥がれではなく、
無電解ニッケルめっき皮膜と無電解パラジウムめっき皮
膜との間でおこり、試験後無電解ニッケルめっき皮膜が
一部露出する現象を見いだした。そこで種々検討した結
果、無電解パラジウムめっき皮膜中のリン含有量に着目
し、リン含有量を従来よりも低く抑えることで上記下地
めっき皮膜間の接合性を向上させることができることを
見いだした。すなわち、本発明の目的とするところは、
無電解ニッケルめっき皮膜と無電解パラジウムめっき皮
膜との間の接合性を向上し、バンプの接合強度を高める
ことのできる回路基板を提供するにある。
[0004] As a result of the inventor's intensive study, the peeling of the bump is not the peeling between the bump and the underlying plating,
A phenomenon occurred between the electroless nickel plating film and the electroless palladium plating film, and a phenomenon in which the electroless nickel plating film was partially exposed after the test was found. Therefore, as a result of various studies, the inventors have focused on the phosphorus content in the electroless palladium plating film, and found that the bondability between the base plating films can be improved by keeping the phosphorus content lower than before. That is, the object of the present invention is:
It is an object of the present invention to provide a circuit board capable of improving the bondability between an electroless nickel plating film and an electroless palladium plating film and increasing the bonding strength of a bump.

【0005】[0005]

【課題を解決するための手段】本発明は上記目的を達成
するため次の構成を備える。すなわち、本発明に係る回
路基板は、外部接続端子部に無電解ニッケルめっき皮
膜、無電解パラジウムめっき皮膜がこの順に形成され、
該無電解パラジウムめっき皮膜上にバンプが形成される
回路基板において、前記無電解パラジウムめっき皮膜の
リン含有量が0.001〜1wt%であることを特徴と
している。このように無電解パラジウムめっき皮膜中の
リン含有量を低くすることで、無電解ニッケルめっき皮
膜と無電解パラジウムめっき皮膜との間の接合性を向上
することができた。なお、リン含有量が零の場合は必要
な接合強度が得られなかった。
The present invention has the following arrangement to achieve the above object. That is, in the circuit board according to the present invention, an electroless nickel plating film and an electroless palladium plating film are formed in this order on the external connection terminal portion,
In the circuit board having bumps formed on the electroless palladium plating film, the electroless palladium plating film has a phosphorus content of 0.001 to 1 wt%. As described above, by reducing the phosphorus content in the electroless palladium plating film, the bondability between the electroless nickel plating film and the electroless palladium plating film could be improved. When the phosphorus content was zero, the required joining strength could not be obtained.

【0006】また、本発明に係る回路基板は、外部接続
端子部に無電解ニッケルめっき皮膜、無電解パラジウム
めっき皮膜、無電解金めっき皮膜がこの順に形成され、
該無電解金めっき皮膜上にバンプが形成される回路基板
において、前記無電解パラジウムめっき皮膜のリン含有
量が0.001〜1wt%であることを特徴としてい
る。無電解金めっき皮膜は無電解パラジウムめっき皮膜
の保護膜として設けるもので、コストの点から薄くてよ
い。またこの無電解金めっき皮膜ははんだバンプ中に拡
散してしまい、バンプと無電解パラジウムめっき皮膜と
の間の接合性は良好である。そして、無電解パラジウム
めっき皮膜中のリン含有量を上記範囲に設定することで
上記と同様に両めっき皮膜間の接合性が向上した。
In the circuit board according to the present invention, an electroless nickel plating film, an electroless palladium plating film, and an electroless gold plating film are formed in this order on the external connection terminals,
In a circuit board having bumps formed on the electroless gold plating film, the electroless palladium plating film has a phosphorus content of 0.001 to 1 wt%. The electroless gold plating film is provided as a protective film for the electroless palladium plating film, and may be thin in terms of cost. Further, the electroless gold plating film diffuses into the solder bumps, and the bonding property between the bump and the electroless palladium plating film is good. Then, by setting the phosphorus content in the electroless palladium plating film within the above range, the bondability between the two plating films was improved as described above.

【0007】[0007]

【発明の実施の形態】以下、本発明の好適な実施例を添
付図面に基づいて詳細に説明する。図1は回路基板の一
例であるBGA型半導体装置用のパッケージ10を示
す。12は樹脂基板である。樹脂基板12の片面には、
配線パターン14とチップ搭載部16が形成されてい
る。配線パターン14、チップ搭載部16は銅箔をエッ
チング加工して形成される。樹脂基板12の他面側に
は、上記配線パターン14とスルーホールビア18を介
して電気的に導通する配線パターン(外部接続用端子)
20が形成されている。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments of the present invention will be described below in detail with reference to the accompanying drawings. FIG. 1 shows a package 10 for a BGA type semiconductor device as an example of a circuit board. Reference numeral 12 denotes a resin substrate. On one side of the resin substrate 12,
A wiring pattern 14 and a chip mounting portion 16 are formed. The wiring pattern 14 and the chip mounting portion 16 are formed by etching a copper foil. On the other surface side of the resin substrate 12, a wiring pattern (external connection terminal) electrically connected to the wiring pattern 14 via the through-hole via 18
20 are formed.

【0008】この配線パターン20に後記するめっき皮
膜が形成され、このめっき皮膜を介して配線パターン2
0上にはんだバンプ等のバンプ22が形成される。24
および26はソルダーレジストからなるマスクである。
チップ搭載部16には半導体チップ(図示せず)が搭載
され、半導体チップと配線パターン14との間がワイヤ
により電気的に接続され、半導体チップおよびワイヤを
封止樹脂にて封止して半導体装置として用いられる。
A plating film described later is formed on the wiring pattern 20, and the wiring pattern 2 is formed through the plating film.
On bumps 0, bumps 22 such as solder bumps are formed. 24
And 26 are masks made of solder resist.
A semiconductor chip (not shown) is mounted on the chip mounting portion 16, the semiconductor chip and the wiring pattern 14 are electrically connected by wires, and the semiconductor chip and the wires are sealed with a sealing resin to form a semiconductor. Used as a device.

【0009】上記の配線パターン20上には、無電解ニ
ッケルめっき皮膜、無電解パラジウムめっき皮膜がこの
順に形成される。あるいはさらに無電解金めっき皮膜を
形成する。無電解ニッケルめっき皮膜は耐蝕用で、5μ
m前後の厚さに形成する。無電解パラジウムめっき皮膜
ははんだバンプ等のバンプとの間の接合性を向上させる
もので、0.3μm前後の厚さで形成する。無電解金め
っき皮膜は無電解パラジウムめっき皮膜保護用のもの
で、0.05μm前後の薄いものでよい。
An electroless nickel plating film and an electroless palladium plating film are formed on the wiring pattern 20 in this order. Alternatively, an electroless gold plating film is further formed. Electroless nickel plating film is for corrosion resistance, 5μ
m. The electroless palladium plating film is used to improve the bondability with a bump such as a solder bump, and is formed to have a thickness of about 0.3 μm. The electroless gold plating film is for protecting the electroless palladium plating film, and may be as thin as about 0.05 μm.

【0010】使用する無電解ニッケルめっき液は市販さ
れている公知のものでよい。また無電解金めっき液も市
販されている置換タイプの公知のものでよい。無電解パ
ラジウムめっき液は、金属源に塩化パラジウム、還元剤
に亜リン酸塩、安定剤としてメルカプト基を持つ有機酸
を基本組成としためっき液を使用した。還元剤に亜リン
酸塩を用いることによって、析出する無電解パラジウム
めっき皮膜中のリン含有量を従来の次亜リン酸塩を用い
るものに比して低く抑えることができた。すなわち、次
亜リン酸塩を用いた場合のリン含有量が4wt%以上で
あるのに対し、亜リン酸塩を用いた場合には、1wt%
以下のリン含有量に低減できた。なおリン含有量は亜リ
ン酸塩の添加量に比例する。
The electroless nickel plating solution used may be a commercially available known one. Also, the electroless gold plating solution may be a commercially available substitution type known solution. As the electroless palladium plating solution, a plating solution having a basic composition of palladium chloride as a metal source, phosphite as a reducing agent, and an organic acid having a mercapto group as a stabilizer was used. By using phosphite as the reducing agent, the phosphorus content in the electroless palladium plating film deposited could be suppressed lower than that using a conventional hypophosphite. That is, while the phosphorus content when using hypophosphite is 4 wt% or more, when using phosphite, 1 wt%
The following phosphorus content was able to be reduced. The phosphorus content is proportional to the amount of phosphite added.

【0011】以下に無電解パラジウムめっき液の浴組成
の一例を示す。 塩化パラジウム 0.01 mol/L エチレンジアミン 0.08 mol/L 亜リン酸ナトリウム 0.02 mol/L チオジグリコール酸 30 mg pH 6 浴温 60℃
The following is an example of the bath composition of the electroless palladium plating solution. Palladium chloride 0.01 mol / L Ethylenediamine 0.08 mol / L Sodium phosphite 0.02 mol / L Thiodiglycolic acid 30 mg pH 6 Bath temperature 60 ° C

【0012】[0012]

【実施例】以下の各実施例において、ボールシェア強度
は、市販のボールシェア試験装置を使い測定を行った。
また評価は基板にはんだボールを搭載後VPS装置によ
り、1回、2回および3回加熱した場合、あらかじめ基
板をVPS装置により、1回、2回および3回加熱した
後はんだボールを搭載したサンプルについて測定した。
判定はボールシェア強度とボールシェア試験後、基板側
のボールが剥がれた後の無電解ニッケルめっき皮膜の露
出程度から行った(サンプル数20)。 実施例1 パラジウム中のリンの含有量が重量比で約0.001%
になるよう調整した無電解パラジウムめっき液を用い
た。無電解Ni 5μm/無電解Pd 0.3μm/無電解Au 0.05mμ
m のめっき構成のBGA基板を作成し、ボールシェア試
験を行った。その結果を表1、表2に示す。
EXAMPLES In the following examples, the ball shear strength was measured using a commercially available ball shear tester.
In the evaluation, when the solder balls were mounted on the board and then heated once, twice, and three times by the VPS device, the sample was heated once, twice, and three times by the VPS device before mounting the solder balls. Was measured.
Judgment was made from the ball shear strength and the degree of exposure of the electroless nickel plating film after the ball on the substrate was peeled off after the ball shear test (20 samples). Example 1 The content of phosphorus in palladium was about 0.001% by weight.
The electroless palladium plating solution adjusted so as to be used was used. Electroless Ni 5μm / Electroless Pd 0.3μm / Electroless Au 0.05mμ
A BGA substrate having a plating configuration of m was prepared, and a ball shear test was performed. The results are shown in Tables 1 and 2.

【0013】[0013]

【表1】 [Table 1]

【0014】[0014]

【表2】 [Table 2]

【0015】実施例2 パラジウム中のリンの含有量が重量比で約0.5%にな
るよう調整した無電解パラジウムめっき液を用いた。無
電解Ni 5μm/無電解Pd 0.3μm/無電解Au 0.05mμm のめ
っき構成のBGA基板を作成し、ボールシェア試験を行
った。その結果を表3、表4に示す。
Example 2 An electroless palladium plating solution was used in which the content of phosphorus in palladium was adjusted to about 0.5% by weight. A BGA substrate having a plating configuration of electroless Ni 5 μm / electroless Pd 0.3 μm / electroless Au 0.05 μm was prepared, and a ball shear test was performed. The results are shown in Tables 3 and 4.

【0016】[0016]

【表3】 [Table 3]

【0017】[0017]

【表4】 [Table 4]

【0018】実施例3 パラジウム中のリンの含有量が重量比で約1.0%にな
るよう調整した無電解パラジウムめっき液を用いた。無
電解Ni 5μm/無電解Pd 0.3μm/無電解Au 0.05mμm のめ
っき構成のBGA基板を作成し、ボールシェア試験を行
った。その結果を表5、表6に示す。
Example 3 An electroless palladium plating solution adjusted so that the phosphorus content in palladium was about 1.0% by weight was used. A BGA substrate having a plating configuration of electroless Ni 5 μm / electroless Pd 0.3 μm / electroless Au 0.05 μm was prepared, and a ball shear test was performed. The results are shown in Tables 5 and 6.

【0019】[0019]

【表5】 [Table 5]

【0020】[0020]

【表6】 [Table 6]

【0021】比較例1 還元剤に蟻酸塩を使って、パラジウム中にリンが共析し
ないよう調整した無電解パラジウムめっき液を用いた。
無電解Ni 5μm/無電解Pd 0.3μm/無電解Au 0.05mμm の
めっき構成のBGA基板を作成し、ボールシェア試験を
行った。その結果を表7、表8に示す。
Comparative Example 1 An electroless palladium plating solution prepared by using formate as a reducing agent so as to prevent phosphorus from being eutectoid in palladium was used.
A BGA substrate having a plating configuration of electroless Ni 5 μm / electroless Pd 0.3 μm / electroless Au 0.05 μm was prepared, and a ball shear test was performed. The results are shown in Tables 7 and 8.

【0022】[0022]

【表7】 [Table 7]

【0023】[0023]

【表8】 [Table 8]

【0024】比較例2 還元剤に次亜リン酸塩を使って、パラジウム中にリンが
約5%共析するよう調整した無電解パラジウムめっき液
を用いた。無電解Ni 5μm/無電解Pd 0.3μm/無電解Au
0.05mμm のめっき構成のBGA基板を作成し、ボール
シェア試験を行った。その結果を表9、表10に示す。
Comparative Example 2 An electroless palladium plating solution prepared by using hypophosphite as a reducing agent and adjusting so that about 5% of phosphorus was eutectoid in palladium was used. Electroless Ni 5μm / Electroless Pd 0.3μm / Electroless Au
A BGA substrate having a plating configuration of 0.05 μm was prepared, and a ball shear test was performed. The results are shown in Tables 9 and 10.

【0025】[0025]

【表9】 [Table 9]

【0026】[0026]

【表10】 表1〜表6から明らかなように、無電解パラジウムめっ
き皮膜中のリン含有量が0.001〜1.0wt%の場
合、熱履歴の有る、無しに関わらずボールシェア強度は
高く、また剥がれ方もはんだが残った状態、すなわちは
んだバンプ内で剥がれが生じ、無電解ニッケルめっき皮
膜と無電解パラジウムめっき皮膜との間で剥がれは生じ
なく、両めっき皮膜間の接合強度は向上した。
[Table 10] As is clear from Tables 1 to 6, when the phosphorus content in the electroless palladium plating film is 0.001 to 1.0 wt%, the ball shear strength is high irrespective of whether or not there is a heat history, and the film is peeled off. On the other hand, peeling occurred in the state where the solder remained, that is, in the solder bumps, no peeling occurred between the electroless nickel plating film and the electroless palladium plating film, and the bonding strength between both plating films was improved.

【0027】これに対し、表7〜表10に示されるよう
に、無電解パラジウムめっき皮膜中のリン含有量が零、
あるいは約5wt%以上の場合、ボールシェア強度が上
記実施例と比較して相対に低く、また下地の無電解ニッ
ケルめっき皮膜が露出することからわかるように、無電
解ニッケルめっき皮膜と無電解パラジウムめっき皮膜と
の間の接合性が低いことがわかる。
On the other hand, as shown in Tables 7 to 10, the phosphorus content in the electroless palladium plating film was zero,
Alternatively, in the case of about 5 wt% or more, as can be seen from the fact that the ball shear strength is relatively lower than that of the above-described embodiment and the underlying electroless nickel plating film is exposed, the electroless nickel plating film and the electroless palladium plating It can be seen that the bondability with the film is low.

【0028】なお、上記実施例では、無電解ニッケルめ
っき、無電解パラジウムめっき、無電解金めっきの3層
めっきの構成で示したが、無電解ニッケルめっき、無電
解パラジウムめっきの2層めっきの構成でも全く同様の
結果が得られた。本発明に係る回路基板はBGA型半導
体装置用パッケージに限定されるものではなく、外部接
続用端子部にバンプが形成される回路基板に適用でき
る。
In the above embodiment, the three-layer plating of electroless nickel plating, electroless palladium plating, and electroless gold plating is described. However, the two-layer plating of electroless nickel plating and electroless palladium plating is employed. However, exactly the same results were obtained. The circuit board according to the present invention is not limited to a package for a BGA type semiconductor device, but can be applied to a circuit board in which a bump is formed on an external connection terminal portion.

【0029】[0029]

【発明の効果】本発明に係る回路基板によれば、上述し
たように、無電解パラジウムめっき皮膜中のリン含有量
を低くすることで、無電解ニッケルめっき皮膜と無電解
パラジウムめっき皮膜との間の接合性を向上することが
でき、バンプの接合強度を高めることができる。
According to the circuit board of the present invention, as described above, the phosphorus content in the electroless palladium plating film is reduced so that the distance between the electroless nickel plating film and the electroless palladium plating film is reduced. Can be improved, and the bonding strength of the bump can be increased.

【図面の簡単な説明】[Brief description of the drawings]

【図1】BGA型半導体装置用のパッケージの断面図で
ある。
FIG. 1 is a cross-sectional view of a package for a BGA type semiconductor device.

【符号の説明】[Explanation of symbols]

10 パッケージ 12 樹脂基板 14 配線パターン 16 チップ搭載部 18 スルーホールビア 20 配線パターン(外部接続用端子) 22 バンプ 24、26 マスク DESCRIPTION OF SYMBOLS 10 Package 12 Resin board 14 Wiring pattern 16 Chip mounting part 18 Through-hole via 20 Wiring pattern (terminal for external connection) 22 Bump 24, 26 Mask

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 外部接続端子部に無電解ニッケルめっき
皮膜、無電解パラジウムめっき皮膜がこの順に形成さ
れ、該無電解パラジウムめっき皮膜上にバンプが形成さ
れる回路基板において、 前記無電解パラジウムめっき皮膜のリン含有量が0.0
01〜1wt%であることを特徴とする回路基板。
An electroless nickel plating film and an electroless palladium plating film are formed on an external connection terminal in this order, and a bump is formed on the electroless palladium plating film. Has a phosphorus content of 0.0
A circuit board, wherein the content is 0.01 to 1 wt%.
【請求項2】 外部接続端子部に無電解ニッケルめっき
皮膜、無電解パラジウムめっき皮膜、無電解金めっき皮
膜がこの順に形成され、該無電解金めっき皮膜上にバン
プが形成される回路基板において、 前記無電解パラジウムめっき皮膜のリン含有量が0.0
01〜1wt%であることを特徴とする回路基板。
2. A circuit board in which an electroless nickel plating film, an electroless palladium plating film, and an electroless gold plating film are formed in this order on an external connection terminal portion, and a bump is formed on the electroless gold plating film. Phosphorus content of the electroless palladium plating film is 0.0
A circuit board, wherein the content is 0.01 to 1 wt%.
JP15147598A 1998-06-01 1998-06-01 Circuit board Pending JPH11345896A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15147598A JPH11345896A (en) 1998-06-01 1998-06-01 Circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15147598A JPH11345896A (en) 1998-06-01 1998-06-01 Circuit board

Publications (1)

Publication Number Publication Date
JPH11345896A true JPH11345896A (en) 1999-12-14

Family

ID=15519332

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15147598A Pending JPH11345896A (en) 1998-06-01 1998-06-01 Circuit board

Country Status (1)

Country Link
JP (1) JPH11345896A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008177261A (en) * 2007-01-17 2008-07-31 Okuno Chem Ind Co Ltd Multilayer plating film and printed wiring board
JP2008184679A (en) * 2007-01-31 2008-08-14 Okuno Chem Ind Co Ltd Activation composition for electroless palladium plating
KR20160084331A (en) * 2010-01-29 2016-07-13 니폰 가가쿠 고교 가부시키가이샤 Conductive powder and conductive material comprising thereof and method for preparing conductive particle

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008177261A (en) * 2007-01-17 2008-07-31 Okuno Chem Ind Co Ltd Multilayer plating film and printed wiring board
JP2008184679A (en) * 2007-01-31 2008-08-14 Okuno Chem Ind Co Ltd Activation composition for electroless palladium plating
KR20160084331A (en) * 2010-01-29 2016-07-13 니폰 가가쿠 고교 가부시키가이샤 Conductive powder and conductive material comprising thereof and method for preparing conductive particle
KR20170087068A (en) * 2010-01-29 2017-07-27 니폰 가가쿠 고교 가부시키가이샤 Conductive powder and conductive material comprising thereof and method for preparing conductive particle

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