JPH11345933A - Multi-chip semiconductor device and method of manufacturing the same - Google Patents

Abstract

(57) [Object] To provide a multi-chip module capable of preventing occurrence of a failure due to diffusion of a constituent material of solder even when connection between a bump electrode and a conductive paste of a chip through plug is performed by solder. SOLUTION: A plurality of semiconductor chips 21 are laminated, and at least one semiconductor chip 21 has an Si substrate 21.
A chip through plug 24 is formed in a through hole penetrating through the Sn-Zn solder 31.
Is electrically connected to the Au bump electrode 32 via
In a multi-chip module in which the bump electrodes 32 are electrically connected to other chips, the chip through plugs 24 are connected to a conductive paste 25 as a plug body, and a barrier metal film covering side and bottom surfaces of the conductive paste 25. 29, and a silicon nitride film 30 provided between the barrier metal 29 and the inner wall of the through hole.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multi-chip semiconductor device formed by stacking a plurality of chips and a method for manufacturing the same.

[0002]

2. Description of the Related Art In order to enhance the function of an electronic circuit system composed of a plurality of semiconductor chips, in particular, to achieve high-speed operation, it is necessary to minimize connection wiring between semiconductor chips.

For this reason, in contrast to the conventional method of mounting a plurality of semiconductor chips on a multi-layer substrate in a planar manner, a technique for minimizing connection wiring between the semiconductor chips by stacking the plurality of semiconductor chips has been studied. Have been. A semiconductor device formed by stacking a plurality of semiconductor chips in this way is called a multi-chip module.

By the way, in order to manufacture this kind of multi-chip module, it is necessary to electrically connect the vertically stacked semiconductor chips. The present inventors, in order to realize such a connection, as shown in the sectional view of FIG.
It has already been proposed to use a chip through plug 82 penetrating the semiconductor chip 81.

FIG. 13 is a detailed sectional view of a portion surrounded by a broken line in FIG. The semiconductor chip 81 is a Si substrate 83
A circuit layer 84 on which elements are integrated is formed.

The chip through plug 82 is made of a sintered conductive paste (plug body) 85 made of a metal such as Ni or Al, and a SiO ₂ film 86 formed so as to cover the side surface of the conductive paste 85. It is composed of

On the circuit layer 84 side, the conductive paste 85 is applied to the Au bump electrode 88 via the Al pad electrode 87.
Connected to On the other hand, on the side opposite to the circuit layer 84, the conductive paste 85 is connected to the Au bump electrode 88 via the Sn-Zn solder 89.

[0008] Here, the conductive paste 85 is made of Sn-Zn.
The reason for connection to the Au bump electrodes 88 via the solder 89 is that when a defect occurs in a part of the stacked semiconductor chips 81, the Sn-Zn solder 89 is melted and the defective semiconductor chip 81 is removed. This is to facilitate repair by replacing the semiconductor chip 81 with a good one.

The conductive paste 85 is a sintered body of metal particles, and as shown in the micrograph of the cross section SEM in FIG. 13, there are many gaps (pores) between the metal particles. Therefore, the constituent material of the Sn—Zn solder 89 diffuses into the conductive paste 83 through the gap and enters.

FIGS. 14 to 16 show a cross section S showing this.
3 shows a micrograph of EM. FIG. 14 is a micrograph of a cross section SEM of the Al paste, and FIG.
FIG. 16 is a micrograph of a cross-sectional SEM of a sample to which n-Zn solder has been applied by a dip method, and FIG. From these figures, it can be seen that when the Sn—Zn solder is applied on the Al paste, the Sn—Zn solder penetrates into the Al paste.

The constituent material of the Sn—Zn solder 89 diffused and penetrated into the conductive paste 85 further diffuses and penetrates into the Al pad electrode 87, erodes the Al of the Al pad electrode 87, and in the worst case, Diffusion into the circuit layer 84 causes a failure of the semiconductor chip 81.

[0012]

As described above, in the conventional multi-chip module, the connection between the bump electrode and the conductive paste (plug body) is performed by solder, and therefore, the constituent material of the solder is the conductive paste. Of the semiconductor chip, and invades the pad electrode, erodes the pad electrode, and in the worst case, diffuses into the circuit layer of the semiconductor chip, thereby causing a defect of the semiconductor chip. .

The present invention has been made in consideration of the above circumstances, and has as its object the purpose of connecting the bump electrodes to the connection plugs made of conductive paste by soldering. It is an object of the present invention to provide a multi-chip semiconductor device and a method of manufacturing the same that can prevent the occurrence of defects due to diffusion.

[0014]

Means for Solving the Problems To achieve the above object, a first multi-chip semiconductor device according to the present invention comprises a plurality of chips having a semiconductor substrate on which elements are integrated and formed. The at least one chip has a connection plug formed in a through hole penetrating the semiconductor substrate, and the connection plug is electrically connected to a bump electrode via solder, and the bump electrode is electrically connected to another chip. A conductive paste as a plug body; an insulating barrier film provided between the conductive paste and an inner wall of the through-hole; It is characterized by comprising a conductive barrier film provided between the paste and the solder.

In a second multi-chip semiconductor device according to the present invention, a plurality of chips having a semiconductor substrate on which elements are integrally formed are stacked, and at least one chip has a through hole penetrating the semiconductor substrate. In a multichip semiconductor device in which a connection plug is formed, the connection plug is electrically connected to a bump electrode via solder, and the bump electrode is electrically connected to another chip.
The connection plug includes a conductive paste as a plug body, a conductive barrier film provided between the conductive paste and the inner wall of the through hole, and between the conductive paste and the solder. It is characterized by comprising an insulating barrier film provided between the barrier film and the inner wall of the through hole.

In a third multi-chip semiconductor device according to the present invention, a plurality of chips having a semiconductor substrate on which elements are integrally formed are stacked, and at least one chip has a through hole penetrating the semiconductor substrate. In a multichip semiconductor device in which a connection plug is formed, the connection plug is electrically connected to a bump electrode via solder, and the bump electrode is electrically connected to another chip.
The connection plug is a conductive paste as a plug body, an insulating barrier film provided between the conductive paste and the inner wall of the through hole, and a conductive substance filling a gap in the conductive paste. It is characterized by being comprised from.

Here, it is preferable that the insulating barrier film can prevent the impurities in the conductive paste from diffusing into the semiconductor substrate.

Preferably, the conductive barrier film can prevent the constituent material of the solder from diffusing into the conductive paste.

When the conductive paste does not contain glass, it is preferable to provide an adhesion film between the conductive paste and the insulating barrier film.

According to a first method of manufacturing a multi-chip semiconductor device according to the present invention, a step of forming a groove in a surface of a semiconductor substrate, an insulating barrier film and a conductive barrier over the entire surface so as to cover the surface of the front groove are provided. A step of sequentially forming a film, a step of burying and forming a conductive paste as a plug body through the insulating barrier film and the conductive barrier film inside the groove, and Exposing the barrier film, removing the exposed insulating barrier film, and exposing the conductive barrier film.

In a second method of manufacturing a multi-chip semiconductor device according to the present invention, a step of forming a groove on the surface of a semiconductor substrate and a step of forming an insulating barrier film over the entire surface so as to cover the surface of the front groove Performing a step of burying and forming a conductive paste as a plug body inside the groove via the insulating barrier film; filling a gap in the conductive paste with a conductive substance; After exposing the insulating barrier film by retreating the back surface, and exposing the paste by removing the exposed insulating barrier film.

Here, the gap in the conductive paste is filled with a conductive substance by applying a liquid conductive substance on the conductive paste by, for example, a method such as electroless plating.

[Operation] According to the first to third multichip semiconductor devices according to the present invention, the conductive barrier film is provided between the conductive paste and the solder. It is possible to prevent the constituent material of the solder from entering the conductive paste. Thereby, it is possible to prevent the occurrence of defects due to the diffusion of the constituent material of the solder.

According to the first to third multichip semiconductor devices of the present invention, since the insulating barrier film is provided between the conductive paste and the inner wall of the through hole, the insulating barrier film is provided. This makes it possible to prevent impurities in the conductive paste from diffusing into the semiconductor substrate.
As a result, it is possible to prevent the occurrence of defects due to the diffusion of impurities in the conductive paste.

Further, according to the second multi-chip semiconductor device of the present invention, in addition to the above-described functions and effects, for example, by the method of manufacturing the first multi-chip semiconductor device of the present invention, an insulating barrier film Since the conductive barrier film and the conductive barrier film can be formed in the same forming step, an effect of simplifying the process can be obtained.

[0026]

Embodiments of the present invention (hereinafter, referred to as embodiments) will be described below with reference to the drawings.

(First Embodiment) FIG. 1 shows a first embodiment of the present invention.
It is sectional drawing which shows the chip through plug (connection plug) of the multichip module which concerns on embodiment.

In FIG. 1, reference numeral 1 denotes a semiconductor chip. The semiconductor chip 1 is composed of a Si substrate 2 and a circuit layer 3 in which elements formed on the surface thereof are integrated. A chip through plug 4 that penetrates the semiconductor chip 1 is formed.

The chip-through plug 4 is made of a metal such as Ni or Al, and covers a sintered conductive paste (plug main body) 5 containing heavy metal glass such as lead glass and a side surface of the conductive paste 5. Metal film composed of a silicon nitride film (insulating barrier film) 6 and a Ti film 7, a Ni film 8, and a Pd film 9 formed on the conductive paste 5 on the side opposite to the circuit layer 3 side (conductive barrier) Film 10).

The barrier metal film 10 is connected to the Au bump electrode 12 via the Sn—Zn solder 11. On the other hand, on the circuit layer 3 side, the conductive paste 5 is connected to the Au bump electrode 12 via the Al pad electrode 13. In the figure, reference numeral 14 denotes a passivation film.

With such a configuration, the constituent material of the Sn—Zn solder 11 is diffused into the gap in the conductive paste 5 by the barrier metal film 10 between the conductive paste 5 and the Sn—Zn solder 11. To prevent intrusion.

As a result, it is possible to prevent the failure of the element formed on the circuit layer 10 due to the diffusion of the constituent material of the Sn—Zn solder 11, that is, the failure of the semiconductor chip 1.

The silicon nitride film 6 between the conductive paste 5 and the Si substrate 2 diffuses impurities in the conductive paste 5, for example, heavy metals in heavy metal glass such as lead glass into the Si substrate 2. Can be prevented. Thereby, it is possible to prevent the occurrence of a defect of the element formed on the circuit layer 10 due to the diffusion of the impurity in the conductive paste 5, that is, the occurrence of a defect of the semiconductor chip 1.

Next, a method of forming the chip through plug 24 will be described. FIG. 2 is a process sectional view showing a method of forming the chip through plug 4. In this method, the barrier metal film 1 is formed after the step of forming a normal chip through plug.
0 is added.

First, as shown in FIG.
After the conductive paste 5, the silicon nitride film 6, and the passivation film 14 are formed on the Si substrate 2 on which is formed according to a known method, the Ti film 7 and the Ni film Film 8, Pd film 9
Are sequentially formed by, for example, a sputtering method.

Next, as shown in FIG.
And a resist pattern 16 covering the vicinity thereof is formed by photolithography.

Next, as shown in FIG. 2C, the exposed Ni film 8 and Pd are exposed using the resist pattern 16 as a mask.
The film 9 is removed by etching. As a result, the Ti film 7 is exposed. Thereafter, the resist pattern 16 is removed by, for example, ashing.

Next, as shown in FIG.
After forming a resist pattern 17 covering the i-film 7, Pd
A Sn—Zn solder 11 is formed on the film 9. Thereafter, the resist pattern 17 is removed by, for example, ashing.

Next, as shown in FIG.
The exposed Ti film 7 is removed by etching using the solder 11 as a mask.

Finally, as shown in FIG.
The Zn solder 11 is retracted by wet etching,
The chip through plug 4 is completed.

(Second Embodiment) FIG. 3 shows a second embodiment of the present invention.
It is sectional drawing which shows the chip through plug (connection plug) of the multichip module which concerns on embodiment.

In the figure, reference numeral 21 denotes a semiconductor chip.
The semiconductor chip 21 includes a Si substrate 22 and a circuit layer 23 on which elements formed on the surface are integrated. A chip through plug 24 that penetrates the semiconductor chip 21 is formed.

The chip through plug 24 is made of a metal such as Ni or Al, and includes a sintered conductive paste (plug body) 25 containing heavy metal glass such as lead glass, and a side surface and a circuit of the conductive paste 25. A TiN film 26, a Ti film 27, which covers the surface (bottom surface) opposite to the layer 23;
Barrier metal film (conductive barrier film) composed of Ni film 28
29, and a silicon nitride film (insulating barrier film) 30 formed on the side surface of the conductive paste 25 via the barrier metal film 29.

The barrier metal film 29 is made of Sn—Zn solder 3
1 and connected to the Au bump electrode 32. on the other hand,
On the circuit layer 23 side, the conductive paste 25 is connected to the Au bump electrode 32 via the Al pad electrode 33. In the figure, reference numeral 34 denotes a passivation film.

With such a configuration, the barrier metal film 29 between the conductive paste 25 and the Sn—Zn solder 31 is formed.
Thereby, the constituent material of the Sn—Zn solder 31 can be prevented from diffusing into the conductive paste 25 and entering. As a result, it is possible to prevent the failure of the element formed on the circuit layer 23 due to the diffusion of the constituent material of the Sn-Zn solder 31, that is, the failure of the semiconductor chip 21.

Further, the conductive paste 25 and the Si substrate 22
Between the conductive paste 2 and the silicon nitride film 30.
5, for example, heavy metals in heavy metal glass such as lead glass can be prevented from diffusing into the Si substrate 22. Thereby, it is possible to prevent a failure of the element formed on the circuit layer 23, that is, the semiconductor chip 21 due to the diffusion of the impurity in the conductive paste 25.

Next, a method for forming the chip through plug 24 will be described. 4 to 6 show the chip through plug 2
4 is a process cross-sectional view illustrating a forming method of No. 4; FIG.

First, as shown in FIG. 4A, a circuit layer 23 is formed on the surface of a Si substrate 22, and subsequently, reactive ion etching (R) using ICP type high density plasma is performed.
By IE (Reactive Ion Etching), a groove 35 that penetrates the circuit layer 23 and reaches an intermediate depth of the Si substrate 22 is formed. The opening diameter of the groove 35 is 50 to 100 μm, and the depth is 150 to 200 μm.

Next, as shown in FIG. 4B, a silicon nitride film 30 is formed on the entire surface by a CVD method so as to cover the surface of the groove 35.

Next, as shown in FIG. 4C, a Ni film 28 is formed on the silicon nitride film 30 by a sputtering method or a plating method.

Next, as shown in FIG.
A Ti film 27 and a TiN film 26 are sequentially formed thereon by a sputtering method. Here, the TiN film 26 may be formed by a CVD method.

Next, as shown in FIG. 4E, a conductive paste 25 is applied to the entire surface by a screen printing method or the like so as to fill the inside of the groove 35.

Next, as shown in FIG. 5F, the surplus conductive paste 25, TiN film 26 and T
The i film 27 is removed by CMP or the like. Thereafter, the conductive paste 25 is fired.

Next, as shown in FIG. 5G, the excess silicon nitride film 30 outside the trench 35 is removed by CMP or CDE.
Removed by the method.

Next, as shown in FIG. 5H, after forming an Al pad electrode 35 made of Al or Cu-added Al on the conductive paste 25, a passivation film 34 made of silicon nitride, polyimide or the like is formed. I do.

Next, as shown in FIG. 5 (i), the Si substrate 2 is left with a thickness of about 1 μm from the bottom of the groove 35.
2 is polished and receded.

Next, as shown in FIG. 6J, the back surface of the Si substrate 22 is receded by wet etching or CDE until the silicon nitride film 30 is exposed. As a result, a through hole is formed in the Si substrate 21.

Next, as shown in FIG. 6 (k), the exposed silicon nitride film 30 is removed by wet etching or CDE to expose the Ni film 28. As a result, a chip through plug 24 penetrating the semiconductor chip is completed.

The subsequent process is followed by a normal multi-chip module forming process. For example, as shown in FIG. 6 (l), a passivation film 34 made of silicon nitride, polyimide or the like is formed on the back surface of the Si substrate 22. As shown in FIG. 6 (m), the Sn—Zn solder 31 and the Al
The step of forming the pad electrode 33 and the step of connecting the Au bump electrode 32 follow.

According to such a forming method, the barrier metal film 29 and the silicon nitride film 30 shown in FIG. 3 can be formed in the same forming step, so that the silicon nitride film 30 was formed as in the first embodiment. Compared to a method of forming the barrier film 10 in a separate step later, the number of steps can be reduced, and the process can be simplified.

(Third Embodiment) FIG. 8 shows a third embodiment of the present invention.
It is sectional drawing which shows the chip through plug (connection plug) of the multichip module which concerns on embodiment.

In the figure, reference numeral 41 denotes a semiconductor chip.
The semiconductor chip 41 includes a Si substrate 42 and a circuit layer 43 on which elements formed on the surface are integrated. A chip through plug 44 penetrating the semiconductor chip 41 is formed.

The tip through plug 44 is made of Ni, A
1 and a sintered conductive paste (plug body) 45 containing heavy metal glass such as lead glass.
And a filling metal 46 made of a metal such as NiB for filling gaps (pores) between conductive particles in the conductive paste 45, and a silicon nitride film 47 covering the side surfaces of the conductive paste 45. .

On the circuit layer 43 side, the conductive paste 45 is applied to the Au bump electrode 49 via the Al pad electrode 48.
Connected to On the other hand, on the side opposite to the circuit layer 43, the conductive paste 45 is connected to the Au bump electrode 49 via the Sn—Zn solder 50. In the figure, 51
Indicates a passivation film.

With such a configuration, since the gaps (pores) between the conductive particles in the conductive paste 45 are filled with the filler metal 46, the constituent material of the Sn—Zn solder 50 is in the conductive paste. Can be prevented. Thereby, it is possible to prevent the failure of the element formed in the circuit layer 43 due to the diffusion of the constituent material of the Sn-Zn solder 50, that is, the failure of the semiconductor chip 41.

The conductive paste 45 and the Si substrate 42
Between the conductive paste 4 and the silicon nitride film 47.
5, for example, heavy metal in heavy metal glass such as lead glass can be prevented from diffusing into the Si substrate 42. Thus, it is possible to prevent the occurrence of a defect of the element formed on the circuit layer 43 due to the diffusion of the impurity in the conductive paste 45, that is, the occurrence of a defect of the semiconductor chip 41.

Next, a method of forming the chip through plug 44 will be described. 9 to 11 are process cross-sectional views illustrating a method of forming the chip through plug 44.

First, as shown in FIG. 9A, a circuit layer 43 is formed on the surface of a Si substrate 42, and subsequently, the circuit layer 43 is penetrated by RIE using ICP type high density plasma, A groove 52 is formed to reach a midway depth of the substrate 42. The opening diameter of the groove 52 is 50 to 100 μm, and the depth is 150 to 200 μm.

Next, as shown in FIG. 9 (b), a silicon nitride film 47 is
It is formed by the VD method.

Next, as shown in FIG. 9C, a conductive paste 45 is applied on the entire surface by a screen printing method or the like so as to fill the inside of the groove 52.

Next, as shown in FIG. 9D, the surplus conductive paste 45 outside the groove 52 is removed by CMP or the like. Thereafter, the conductive paste 45 is fired.

Next, as shown in FIG.
Filling metal 46 is applied over the entire surface by electroless plating or the like, and gaps (pores) between metal particles of conductive paste 45 are filled with filling metal 46. Next, as shown in FIG. Is removed by CMP or the like.

Next, as shown in FIG. 10G, the excess silicon nitride film 47 outside the trench 52 is removed by CMP or CD.
Removed by E method.

Next, as shown in FIG. 10H, an Al or Cu-added Al
After forming the pad electrode 48, a passivation film 51 made of silicon nitride, polyimide or the like is formed.

Next, as shown in FIG. 10I, the back surface of the Si substrate 42 is polished while leaving about 1 μm thick Si from the bottom of the groove 52.

Next, as shown in FIG. 11J, the Si substrate 4 is removed until the silicon nitride film 47 on the bottom of the groove 52 is exposed.
2 is receded by wet etching or CDE. As a result, a through hole is formed in the Si substrate 42.

Next, as shown in FIG. 11 (k), the exposed silicon nitride film 47 is wet-etched or CDE
And the conductive paste 45 is exposed. As a result, the chip through plug 4 penetrating the semiconductor chip
4 is completed.

The subsequent process is followed by a normal multi-chip module forming process. For example, as shown in FIG. 11 (l), a passivation film 51 made of silicon nitride, polyimide or the like is formed on the back side of the Si substrate 42. Step, as shown in FIG. 11 (m), Sn-Zn solder 50 and A
Step of forming pad electrode 48, Au bump electrode 49
Is connected.

The present invention is not limited to the above embodiment. For example, in the above embodiment, a conductive paste containing a heavy metal glass such as lead glass is used, but a conductive paste containing no glass component such as lead glass may be used.

In this case, since there is no glass component, the adhesion between the conductive paste and the Si substrate is reduced. For such a disadvantage, it is preferable to insert an adhesive film between the conductive paste and the Si substrate, which is capable of increasing the adhesion by reacting with the conductive particles in the conductive paste.

For example, when a Ni paste is used as the conductive paste, a Ni film or an Nb film may be used as the adhesion film. When an Al paste is used as the conductive paste, a Ni film, a palladium film, or a polycrystalline Si film is preferably used as the adhesion film. Examples of a method for forming the adhesion film include a sputtering method and an electroless plating method.

FIG. 7 shows a micrograph as a result of observing a sample obtained by sintering a Ni paste on a Ni film with a cross-sectional SEM. The Ni film was formed by a sputtering method. From the figure, it can be seen that a reaction occurs between the Ni particles in the Ni paste and the Ni film.

Therefore, in the case of the second embodiment, when a Ni paste is used as the conductive paste 25, the conductive paste 25 and the TiN film are used between the conductive paste 25 and the Si substrate 22, in this case. 26 may be provided with a Ni film.

In the above embodiment, the silicon nitride film is used as the insulating barrier film.
Other insulating films may be used as long as they can insulate the substrate and prevent impurities in the conductive paste from diffusing into the Si substrate.

In the above embodiment, a stacked film of a Ti film, a Ni film, a Pd film, a TiN film,
Although a laminated film of a Ti film and a Ni film was used, a conductive film having another laminated structure or a single-layer film may be used as long as the constituent material of the solder can be prevented from diffusing into the conductive paste. good.

The solder is not limited to Sn—Zn solder.

Further, there may be a semiconductor chip having a chip through plug that is not electrically connected to another semiconductor chip. That is, there may be a semiconductor chip in which a chip through plug is formed only for the purpose of improving heat dissipation.

In addition, various modifications can be made without departing from the spirit of the present invention.

[0089]

As described above in detail, according to the present invention, since the conductive barrier film is provided between the conductive paste and the solder, the material of the solder is changed by the conductive barrier film. This makes it possible to prevent diffusion and intrusion into the inside, thereby realizing a multi-chip semiconductor device and a method for manufacturing the same that can prevent the occurrence of defects due to the diffusion of the constituent material of the solder.

[Brief description of the drawings]

FIG. 1 is a sectional view showing a chip through plug of a multichip module according to a first embodiment of the present invention.

FIG. 2 is a process cross-sectional view showing a method of forming the chip through plug.

FIG. 3 is a sectional view showing a chip through plug of a multichip module according to a second embodiment of the present invention.

FIG. 4 is a process sectional view showing the method of forming the chip through plug.

FIG. 5 is a process sectional view illustrating the method of forming the chip through plug following FIG. 4;

FIG. 6 is a process sectional view illustrating the method of forming the chip through plug following FIG. 5;

FIG. 7 is a micrograph showing a result of observing a sample obtained by firing a Ni paste on a Ni film by a cross-sectional SEM.

FIG. 8 is a sectional view showing a chip through plug of a multichip module according to a third embodiment of the present invention.

FIG. 9 is a process sectional view showing the method of forming the chip through plug.

FIG. 10 is a process sectional view showing the method of forming the same chip through plug following FIG. 9;

FIG. 11 is a process sectional view showing the method of forming the same chip through plug following FIG. 10;

FIG. 12 is a sectional view showing a conventional multichip module.

FIG. 13 is a sectional view showing a detailed structure of a chip through plug of the multichip module.

FIG. 14 is a micrograph of a cross-sectional SEM showing that gaps (pores) between metal particles are present in the conductive paste.

FIG. 15 is a micrograph of a cross-sectional SEM of an Al paste.

FIG. 16 is a micrograph of a cross section SEM of a sample in which Sn—Zn solder is applied on an Al paste by a dip method.

FIG. 17 is a micrograph showing an enlarged part of FIG.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 ... Semiconductor chip 2 ... Si substrate 3 ... Circuit layer 4 ... Chip through plug (connection plug) 5 ... Conductive paste (plug main body) 6 ... Silicon nitride film (insulating barrier film) 7 ... Ti film 8 ... Ni film 9 ... Pd film 10 ... Barrier metal film (conductive barrier film) 11 ... Sn-Zn solder 12 ... Au bump electrode 13 ... Al pad electrode 14 ... Passivation film 15 ... Opening 16 ... Resist pattern 17 ... Resist pattern 21 ... Semiconductor chip Reference Signs List 22 Si substrate 23 Circuit layer 24 Chip through plug (connection plug) 25 Conductive paste (plug body) 26 TiN film 27 Ti film 28 Ni film 29 Barrier metal film (conductive barrier film) 30 ... Silicon nitride film (insulating barrier film) 31 ... Sn-Zn solder 32 ... Au bump electrode 33 ... Al pad electrode 34 ... Passivation film 35 Groove 41 Semiconductor chip 42 Si substrate 43 Circuit layer 44 Chip through plug (connection plug) 45 Conductive paste (plug body) 46 Filled metal 47 Silicon nitride film (insulating barrier film) 48 Al pad electrode 49 Au bump electrode 50 Sn-Zn solder 51 Passivation film 52 Groove

 ──────────────────────────────────────────────────続 き Continued on the front page (72) Inventor Yoshimi Hisatsune 8 Shinsugita-cho, Isogo-ku, Yokohama-shi, Kanagawa Inside the Toshiba Yokohama office

Claims (9)

[Claims] 1. A semiconductor device comprising: a plurality of chips each having a semiconductor substrate on which elements are integratedly formed; and at least one chip having a connection plug formed in a through hole penetrating the semiconductor substrate; A multi-chip semiconductor device electrically connected to a bump electrode through a semiconductor chip, and the bump electrode is electrically connected to another chip. The connection plug comprises: a conductive paste as a plug body; A multi-chip comprising: an insulating barrier film provided between a paste and an inner wall of the through hole; and a conductive barrier film provided between the conductive paste and the solder. Semiconductor device. 2. A semiconductor device comprising: a plurality of chips having a semiconductor substrate on which elements are integratedly formed; and at least one chip having a connection plug formed in a through hole penetrating the semiconductor substrate; A multi-chip semiconductor device electrically connected to a bump electrode through a semiconductor chip, and the bump electrode is electrically connected to another chip. The connection plug comprises: a conductive paste as a plug body; A conductive barrier film provided between the paste and the inner wall of the through hole and between the conductive paste and the solder; and an insulating barrier provided between the conductive barrier film and the inner wall of the through hole. A multi-chip semiconductor device comprising: a film. 3. A semiconductor device comprising: a plurality of chips having a semiconductor substrate on which elements are integratedly formed; and at least one chip having a connection plug formed in a through hole penetrating the semiconductor substrate, wherein the connection plug is soldered. A multi-chip semiconductor device electrically connected to a bump electrode through a semiconductor chip, and the bump electrode is electrically connected to another chip. The connection plug comprises: a conductive paste as a plug body; A multi-chip semiconductor device comprising: an insulating barrier film provided between a paste and an inner wall of the through-hole; and a conductive substance filling a gap in the conductive paste. 4. The semiconductor device according to claim 1, wherein the insulating barrier film can prevent impurities in the conductive paste from diffusing into the semiconductor substrate. A manufacturing method of the multichip semiconductor device according to the above. 5. The manufacturing method of a multi-chip semiconductor device according to claim 2, wherein said conductive barrier film is capable of preventing a constituent material of said solder from diffusing into said conductive paste. Method. 6. The conductive paste according to claim 1, wherein the conductive paste does not contain glass, and an adhesion film is provided between the conductive paste and the insulating barrier film. 4. The multi-chip semiconductor device according to any one of 3. 7. A step of forming a groove on the surface of the semiconductor substrate, a step of sequentially forming an insulating barrier film and a conductive barrier film on the entire surface so as to cover the surface of the front groove, and A step of burying and forming a conductive paste as a plug body via an insulating barrier film and a conductive barrier film; and a step of retreating a back surface of the substrate to expose the insulating barrier film. Removing the film to expose the conductive barrier film. 8. A step of forming a groove on the surface of the semiconductor substrate, a step of forming an insulating barrier film on the entire surface so as to cover the surface of the front groove, and a step of interposing the insulating barrier film inside the groove. Embedding and forming a conductive paste as a plug body, filling a gap in the conductive paste with a conductive substance, and retreating the back surface of the substrate to expose the insulating barrier film. Removing the exposed insulating barrier film to expose the paste. 9. The method according to claim 8, wherein the step of filling gaps in the conductive paste with a conductive material comprises a step of applying a liquid conductive material on the conductive paste. A method for manufacturing a multichip semiconductor device.