JPH11354560A - Method for manufacturing semiconductor device - Google Patents

Abstract

(57) Abstract: Provided is a method for manufacturing a semiconductor device for manufacturing a semiconductor device in which wiring is miniaturized and miniaturized for high-density mounting, and which is reliably connected to an external device. SOLUTION: An underlayer 15 having photosensitivity and low elasticity over the entire main surface of a semiconductor wafer 1 having a plurality of chip regions.
Is formed, and is exposed and developed by scattered light to open the electrode 3, and an insulating layer 20 having a tapered cross section at an end is formed. Next, a metal thin film layer 21 is formed on the entire main surface of the semiconductor wafer 1 having the insulating layer 20 by a sputtering method, a resist pattern 22 for plating is formed, and the main surface of the semiconductor wafer 1 and the insulating layer 20 are formed. A pad 30, a wiring pattern 31, and a land 32 are simultaneously formed by electrolytic plating, and the plating resist pattern 22 is removed. Next, an insulating coat 40 is formed by opening the land 32, the bump 50 is placed on the land 32, and the scribe line 6 is formed.
The semiconductor wafer 1 is cut along the
Get 0.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device having a semiconductor element such as a transistor, and more particularly to a method of manufacturing a semiconductor device which enables miniaturization of wiring for connecting to an external device. It is about.

[0002]

2. Description of the Related Art In recent years, as electronic devices have become smaller and more sophisticated, semiconductor devices have been required to be smaller, denser and faster. For this reason, for example, LOC (lead-on-chip) or SON (small outline non-lead) is used as a memory package.
ΜBG using TAB tape
A (Micro ball grid array)
No. 6-504408).

Hereinafter, a conventional semiconductor device called μBGA and a method of manufacturing the same will be described with reference to FIG. FIG. 3 is a cross-sectional view showing a conventional semiconductor device called μBGA. In FIG. 3, reference numeral 101 denotes a semiconductor chip having a built-in semiconductor element such as a transistor; 102, a wiring circuit sheet provided on the semiconductor chip 101;
3 is a flexible low elastic modulus material interposed between the semiconductor chip 101 and the wiring circuit sheet 102; 104 is a partial lead of the wiring circuit sheet 102; 105 is an electrode of the semiconductor chip 101;
And an external electrode for connecting the semiconductor device to an external device. As shown in FIG. 3, a semiconductor device called μBGA has a structure in which a wiring circuit sheet 102 is bonded on a semiconductor chip 101 via a low elastic modulus material 103, and an electrode 105 of the semiconductor chip 101 and a wiring circuit sheet 102 and the external electrode 106
Are electrically connected to each other.

Next, a method of manufacturing a conventional semiconductor device called μBGA will be described with reference to FIG. First, the external electrode 106 and the external electrode 106 are formed on the semiconductor chip 101.
A wiring circuit sheet 102 having a partial lead 104 extending from the substrate is placed via a low elastic modulus material 103.
Next, by a conventional thermocompression bonding technique or ultrasonic bonding technique usually used when electrically connecting in a “TAB” (tape automated bonding) operation,
The partial lead 104 and the electrode 105 are electrically connected.
By the above method, a semiconductor device called μBGA has been manufactured.

[0005]

However, according to the above-described conventional method for manufacturing a semiconductor device, after a semiconductor wafer is divided into individual semiconductor chips 101 in advance, a wiring circuit sheet 102 is provided for each semiconductor chip 101.
Is mounted and the partial lead 104 and the electrode 105 are electrically connected, thereby increasing the number of manufacturing steps. In addition, since it is necessary to prepare the wiring circuit sheet 102 in advance, the number of manufacturing steps is increased from this point, and the manufacturing cost is also increased.

The wiring circuit sheet 102 is expensive, and a high-performance mounter (mounting equipment) is required to mount the wiring circuit sheet 102 on the semiconductor chip 101. We could not escape the increase.

The electrode 105 and the wiring circuit sheet 102
In the case of connecting to the partial lead 104 extending from the wiring, especially in the case of fine wiring, the width and thickness of the partial lead 104 become small and the shape becomes unstable, so the partial lead 1
There is a disadvantage that the connection between the electrode 04 and the electrode 105 becomes difficult.

The present invention has been made in view of the above-mentioned conventional problems, and has as its object to provide a method of manufacturing a semiconductor device which enables miniaturization of wiring for connecting to an external device without providing a wiring circuit sheet 102. I do.

[0009]

In order to achieve the above object, a first method of manufacturing a semiconductor device according to the present invention is to separate a semiconductor wafer having a plurality of chip regions each having an electrode on a main surface. A semiconductor device manufacturing method for manufacturing a plurality of semiconductor devices each having one chip region by forming a base layer made of an insulating material on a main surface of a semiconductor wafer.
A second step of patterning the underlayer to form an insulating layer having an opening on each electrode, and a third step of forming a metal wiring connected to each electrode and extending from the electrode to the insulating layer. A fourth step of forming a protective film having an opening on a part of the metal wiring on the main surface of the semiconductor wafer; a fifth step of forming a protruding electrode in the opening;
A sixth step of separating the semiconductor wafer on which the protruding electrodes are formed, for each chip region, so that a part of the metal wiring exposed in the opening functions as an external electrode.

According to this method, the external electrodes are opened in the state of the semiconductor wafer to form a protective film, and after the protruding electrodes are formed on the external electrodes, the semiconductor wafer is separated for each chip region. In the second method for manufacturing a semiconductor device according to the present invention, a semiconductor wafer having a plurality of chip regions each having an electrode on a main surface is separated, and each semiconductor device has one chip region. A method of manufacturing a semiconductor device for manufacturing a plurality of semiconductor devices is described by first forming a base layer made of an insulating material on a main surface of a semiconductor wafer.
And a second step of patterning the base layer to form an insulating layer having an opening on each electrode, and connecting to each electrode, extending from the electrode onto the insulating layer, and partially forming an external electrode. A third step of forming a protruding electrode on an external electrode of the metal wiring, and forming a protective film covering the main surface of the semiconductor wafer and the protruding electrode. A fifth step of mechanically or chemically polishing the protective film to expose the tops of the protruding electrodes;
And a seventh step of separating the semiconductor wafer exposing the protruding electrodes for each chip region.

According to this method, a protective film is formed so as to completely cover the protruding electrodes in the state of the semiconductor wafer, the protective film is polished so that the protruding electrodes are exposed, and the semiconductor wafer is separated into chip regions. I do. Therefore, since no gap is formed between the protruding electrode and the protective film, a highly reliable semiconductor device can be efficiently manufactured by separating the semiconductor device from the semiconductor wafer.

[0012] In the first or second method for manufacturing a semiconductor device, it is preferable that in the first step, an insulating material made of an elastic material is used as a material of the underlayer.

According to this method, even when a stress is applied when the semiconductor device is mounted on an external device, the insulating layer made of an elastic material absorbs the stress, so that a highly reliable semiconductor device can be manufactured. .

In the first or second method for manufacturing a semiconductor device, the first step may be to form an underlayer by applying an insulating material on the main surface of the semiconductor wafer a plurality of times.

According to this method, since the thickness of the insulating layer can be increased and formed stably, a metal wiring can be stably formed on the insulating layer.

In the first or second method for manufacturing a semiconductor device, the first step is a method of manufacturing a semiconductor wafer by using one of a curtain coating method, a printing method, a spin coating method, and a roller coating method. An underlayer can be formed over the surface.

According to this method, an insulating layer having a large and stable film thickness can be reliably formed.

In the first or second method for fabricating a semiconductor device, the second step comprises forming a photosensitive resist film on the underlayer, exposing the photosensitive resist film to light, and developing the photosensitive resist film. An etching resist pattern is formed in a region other than the region, and an opening is formed by melting a base layer in a region where the etching resist pattern is not formed by etching a main surface of the semiconductor wafer. It may be removed.

According to this method, using a well-known photographic method,
An opening can be reliably formed in the underlayer.

In the first or second method for manufacturing a semiconductor device, in the second step, an opening may be formed by irradiating a base layer on the electrode with a laser.

According to this method, since the underlayer is processed by using a laser, an opening having a stable cross-sectional shape can be reliably formed in the underlayer.

In the first or second method for fabricating a semiconductor device, the second step is to form a resist pattern in a region other than the electrodes on the underlayer and to subject the main surface of the semiconductor wafer to plasma processing or By performing any of sandblasting, the opening may be formed by removing the base layer in a region where the resist pattern is not formed, and the resist pattern may be removed.

According to this method, since the underlayer is processed by plasma processing or sandblasting, an opening can be reliably formed in the underlayer.

In the first or second method for fabricating a semiconductor device, the second step includes forming an opening and exposing a main surface of the semiconductor wafer including a virtual line indicating a position where the semiconductor wafer is separated. Is preferred.

According to this method, the semiconductor wafer can be separated for each chip region without coming into contact with the insulating layer. Therefore, peeling and cracking at the end of the insulating layer can be prevented, and a highly reliable semiconductor device can be manufactured. Can be.

In the first or second method for manufacturing a semiconductor device, the second step may further include a step of mechanically or chemically polishing the upper surface of the insulating layer.

According to this method, since the metal wiring is formed on the insulating layer having improved flatness, the shape and thickness of the metal wiring are stabilized, and the adhesion strength to the insulating layer is improved. Therefore, a semiconductor device with further miniaturized wiring and further improved reliability can be manufactured.

In the first or second method for manufacturing a semiconductor device, the second step further includes a step of polishing an upper edge of the opening to incline an inner wall surface of the opening with respect to a main surface of the semiconductor wafer. Can be prepared.

According to this method, the metal wiring can be formed stably on the inclined inner wall surface in the opening of the insulating layer.

In the first or second method for manufacturing a semiconductor device, the second step is to form a groove having a tapered cross-sectional shape in the underlayer by mechanical processing and to etch the underlayer having the groove. The method may further include a step.

According to this method, the underlying layer having the tapered groove can be etched to form an insulating layer having a tapered cross-sectional shape in the vicinity of the opening, so that the metal wiring can be stably formed in the opening. Can be.

In the first or second method for manufacturing a semiconductor device, the second step is to heat-treat the insulating layer.
The method may further include a step of plastically deforming the insulating layer such that the width of the upper portion is wider than the width of the lower portion in the opening.

According to this method, the insulating layer in the vicinity of the opening can be plastically deformed by heat to form an insulating layer having a tapered cross-sectional shape, so that a metal wiring can be formed stably in the opening.

In the first or second method for manufacturing a semiconductor device, the second step is to place a print mask on the main surface of the semiconductor wafer on which the insulating layer having the opening is formed, and to mount the print mask on the main surface. The method may further include a step of applying an insulating material on at least the insulating layer by performing printing.

According to this method, an insulating material can be formed in a region on the insulating layer and a region beyond the outer edge of the insulating layer by using a printing mask from above the insulating layer. Therefore,
Since an opening having a tapered cross-sectional shape is formed, a metal wiring can be formed stably in the opening.

In the first or second method for fabricating a semiconductor device, the first step uses an insulating material having photosensitivity as a material for the underlayer, and the second step uses a photoconductive underlayer for the underlayer. The opening is preferably formed by exposing and developing.

According to this method, the opening is formed by exposing and developing the photosensitive base layer itself, and the opening can be formed with a small number of steps and with high dimensional accuracy.

In a method for manufacturing a semiconductor device using a photosensitive base layer, the second step is to expose the photosensitive base layer using scattered light, thereby forming a sectional shape of the insulating layer near the opening. May be tapered.

According to this method, since the photosensitive underlayer itself is exposed to scattered light, an opening having a tapered cross-sectional shape can be formed with a small number of steps, and a metal wiring is formed stably in the opening. be able to.

In the method of manufacturing a semiconductor device using a photosensitive underlayer, the second step includes exposing the main surface of the semiconductor wafer to an irradiation angle other than a right angle by using parallel light, so that the vicinity of the opening is formed. May be tapered.

According to this method, the semiconductor wafer is irradiated at an irradiation angle other than a right angle using parallel light to expose the underlying layer having photosensitivity. Therefore, the semiconductor wafer has a tapered cross-sectional shape with small man-hours and high dimensional accuracy. An opening can be formed, and a metal wiring can be formed stably in the opening.

In the method of manufacturing a semiconductor device using a photosensitive underlayer, the second step includes irradiating the main surface of the semiconductor wafer with parallel light and scattered light, and irradiating the irradiated light with the main surface of the semiconductor wafer. By exposing the photosensitive underlayer with light reflected by the substrate, the cross-sectional shape of the insulating layer near the opening may be tapered.

According to this method, the underlying layer itself having photosensitivity is exposed to light using halation using parallel light and scattered light, so that the opening having a tapered cross-sectional shape with less man-hours and with higher dimensional accuracy. And the metal wiring can be formed stably in the opening.

In the method of manufacturing a semiconductor device using a photosensitive underlayer, a second step is to form a photosensitive underlayer on a main surface of a semiconductor wafer having an opening, expose, and develop. Forming an opening on the electrode again.

According to this method, the underlayer provided again on the opening formed first has a small film thickness and a tapered cross-sectional shape. An opening having a cross-sectional shape is formed. Therefore, the metal wiring can be formed stably in the opening.

[0046]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a perspective view schematically showing a semiconductor device manufactured by a method for manufacturing a semiconductor device according to the present invention, with a part of an insulating coat being opened. In FIG. 1, reference numeral 10 denotes a semiconductor chip, reference numeral 20 denotes an insulating layer having a tapered cross section at the end and a low elastic modulus, reference numeral 30 denotes a pad provided on an electrode (not shown) of the semiconductor chip, and reference numeral 31 denotes a pad. Pad 30 to insulating layer 20
A wiring pattern provided to extend upward, 32 is a land provided on the insulating layer 20 and connected to the pad 30 via the wiring pattern 31, 40 is an insulating coat made of, for example, a solder resist, and 50 is provided on the land 32 For example, a bump made of a metal ball. The pad 30, the wiring pattern 31, and the land 32 together form a metal wiring 33.

Here, the feature of the semiconductor device manufactured by the manufacturing method according to the present embodiment is that the wiring pattern 31 and the land 32 have an insulating layer having a tapered cross section at the end and a low elastic modulus. 20. As a result, the wiring pattern 31
At the end of the insulating layer 20 having a tapered cross section, the insulating layer 20 is formed to have a small and stable width and thickness. Further, when a stress such as a thermal stress is applied to the semiconductor device after the semiconductor device is mounted on an external device such as a printed circuit board, the insulating layer 2 having a low elastic modulus is used.
0 absorbs the stress applied to the bump 40 provided on the land 32. This improves the reliability of the semiconductor device.

Hereinafter, a method of manufacturing the semiconductor device shown in FIG. 1 will be described with reference to FIGS.

First, as shown in FIG. 2A, a photosensitive insulating film is formed on the semiconductor wafer 1 in which the electrodes 3 are exposed from the passivation film 2 on the main surface of the semiconductor wafer 1 so as to cover the entire main surface. The material is applied and dried to form the underlayer 15. The photosensitive insulating material may be a polymer having a low elastic modulus and an insulating property, such as, for example, polyimide and epoxy each having photosensitivity. Here, as a method of applying the photosensitive insulating material on the main surface of the semiconductor wafer 1, for example, a curtain coating method, a printing method using a screen, a spin coating method, a roller coating method, or the like can be used. Further, in order to realize a predetermined film thickness, the number of times of application is not limited to one, but may be plural.

Next, as shown in FIG. 2B, exposure and development are sequentially performed on the formed underlayer 15 to form an insulating layer having at least the electrode 3 opened on the main surface of the semiconductor wafer 1. 20 is formed. In this case, the cross-sectional shape of the insulating layer 20 at the opening is formed not in a direction perpendicular to the main surface of the semiconductor wafer 1 but in a tapered shape, for example, by using scattered light in exposure. Here, the term “tapered” refers to a shape in which the thickness of the insulating layer 20 in the vicinity of the opening becomes smaller as the insulating layer 20 comes closer to the portion where the semiconductor wafer 1 comes into contact with the semiconductor wafer 1. Not only the case where the cross-sectional shape of the insulating layer 20 in the vicinity of the opening is completely wedge-shaped, but also a part or the whole may be arc-shaped.

Here, as shown in FIG. 2B, when the insulating layer 20 is formed, it is preferable that a region where the virtual scribe line 60 is provided on the semiconductor wafer 1 is previously exposed. . Thus, when dicing, the semiconductor wafer 1 is cut without contacting the insulating layer 20. Therefore, peeling, cracking, and the like in the insulating layer 20 can be prevented, so that entry of moisture, impurities, and the like below the insulating layer 20 can be suppressed, so that a highly reliable semiconductor device can be manufactured.

Next, as shown in FIG.
0 on the entire main surface of the semiconductor wafer 1 on which
The metal thin film layer 21 is formed by an electroless plating method, a vacuum evaporation method, a sputtering method, or a CVD method. here,
The metal thin film layer 21 is formed by sequentially depositing Ti and Cu using a sputtering method.

Next, as shown in FIG. 2D, a photosensitive resist is applied over the entire main surface of the semiconductor wafer 1 on which the metal thin film layer 21 is formed, and the resist other than a predetermined pattern portion is exposed by exposure. After curing, the resist in the pattern portion is removed to form a plating resist pattern 22.

Next, as shown in FIG. 2E, a metal layer having a large thickness of, for example, Cu is formed on the pattern portion exposed from the plating resist pattern 22 by using electrolytic plating. The resist is melted and removed.
Thereafter, by immersing in an etching solution to dissolve the portion consisting only of the metal thin film layer 21 and to leave the metal layer having a large thickness, the metal wiring comprising the predetermined pad 30, the wiring pattern 31, and the land 32 is formed. 33 are formed simultaneously.

Here, a metal film is deposited over the entire main surface of the semiconductor wafer 1 and a resist is applied thereon.
A metal wiring 33 may be formed at the same time by forming a resist for an etching mask on a predetermined pattern portion using a known photolithography technique and etching the metal layer using this resist as a mask.

Next, as shown in FIG.
After a photosensitive solder resist is applied over the entire main surface of the semiconductor wafer 1 on which the metal wires 0 and the metal wirings 33 are formed, at least the lands 32 are exposed using photolithography technology to form an insulating coat 40. The insulating coat 40 protects the pad 30 and the wiring pattern 31 other than the land 32 from the solder melted in a later step.

Next, as shown in FIG. 2G, electroless Ni is applied to the land 32 exposed from the insulating coat 40.
After plating and electroless Au plating are sequentially performed, a flux is applied. Thereafter, solder balls or solder-plated metal balls are placed on the lands 32 and reflowed. Thereby, the metal ball and the land 32 are melt-bonded, and the bump 50 is formed on the land 32.

Next, as shown in FIG. 2H, the semiconductor wafer 1 is divided into individual semiconductor chips 10 by dicing or scribing along scribe lines 60 virtually provided on the semiconductor wafer 1. I do. Through the above steps, the semiconductor device shown in FIG. 1 can be manufactured.

As described above, according to the present invention, instead of the wiring circuit sheet 102 in the conventional semiconductor device shown in FIG. 3, a tapered cross-sectional shape provided at the end provided on the semiconductor wafer 1 is provided. A wiring pattern 31 and a land 32 are formed on the insulating layer 20 having the wiring pattern 31 and the land 32. As a result, the wiring pattern 31 is formed so as to have a small and stable width and thickness at the end of the insulating layer 20, so that the wiring can be miniaturized. Can be manufactured. Further, since the wiring circuit sheet and the mounter are not used, material costs, manufacturing costs, and equipment costs can be reduced.

Further, by using the insulating layer 20 having a low modulus of elasticity, when a stress is applied to the semiconductor device after mounting, the stress applied to the bump 40 which is a connection portion to a printed board or the like is reduced. The insulating layer 20 absorbs. Thereby, a highly reliable semiconductor device can be manufactured.

In the above description, a photosensitive insulating material is applied. However, the present invention is not limited to this, and an insulating material having low elasticity and photosensitivity formed in a film shape in advance may be used. Is also good. In this case, a film-shaped insulating material having low elasticity and photosensitivity is bonded onto the main surface of the semiconductor wafer 1 and then exposed and developed to expose the electrode 3.

As a method for forming the insulating layer 20 by opening the electrode 3, instead of exposing and developing the photosensitive underlayer 15, the photosensitive layer formed on the semiconductor wafer 1 is formed. An etching mask may be formed by a photographic method on a base layer which is not used, and thereafter, etching may be performed. In this case, the underlying layer is melted by etching,
Can be formed to form the insulating layer 20.

After an opening is formed in the non-photosensitive base layer by etching with an etching mask and isotropic etching, the base layer may be polished from above. In this case, the opening formed by isotropic etching in the non-photosensitive base layer has a larger diameter in the middle part than in the top part and the bottom part. Therefore, by polishing the underlayer from the upper surface by an appropriate polishing amount, an underlayer having a tapered cross-sectional shape can be formed.

Further, by subjecting the underlayer having no photosensitivity to laser processing, the electrode 3 is opened to open the insulating layer 2.
0 can be formed.

The insulating layer 20 can be formed by opening the electrode 3 by forming a mask on the non-photosensitive base layer and removing the mask after performing plasma processing or sand blast processing.

After the opening is formed in the underlayer 15,
A print mask may be placed on the upper surface of the insulating layer having the opening, and an insulating material may be further applied onto the insulating layer through the print mask. In this case, for example, an insulating material is formed over the upper surface of the insulating layer using a metal mask or over a region including the upper surface of the insulating layer using a mesh screen. Then, by appropriately selecting the viscosity and curing conditions of the insulating material, a new layer made of an insulating material having a tapered cross-sectional shape is formed beyond the outer edge of the insulating layer 20.
The insulating layer 20 having a tapered cross-sectional shape can be formed.
According to this method, since the print mask does not contact the upper surface of the semiconductor wafer 1, there is no possibility that the semiconductor elements provided on the semiconductor wafer 1 are damaged, and the insulating layer 20 can be formed stably.

After the formation of the insulating layer 20, the upper surface of the insulating layer 20 may be polished mechanically or chemically. Thereby, the flatness of the upper surface of the insulating layer 20 is increased, so that the shape and thickness of the wiring pattern 31 and the land 32 formed on the upper surface are further stabilized, and the adhesion strength to the insulating layer 20 is improved. Therefore, a semiconductor device with further miniaturized wiring and further improved reliability can be manufactured.

In order to make the cross-sectional shape at the end of the insulating layer 20 tapered, parallel light may be used instead of scattered light as exposure light. In this case, the angle of incidence on the semiconductor wafer 1 is set to an angle other than a right angle, and the insulating layer 2
The insulating layer 20 having a tapered cross-sectional shape can be formed by changing the incident direction according to the outer edge of the plane 0.

Further, in order to make the cross-sectional shape at the end of the insulating layer 20 tapered, parallel light may be used as exposure light in addition to scattered light. In this case, it is preferable to make the exposure light for the semiconductor wafer 1 stronger. As a result, a phenomenon in which light reflected by the surface of the semiconductor wafer 1 exposes the photosensitive insulating material, that is, halation occurs. Therefore, by using halation, the insulating layer 20 having a tapered cross-sectional shape can be formed with small man-hours and high dimensional accuracy.

After exposing and developing the underlying layer 15 in order to expose the electrodes 3, a new photosensitive insulating material is applied onto the main surface of the semiconductor wafer 1, exposed and developed. The electrode 3 may be exposed again. In this case, the film thickness of the base layer formed by applying the photosensitive insulating material again on the electrode 3 is smaller than the film thickness in other regions. Therefore, by performing or repeating the above steps under appropriate conditions, the insulating layer 20 having a tapered cross-sectional shape at the portion where the electrode 3 is opened can be formed.

After the opening is formed by etching the insulating material, for example, by rotating a disk-shaped blade having a tapered cross section at the peripheral edge, only the upper edge of the opening is polished. The insulating layer 20 having a tapered cross section may be formed.

Further, for example, by rotating a disk-shaped blade having a tapered cross-sectional shape at the peripheral edge, a groove having a tapered cross-sectional shape having an upper portion wider than a lower portion is mechanically formed in advance in the insulating material. Alternatively, the insulating layer 20 can be etched. Thereby, an insulating layer 20 having a tapered cross-sectional shape can be formed at a portion where the electrode 3 is opened.

After forming an opening in the insulating material on the electrode 3, a heat treatment for curing the insulating layer 20 is performed.
By controlling the temperature profile at that time, the insulating layer 2 having a tapered cross section at the opening is formed.
0 can be formed. In this case, a tapered cross section can be formed by plastically deforming the vicinity of the opening of the insulating layer 20 by heat.

Further, the land 32 is opened and the insulating coat 4 is formed.
After the bumps 50 are placed on the lands 32 after the formation of the bumps 50, the insulating coat 40 is replaced by placing the bumps 50 on the lands 32 and completely covering the main surface of the semiconductor wafer 1 and the bumps 50. May be formed, and the upper surface of the insulating coat 40 may be mechanically or chemically polished to expose the bumps 50. Thereby, the bump 50 and the insulating coat 4
Since no gap is formed between the insulating coat 40 and water, impurities and the like can be suppressed from entering the lower side of the insulating coat 40.
Therefore, corrosion and the like of the metal wiring 33 can be prevented.
A highly reliable semiconductor device can be manufactured.

[0075]

According to the present invention, a wiring pattern and a land are formed on an insulating layer provided on a semiconductor wafer and having a tapered cross section at an end portion. Separate each. This allows
The wiring pattern is formed so as to have a small and stable width and thickness at the end of the insulating layer. Therefore,
A semiconductor device in which wiring for connecting to an external device is miniaturized can be efficiently manufactured by separating a semiconductor wafer into chip regions.

Also, by covering the main surface of the semiconductor wafer and the bumps with the insulating coat and then polishing the insulating coat to expose the bumps, no gap is formed between the bumps and the insulating coat. And the like can be prevented, and a highly reliable semiconductor device can be manufactured.

Further, by using an insulating layer having a low elastic modulus, when a stress is applied to the semiconductor device after mounting, the insulating layer can apply the stress applied to the bump which is a connecting portion to a printed circuit board or the like. Because of absorption, a highly reliable semiconductor device can be manufactured.

[Brief description of the drawings]

FIG. 1 is a perspective view schematically showing a semiconductor device manufactured by a manufacturing method according to the present invention, with a part of an insulating coat being opened.

FIGS. 2A to 2H are cross-sectional views illustrating respective steps of a method for manufacturing a semiconductor device according to the present invention.

FIG. 3 is a cross-sectional view showing a conventional semiconductor device called μBGA.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Semiconductor wafer 2 Passivation film 3 Electrode 10 Semiconductor chip 15 Underlayer 20 Insulating layer 21 Metal thin film layer 22 Plating resist pattern 30 Pad 31 Wiring pattern 32 Land (external electrode) 33 Metal wiring 40 Insulating coat (protection film) 50 Bump ( Protruding electrode) 60 Scribe line (virtual line)

 ──────────────────────────────────────────────────の Continuing on the front page (72) Inventor Takahiro Kumakawa 1-1, Komachi, Takatsuki-shi, Osaka Matsushita Electronics Corporation

Claims (19)

[Claims] 1. A method of manufacturing a semiconductor device, comprising: separating a semiconductor wafer having a plurality of chip regions each having an electrode on a main surface thereof to manufacture a plurality of semiconductor devices each having one chip region; A first step of forming a base layer made of an insulating material on the main surface of the semiconductor wafer; and a second step of patterning the base layer to form an insulating layer having an opening on each of the electrodes. A third step of forming a metal wiring connected to the electrode and extending from the electrode onto the insulating layer; and a protective film having an opening on a main surface of the semiconductor wafer and on a part of the metal wiring. A fourth step of forming a protruding electrode in the opening; and a sixth step of separating the semiconductor wafer on which the protruding electrode is formed for each chip region. Exposed in the opening The method of manufacturing a semiconductor device, characterized in that to function part of the metal wiring and the external electrode. 2. A method of manufacturing a semiconductor device, comprising: separating a semiconductor wafer having a plurality of chip regions each having an electrode on a main surface to manufacture a plurality of semiconductor devices each having one chip region; A first step of forming a base layer made of an insulating material on the main surface of the semiconductor wafer; and a second step of patterning the base layer to form an insulating layer having an opening on each of the electrodes. A third step of forming a metal wiring connected to the electrode and extending from the electrode onto the insulating layer, a part of which becomes an external electrode; and a protruding electrode on the external electrode of the metal wiring A fifth step of forming a protective film covering the main surface of the semiconductor wafer and the protruding electrode; and mechanically or chemically polishing the protective film to form the protruding shape. Sixth process to expose the top of the electrode And a seventh step of separating the semiconductor wafer exposing the protruding electrodes for each chip region. 3. The method of manufacturing a semiconductor device according to claim 1, wherein the first step uses an insulating material made of an elastic material as a material of the base layer. Semiconductor device manufacturing method. 4. The method of manufacturing a semiconductor device according to claim 1, wherein the first step includes applying the insulating material a plurality of times on a main surface of the semiconductor wafer. Forming the underlayer by the method described below. 5. The method of manufacturing a semiconductor device according to claim 1, wherein the first step is performed by any one of a curtain coating method, a printing method, a spin coating method, and a roller coating method. A method for manufacturing a semiconductor device, comprising: forming the underlayer on a main surface of the semiconductor wafer by using one of the methods. 6. The method of manufacturing a semiconductor device according to claim 1, wherein in the second step, a photosensitive resist film is formed on the underlayer, and By exposing and developing the film, an etching resist pattern is formed in a region other than on the electrode, and by etching a main surface of the semiconductor wafer, the etching resist pattern is formed below the region where the etching resist pattern is not formed. A method of manufacturing a semiconductor device, comprising: forming an opening by melting a formation layer; and removing the etching resist pattern. 7. The method for manufacturing a semiconductor device according to claim 1, wherein in the second step, the opening is formed by irradiating the underlayer on the electrode with a laser. Forming a portion. 8. The method for manufacturing a semiconductor device according to claim 1, wherein in the second step, a resist pattern is formed on a region other than the electrode on the base layer. And performing either plasma processing or sandblasting on the main surface of the semiconductor wafer to remove the base layer in a region where the resist pattern is not formed, thereby forming the opening, and forming the resist pattern. A method for manufacturing a semiconductor device, comprising: 9. The method of manufacturing a semiconductor device according to claim 1, wherein in the second step, the opening is formed, and a virtual position indicating a position at which the semiconductor wafer is separated is formed. A method for manufacturing a semiconductor device, comprising: exposing a main surface of a semiconductor wafer including a line. 10. The method of manufacturing a semiconductor device according to claim 1, wherein the second step further includes a step of mechanically or chemically polishing an upper surface of the insulating layer. A method for manufacturing a semiconductor device. 11. The method of manufacturing a semiconductor device according to claim 1, wherein in the second step, an upper edge of the opening is polished to remove an inner wall surface of the opening. A method for manufacturing a semiconductor device, further comprising a step of inclining with respect to a main surface of a semiconductor wafer. 12. The method of manufacturing a semiconductor device according to claim 1, wherein in the second step, a groove having a tapered cross-sectional shape is formed in the underlying layer by mechanical processing. And a step of etching the base layer having the groove. 13. The method of manufacturing a semiconductor device according to claim 1, wherein in the second step, a heat treatment is performed on the insulating layer so that an upper portion of the opening has a lower width. Further comprising the step of plastically deforming the insulating layer so as to be wider than the width of the semiconductor device. 14. The method of manufacturing a semiconductor device according to claim 1, wherein the second step is a main surface of the semiconductor wafer on which the insulating layer having the opening is formed. A method for manufacturing a semiconductor device, further comprising a step of mounting a printing mask thereon and performing printing using the printing mask to apply the insulating material on at least the insulating layer. 15. The method of manufacturing a semiconductor device according to claim 1, wherein the first step uses a photosensitive insulating material as a material of the base layer, and further comprises: The method according to claim 2, wherein the opening is formed by exposing and developing the photosensitive underlayer. 16. The method of manufacturing a semiconductor device according to claim 15, wherein in the second step, the insulating layer in the vicinity of the opening is exposed by exposing the underlayer having photosensitivity using scattered light. A method of manufacturing a semiconductor device, wherein a sectional shape of the semiconductor device is tapered. 17. The method of manufacturing a semiconductor device according to claim 15, wherein the second step is performed by exposing the main surface of the semiconductor wafer to an irradiation angle other than a right angle using parallel light. A cross-sectional shape of the insulating layer in the vicinity of the portion is tapered. 18. The method of manufacturing a semiconductor device according to claim 15, wherein the second step irradiates the main surface of the semiconductor wafer using parallel light and scattered light, and irradiates the irradiated light with the semiconductor wafer. A method of manufacturing a semiconductor device, comprising: exposing the underlayer having photosensitivity to light reflected by a main surface to taper a cross-sectional shape of the insulating layer in the vicinity of the opening. 19. The method of manufacturing a semiconductor device according to claim 15, wherein in the second step, the photosensitive underlayer is formed on a main surface of the semiconductor wafer having the opening and exposed. And a step of developing an opening again on the electrode to develop the semiconductor device.