JPH11354751A - Semiconductor device, method of manufacturing semiconductor device, and semiconductor manufacturing apparatus - Google Patents

Abstract

PROBLEM TO BE SOLVED: To improve the surface morphology of a semiconductor device, by making at least either one of an upper electrode film and a lower electrode film contain ruthenium or ruthenium oxide and a specific number of crystal grains per unit area. SOLUTION: An Ru film 8 is integrally formed with initial nuclei continuously from the nuclei. After an SOG film is applied to the whole surface, the SOG film and Ru film 8 on an interlayer insulating film 53 are removed and the Ru film of the lower electrode of a capacitor is left by removing the SOG film left in a contact hole. Then the Ru film 11 of an upper electrode is obtained by depositing a BST film 10 on the whole area of a substrate and forming the initial nucleus of Ru similarly to the Ru film 8 of the lower electrode, and then, depositing an Ru film 11 and working the Ru film 11. At the time of forming the Ru films of the lower and upper electrodes, the initial nuclei are formed before growing the Ru films so as to eliminate the growth of island-like crystals. The density of the initial nuclei per 1 cm<2> in the initial stage of growth is 1×10<14> on the interlayer insulating film 5, 1×10<12> on a W film 7, and 1×10<14> on the BST film 10.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, a method for manufacturing a semiconductor device, and a semiconductor manufacturing apparatus, and more particularly to a Ru (ruthenium) thin film or RuO film.
₂ ) A semiconductor device using a (ruthenium oxide) thin film as a capacitor electrode, a method of manufacturing the same, and a semiconductor manufacturing apparatus used for the manufacture thereof.

[0002]

2. Description of the Related Art Dynamic Random Access Memory (Dynamic Random Access Memory)
In recent years, with the diversification of uses and the enhancement of the functions of devices used, semiconductor integrated circuits represented by MEM (hereinafter abbreviated as DRAM) have been increasingly integrated and miniaturized. Along with this, design rules used in device manufacturing have been required to rapidly reduce their minimum dimensions. However, for example, there is a limitation that the capacity of a capacitor used in a DRAM cell cannot be so small in terms of sensitivity, soft error and the like. For this purpose, a three-dimensional element structure of the semiconductor element is used to secure a larger effective area in the same unit area.For example, the capacitor insulating film is made to be an extremely thin film, or a high dielectric thin film is used for the capacitor insulating film. There is an increasing demand for securing more capacitor capacity with the same effective area by using the same.

[0003] Among them, the method using high dielectric thin film capacitor insulating film, Ba _x Sr as the high dielectric thin film
_{A method using a 1-x} TiO ₃ (0 <x <1, barium strontium titanium oxide; hereinafter abbreviated as BST) film or the like is known. However, when these oxide dielectrics are used as the high dielectric thin film, oxygen, which is a constituent element of the high dielectric thin film, and metal in the electrode film are formed at the interface between the high dielectric thin film and the electrodes formed on both sides thereof. It is known that an insulating metal oxide film is formed as a compound with an element, and the resistance in the capacitor portion becomes extremely high. In order to prevent such a metal oxide film from being formed, it is necessary to use a material that is not oxidized or a material that maintains metal conductivity even when oxidized. From such a demand, recently, it has been studied to use Ru which exhibits metal conductivity even when oxidized as an electrode material of a high dielectric thin film capacitor.

A conventional method for forming a capacitor using Ru as an electrode and BST as an insulating film will be described below with reference to FIG. STI (Shal) is formed on a P-type silicon substrate 1.
After forming the element isolation region 2 by low trench isolation, a gate insulating film 31 and a gate electrode (word line) 32 of the transistor are formed and processed. Next, an n ⁺ source diffusion layer 4A and an n ⁺ drain diffusion layer 4B are respectively formed, and an interlayer insulating film 51 is further deposited and planarized. Then, a first contact hole is opened and the bit line 6 is buried. I do. After that, an interlayer insulating film 52 is further deposited and flattened again. Then, a second contact hole is opened, and a W (tungsten) film 7 is formed on the entire surface to be buried and flattened. Is removed (FIG. 11A).

Next, after an interlayer insulating film 53 is deposited and flattened, a third contact hole is formed on the W (FIG. 11B). Next, the Ru film 8 is made of biscyclopentadienyl ruthenium (Ru (C ₅ H ₅ ) ₂ , Ru (C
_{p) 2} also referred to as a) and oxygen _{(O 2)} CVD using a gas
(Chemical Vapor Deposition
n) and then SOG (Spin On Gla).
ss) film 9 is applied to the entire surface, and the CMP (Chemical
The SOG film 9 and the Ru film 8 on the interlayer insulating film 53 are removed by a Mechanical Polishing method (FIG. 11C). Further, the SOG film 9 is entirely removed by a sufficiently diluted HF (hydrogen fluoride) aqueous solution or HF vapor, and a BST film 10 is deposited by a CVD method. Furthermore, R
The u film 11 is deposited by a CVD method and processed as an upper electrode (FIG. 11D).

In a capacitor used for a DRAM cell, it is necessary to use a high dielectric constant BST film or the like and to have a sufficient capacitor effective area in order to secure a sufficient capacitor capacity. Therefore, it is effective to form a capacitor three-dimensionally as described above. For this purpose, it is necessary to form an electrode and a BST film isotropically in the contact hole by using the CVD method as described above. is there.

In the formation of the Ru film by the CVD method as described above, biscyclopentadienyl ruthenium is used as a Ru film material, and oxygen gas is further introduced into the film forming atmosphere, so that the Ru film is formed at a low temperature of about 200 ° C. It was found that a film was formed.

When a Ru film is formed by a CVD method, 300
If the temperature is higher than ℃, the supply is controlled.
(50 ° C. or less) is a reaction rate-determining process, which has been revealed by experiments by the present inventors. Therefore, when Ru is formed at a low temperature of about 200 ° C., the reaction is a rate-determining process,
A Ru film with good step coverage can be obtained.

[0009]

However, the above-mentioned prior art has the following problems.

That is, as a result of detailed examination of the film quality of the formed Ru film, the Ru film formed on the silicon oxide film (SiO ₂ film) becomes a uniform and flat film, while the Ru film formed on the W film And B
It was found that the Ru film formed on the ST film did not become a flat film but was formed in an island shape.

It has also been found that even when a film is formed on a silicon oxide film, the surface morphology may deteriorate depending on the growth conditions. As a result of a detailed study of this phenomenon by the present inventors, the case where the density of growth nuclei formed on the surface in the early stage of growth of the Ru film (hereinafter referred to as initial nucleus density) is 4 × 10 ¹⁰ nuclei / cm ² or less. Was found to have poor surface morphology. In addition, the cross section of the portion having such poor surface morphology is as shown in FIG. 12, and it was found that the dimensions of the crystal grains were not uniform, the surface had many irregularities, and the surface morphology was poor.

FIG. 13 shows an example of a cross-sectional photograph of only the Ru film 8 in a portion having poor surface morphology.

As a result of a detailed study by the present inventors, W
Also when deposited on the film and the BST film, it was found that the initial nucleus density was as low as about 4 × 10 ¹⁰ nuclei / cm ² or less.

From the above study, it has been found that it is necessary to increase the initial nuclear density in order to suppress these island-like growth and poor surface morphology.

The cross section of the Ru lower electrode and the Ru upper electrode of the capacitor prepared by the above-mentioned prior art has a shape as shown in FIG. 12 for the above-described reason. However, such Ru island crystal 8B and poor surface morphology are obtained. It has been found that a Ru film having a defect easily causes an increase in leakage current. In particular, biscyclopentadienyl ruthenium, bismethylcyclopentadienyl ruthenium (Ru (CH ₃ C ₅ H)
₄ ) ₂ , Ru (MeCp) ₂ ), or bisethylcyclopentadienyl ruthenium (Ru (C ₂
H ₅ C ₅ H ₄ ) ₂ and Ru (EtCp) _2.
Hexagonal or triangular island growth in which the c-axis, which is the main axis of the Ru single crystal, is parallel to the substrate surface is likely to occur with CVD using Ru. Turned out to be quite different. This phenomenon was presumed to be the cause of the formation of the island-shaped crystals and the poor surface morphology, and as a result, it was presumed to be the cause of a Ru film having irregular crystal grains as shown in FIGS.

According to the present invention, R
It is an object of the present invention to provide a method of forming a thin film, a method of forming a capacitor, and a thin film forming apparatus used for the same, which can suppress island-like growth of u or ruthenium oxide and improve surface morphology.

[0017]

In order to solve the above problems, in a semiconductor device according to the present invention, a lower electrode film formed on a semiconductor substrate, an insulating thin film formed on the lower electrode film, An upper electrode film formed on the insulating thin film, wherein at least one of the upper electrode film and the lower electrode film contains ruthenium or ruthenium oxide,
Further, it is characterized by having 1 × 10 ¹² or more crystal grains per 1 cm ² .

Further, in the method of manufacturing a semiconductor device according to the present invention, a step of forming a lower electrode film on a semiconductor substrate;
Forming an insulating thin film on the lower electrode film, and forming an upper electrode film on the insulating thin film, wherein at least one of the lower electrode film or the upper electrode film contains ruthenium or ruthenium oxide Forming at least one of the step of forming the lower electrode film and the step of forming the upper electrode film at a first process temperature to form an initial nucleus of the electrode film; Forming an electrode film at a high second process temperature.

Further, in the semiconductor manufacturing apparatus according to the present invention, a substrate mounting portion which is formed flat so that a semiconductor substrate can be mounted thereon and has three or more through holes is provided, and a semiconductor mounting device is provided independently of the substrate mounting portion. And an inert gas supply port formed so as to be movable, capable of projecting a tip from the through hole, and capable of ejecting an inert gas from the tip.

[0020]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS (First Embodiment) A first embodiment of the present invention (hereinafter abbreviated as first embodiment) will be described in detail with reference to the drawings.

FIGS. 1 and 2 are sectional views of a semiconductor manufacturing process using a Ru thin film as a capacitor insulating film according to the first embodiment of the present invention.

After an element isolation region 2 having an STI structure is formed on a p-type silicon substrate 1, a gate insulating film 31 is formed by thermal oxidation of the p-type silicon substrate 1, and polysilicon, tungsten (W) Are stacked to form a gate electrode 32. Subsequently, after processing the gate insulating film 31 and the gate electrode 32 into desired shapes, the n ⁺ source diffusion layer 4A and the n ⁺ drain diffusion layer 4B are formed by arsenic ion implantation, thereby completing the MOS transistor portion. After that, the SiO
_{After two} films are deposited by CVD to form an interlayer insulating film 51 and flattened, a first contact hole reaching the n ⁺ source diffusion layer 4A is opened, and polysilicon is deposited by CVD and processed to form a bit line. 6 is formed. After that, an interlayer insulating film 52 of a silicon oxide film is further deposited by CVD and flattened, and then a second contact hole is formed on the n ⁺ drain diffusion layer 4B (FIG. 1A). Next, similarly, after a W film is deposited on the entire surface by the CVD method, the W film on the interlayer insulating film 52 is removed by the etch back method or the CMP method, and the W plug 7 is buried only in the second contact hole ( FIG. 1 (b). Next, after an interlayer insulating film 53 made of a silicon oxide film is further deposited on the interlayer insulating film 52 and planarized, a second insulating film 53 is further placed on the W plug 7 embedded in the second contact hole. Three contact holes are opened (FIG. 1C).

Thereafter, the processed silicon substrate 1 is housed in a CVD apparatus, and the substrate temperature is set to 150 ° C. (1 ° C.).
The temperature in the apparatus is set to an Ar gas atmosphere at a pressure of 10 Torr (can be set in a range from 1 Torr to 100 Torr). Thereafter, biscyclopentadienyl ruthenium using oxygen as a carrier and oxygen (oxygen concentration in the atmosphere is 40% or less, preferably 3% or less)
(0%) to form Ru initial nuclei 8A (FIG. 1 (d)).

Here, it is desirable to form as many Ru initial nuclei 8A as possible on the surface on which the Ru film is to be formed. Further, it is desirable that this initial nucleus growth be performed while suppressing the growth of each nucleus itself as much as possible. For this reason, it is desirable to increase the pressure in the apparatus to increase the probability of nucleation and to suppress the growth of nuclei by suppressing the substrate temperature.

Next, in the same CVD apparatus, the atmosphere of the p-type silicon substrate 1 after the above processing is set to a substrate temperature of 240 ° C. (can be set between 200 ° C. and 450 ° C.).
At a pressure higher than that at the time of initial nucleation and a pressure of 1 Torr (0.0
The pressure is set lower than that at the time of initial nucleation as a pressure between 1 Torr and 10 Torr), and biscyclopentadienyl ruthenium and oxygen (oxygen concentration in the atmosphere is 40% or less, preferably 30%) in the chamber are used as Ar gas. Then, a Ru film 8 having a desired film thickness is deposited on the entire surface (FIG. 2A). Ru film 8 thus formed
Is formed by growing on the initial nucleus 8A, and thus is integrally formed continuously on the initial nucleus 8A. Thereafter, after applying the SOG film 9 over the entire surface, the SOG film 9 and the Ru film 8 on the interlayer insulating film 53 are removed by the CMP method, and the SOG film 9 remaining in the contact hole is removed by HF vapor to obtain a desired SOG film 9. Ru film 8 as capacitor lower electrode only in part
(FIG. 2B).

Next, a BST film 10 is deposited on the entire surface of the substrate by the CVD method. Thereafter, in the same manner as the method of forming the lower electrode Ru film 8, the Ru film 11 is deposited by CVD in such a manner that a desired film thickness is obtained after initial nucleation of Ru is performed. Further, the Ru film 11 is processed into a desired shape to obtain a Ru film 11 as an upper electrode (FIG. 2C).

When the Ru film as the lower electrode and the upper electrode is formed as described above, the initial nuclei are formed before the growth of the Ru film.
A Ru film with good surface morphology was obtained. As a result, a capacitor having good characteristics could be realized. In the Ru film formed according to the first embodiment of the present invention, the initial nucleus density per 1 cm ² is 1 × 10 ¹⁴ on the interlayer insulating film 5 and 1 × 10 on the W film 7 in the initial stage of the growth. 10 ¹² and 1 × 10 ¹⁴ on the BST film 10, both of which are 4 × 10 ¹⁰ in the prior art.
The density was significantly higher than that of individual pieces.

Further, it was found that the film formation after the initial nucleus formation was carried out by the crystal growth of Ru in the vertical direction from the surface corresponding to the initial nucleus almost at 1: 1.

FIG. 3 shows a cross-sectional photograph of the Ru film 8 formed according to the present embodiment. It can be seen that the crystal grains are smaller and the growth directions of the crystal grains are uniform, as compared with the cross-sectional photograph of the conventional surface morphology defective portion shown in FIG. In addition, it turns out that the surface morphology is also good.

It has been confirmed that the capacitor manufactured by using the above-described first embodiment has a significantly reduced leak current as compared with the capacitor manufactured by using the conventional method.

(Second Embodiment) Next, a second embodiment of the present invention will be described in detail with reference to the drawings.

FIGS. 4 and 5 are sectional views of a semiconductor manufacturing process using a Ru thin film as a capacitor insulating film according to a second embodiment of the present invention.

In the second embodiment, the steps shown in FIGS. 4A to 4D are performed except that the silicon nitride film 54 is formed immediately after the formation of the interlayer insulating film 52. 1 (a) to 1 (d) are the same as the corresponding steps of the first embodiment, and the description of the same parts will be omitted. The silicon nitride film 54
It is formed on the interlayer insulating film 52 by the CVD method, and is processed simultaneously with and in the same manner as the interlayer insulating film 52.

Next, a Ru film 8 is formed as in the first embodiment. Here, in the present embodiment, unlike the first embodiment, the Ru film 8 is formed thick so as to completely fill the third contact hole. (FIG. 5 (a)). Next, CM
Ru on the interlayer insulating film 53 is removed by the P method, and the Ru film 8 is embedded only in the third contact hole. (FIG. 5
(B)).

Subsequently, the interlayer insulating film 53 is completely removed by wet etching using a dilute HF (hydrofluoric acid) aqueous solution or reactive ion etching, thereby forming a columnar R film.
The u film 8 is formed to be a lower electrode (FIG. 5C).

Subsequently, a BST film 10 is deposited on the entire surface of the substrate by the CVD method. After that, the initial nucleation of Ru is performed in the same manner as the method of forming the lower electrode Ru film 8, and then the Ru film 11 is deposited by a CVD method so that a desired film thickness is obtained. Further, this Ru film 11 is processed into a desired shape to obtain a Ru film 11 as an upper electrode (FIG. 5D).

According to the method of manufacturing a semiconductor device according to the second embodiment of the present invention described above, in addition to the effects described in the first embodiment, by forming the capacitor forming portion in a convex shape. , BST inside small contact hole
It is not necessary to form a film or a Ru film, and it is possible to prevent the occurrence of a portion having poor film quality at the bottom end of the contact hole or the like and the occurrence of so-called “seam”.

(Third Embodiment) Next, a third embodiment of the present invention will be described with reference to FIGS.

FIGS. 6 and 7 are sectional views of a semiconductor manufacturing process using a Ru thin film as a capacitor insulating film according to a third embodiment of the present invention. 6A to 6C correspond to FIG. 1 of the above-described first embodiment.
This is the same as the description from (a) to FIG. 1 (c), and the description is omitted. In the third embodiment, the ruthenium oxide initial nucleus 12A is formed instead of the Ru initial nucleus 8A in the first embodiment under the same conditions as the first embodiment (FIG. 6D). .

Further, a ruthenium oxide film 12 is formed instead of the Ru film 8 in the first embodiment (FIG. 7).
(A)).

Further, a ruthenium oxide film 13 is formed as an upper electrode instead of the Ru film 11 in the first embodiment (FIG. 7C).

In order to form ruthenium oxide in this manner, the oxygen concentration may be set to 40% or more under the forming conditions of the first and second embodiments.

According to the third embodiment of the present invention described above,
Ruthenium oxide can also be formed as the capacitor electrode. In this case, the ruthenium oxide film is formed after the initial nucleation as in the case of the Ru film described in the first embodiment. It was confirmed that the effect was obtained.

Since ruthenium oxide is a conductive oxide like Ru, the semiconductor device manufactured according to the present embodiment exhibited good capacitor characteristics with little leakage current.

In the above-described first to third embodiments of the present invention, oxygen is used as an atmosphere gas when forming the Ru films 8 to Ru film 11 or the ruthenium oxide films 12 to ruthenium oxide film 13. Even if ozone (O ₃ ) or oxygen radicals are used, the present invention can be implemented more favorably. That is, ozone and oxygen radicals are more active chemical species than oxygen, and can decompose biscyclopentadienyl ruthenium, which is a Ru film-forming raw material, at a lower temperature than when oxygen is used. Thereby, it is possible to form the Ru thin film more uniformly at a lower temperature than in the above-described embodiment. The introduction of ozone may be performed, for example, by connecting an ozonizer to a CVD device, and the introduction of oxygen radicals may be performed by, for example, providing a chamber connected to a CVD device, and exciting oxygen by microwave discharge there. Ozone may be generated and then introduced into a CVD apparatus.

In the first to third embodiments of the present invention, the pressure at the time of initial nucleation is set higher than that at the time of film growth. By making the concentration higher than that, the initial nuclear density can be increased, and a good capacitor can be formed. Here, as a method of increasing the concentration of the Ru source gas in the atmosphere, there are a method of increasing the flow rate of the carrier gas, a method of decreasing the pressure in the Ru source container, and a method of increasing the temperature of the Ru source container.

Further, in the above-described first to third embodiments of the present invention, the case where the BST film is used as the capacitor insulating film has been described. However, the present invention is not limited to this.
PZT (Pb (Zr, Ti) O ₃ : lead zirconate titanate), STO (SrTiO ₃ : titanium strontium oxide), BTO (BaTiO ₃ : barium titanium oxide), Ta ₂ O ₅ (tantalum oxide), SBT (SrB)
i ₂ Ta ₂ O ₉ : strontium bismuth tantalate)
In the same manner, it is possible to carry out the method well.

Further, in each of the above embodiments, an example was described in which biscyclopentadienyl ruthenium was used as the Ru film-forming material, but bismethylcyclopentadienyl ruthenium or bisethylcyclopentadienyl ruthenium was used. You may.

When bismethylcyclopentadienyl ruthenium or bisethylcyclopentadienyl ruthenium is used, its melting point is lower than when biscyclopentadienyl ruthenium is used. Because it can supply source gas,
It is easy to control the supply amount of Ru source gas, and a relatively high Ru partial pressure can be realized with high accuracy.

(Fourth Embodiment) Next, a fourth embodiment of the present invention will be described with reference to the drawings.

FIG. 8 is a conceptual diagram of a substrate mounting portion of a batch type CVD apparatus (thin film forming apparatus) according to a fourth embodiment of the present invention. FIG. 8A is a diagram illustrating a substrate mounting portion when a silicon substrate is mounted, and FIG. 8B is a diagram illustrating the substrate mounting portion when a BST film is formed on a silicon substrate. is there.

As shown in FIG. 8, the substrate mounting portion of the batch type CVD apparatus comprises a susceptor 20 made of quartz and an inert gas introduction pipe 21 also made of quartz.

The susceptor 20 is designed for a batch type vertical CVD apparatus, and includes a vertical shaft portion 20C,
The silicon substrate mounting portion 20A is formed horizontally and at equal intervals from the shaft portion. The silicon substrate mounting portion 20A is formed in a disk shape slightly larger than the size of the silicon substrate 100 on which the silicon substrate 100 is mounted, and three or more portions of the silicon substrate mounting portion 20A on which the silicon substrate 100 is mounted are provided. Are formed.

On the other hand, the inert gas introduction pipe 21 is a vertical type like the susceptor 20, and the quartz tube
1C and an inert gas supply pipe portion 21A formed horizontally and equidistantly from the shaft portion and having a closed end. Further, the inert gas supply pipe portion 21A is
Inert gas supply ports 21B are formed so as to protrude corresponding to the holes formed in the silicon substrate mounting portion 20A of the susceptor 20, respectively.

As shown in FIG. 8A, the silicon substrate 1
In the setting of 00, the inert gas introduction pipes 21 are respectively inserted into the holes of the silicon substrate mounting portion 20A of the susceptor 20.
The inert gas supply port 21B protruding from the susceptor 20 is inserted thereinto, and the inert gas supply pipe portion 21A of the inert gas introduction pipe 21 and the silicon substrate mounting portion 20A of the susceptor 20 are brought into close proximity to each other. The inert gas supply port 21B of the introduction pipe 21 has a shape protruding from the hole of the silicon substrate mounting portion 20A.

For this reason, as shown in FIG. 8A, the silicon substrate 100 can be easily formed with the tip of the inert gas supply port 21B projecting from the hole of the silicon substrate mounting portion 20A of the susceptor 20 as a support point. Can be stably mounted.

Next, the inert gas introduction pipe 21 is connected to the susceptor 2.
By lowering the position relative to 0, FIG.
As shown in (b), the silicon substrate 100 is
0 can be brought into close contact with the silicon substrate mounting portion 20A. Further, at the time of film formation, Ar gas is supplied to the inert gas introduction pipe 21.
By flowing an inert gas such as Ar, Ar or the like can flow out from the upper end of the inert gas supply port. With such a configuration, Ar or the like from the upper end of the inert gas supply port can flow to the back surface of the silicon substrate, thereby effectively preventing the formation of a film such as Ru on the back surface of the silicon substrate. Note that Ar used here is used as an atmosphere gas during RuCVD, and does not adversely affect the growth of the CVD film even if it flows out into the CVD atmosphere.

By adopting the above configuration, there is no film formation of Ru or the like on the back surface of the silicon substrate. This eliminates the need for etching, polishing, and the like on the back surface of the silicon substrate, and can reduce processing time and processing cost.

(Fifth Embodiment) Next, a fifth embodiment of the present invention will be described with reference to FIG.

FIG. 9 is a conceptual diagram when a silicon substrate 100 is mounted on a substrate mounting portion of a single-wafer CVD apparatus (thin film forming apparatus) according to a fifth embodiment of the present invention.

As shown in FIG. 9, the substrate mounting portion of the single-wafer CVD apparatus is composed of a resistance heater 22 and a lifter 23 substantially corresponding to the size of the silicon substrate 100.

The resistance heater 22 has three or more through-holes, and its surface is coated with an inert substance such as silicon carbide. A cylindrical lifter pin 24 made of quartz and opened up and down corresponding to the position of the hole of the resistance heater is fixed to the lifter 23, and an inert gas tube is provided below the lifter pin 24. 25 are connected. A lift 26 is connected to the lifter pins, and can be moved up and down by a lift mechanism (not shown).

By adopting such a configuration, the lifter 23 is raised when the silicon substrate is mounted and is brought close to the resistance heater 22 so that the lifter pins 24
Can protrude above the resistance heater 22. Thus, the silicon substrate 100 can be easily and stably installed with the tip of the lifter pin 24 as a support point.

Next, the lifter 23 is connected to the resistance heater 2.
2 to lower the silicon substrate 100
Can be brought into close contact with the resistance heater 22. Further, at the time of film formation, an inert gas such as Ar is passed through the inert gas tube 25 so that A
r and the like can be discharged. With such a configuration, Ar or the like from the upper end of the inert gas supply port can flow to the back surface of the silicon substrate 100, and the formation of a film such as Ru can be effectively prevented. In addition, A used here
An inert gas such as r is used as an atmosphere gas during RuCVD, and does not adversely affect CVD growth even if it flows out into the CVD atmosphere.

By adopting the above configuration, film formation of Ru or the like on the back surface of the silicon substrate 100 is eliminated. This allows
Etching, polishing, and the like of the back surface of the silicon substrate 100 are not required, and processing time and processing cost can be reduced.

In the case of forming a Ru film, in the heating method using infrared light radiation, the infrared absorption coefficient differs depending on the type of film formed on the substrate. Therefore, it is very difficult to control the temperature for forming a uniform Ru film or ruthenium oxide film over the entire surface. In the present embodiment, the substrate is heated in a chamber structure incorporating a resistance heater, so that the entire silicon substrate 100 can be uniformly heated.

(Sixth Embodiment) Next, a sixth embodiment of the present invention will be described with reference to FIG.

FIG. 10 is a block diagram of a thin film forming apparatus (semiconductor manufacturing apparatus) having a plurality of Ru initial nucleus growth chambers.

When Ru or ruthenium oxide is formed by CVD using initial nucleation, the initial nucleation and film formation may be performed continuously in the same CVD chamber. However, when a resistance heater is used as a heating source, since the heat capacity of the heater is large, it takes time to change the temperature at the time of initial nucleation and the temperature at the time of film formation each time, and the throughput is poor. Also, at the time of initial nucleation, it is more convenient to increase the initial nucleus density by increasing the treatment time as low as possible at a low temperature, and it is desirable to take a longer initial nucleation time than during film formation.

The CVD apparatus according to the sixth embodiment of the present invention is provided with two initial nucleation chambers 60 and 61 for one film forming chamber 64 as shown in FIG. Further, a vacuum transfer chamber 62 for transferring the silicon substrate between the respective chambers and a load lock chamber 63 for taking the silicon substrate in and out without breaking the vacuum in each of the above chambers are provided.

The above-mentioned initial nucleation chamber 60,
The 61 and the film forming chamber 64 are a single wafer type CVD chamber.

The initial nucleation chambers 60, 6
The use of a cluster-type single-wafer CVD apparatus composed of a chamber 1 and a film forming chamber 64 makes it possible to transfer a silicon substrate while keeping the heater temperature in each chamber constant. Can be prevented, and the throughput can be improved. In addition, since the number of the initial nucleation chambers is larger than the number of the film formation chambers, the initial nucleation time can be increased, and the initial nucleus density can be increased.
Further, a better Ru film or ruthenium oxide film can be obtained. In this embodiment, the case where two initial nucleation chambers 60 and 61 are provided for one film formation chamber 64 has been described. However, from the spirit of the present invention, it is necessary to have more initial nucleation chambers. It is needless to say that there is a case where is preferable, and such a case does not depart from the present invention.

[0073]

As described above, according to the present invention, a Ru thin film and a ruthenium oxide thin film having good morphology without island growth can be obtained. In addition, a capacitor having uniform characteristics can be obtained.

Further, according to the present invention, a Ru or ruthenium oxide CVD apparatus having a sufficient initial nucleation time and high throughput can be obtained.

[Brief description of the drawings]

FIG. 1 is a process cross-sectional view of a first half of a semiconductor manufacturing process using a Ru thin film as a capacitor insulating film according to a first embodiment of the present invention.

FIG. 2 is a sectional view of a second half of a semiconductor manufacturing process using a Ru thin film as a capacitor insulating film according to the first embodiment of the present invention.

FIG. 3 is a cross-sectional SEM photograph of a Ru thin film formed by a semiconductor manufacturing process according to the first embodiment of the present invention.

FIG. 4 is a sectional view of a first half of a semiconductor manufacturing process using a Ru thin film as a capacitor insulating film according to a second embodiment of the present invention.

FIG. 5 is a process cross-sectional view of a first half of a semiconductor manufacturing process using a Ru thin film as a capacitor insulating film according to a second embodiment of the present invention.

FIG. 6 is a process cross-sectional view of a semiconductor manufacturing process using a Ru thin film as a capacitor insulating film according to a third embodiment of the present invention.

FIG. 7 is a process sectional view of a semiconductor manufacturing process using a Ru thin film as a capacitor insulating film according to a third embodiment of the present invention.

FIG. 8 shows a batch type CV according to a fourth embodiment of the present invention.
It is a conceptual diagram of the substrate mounting part of D apparatus (thin-film formation apparatus).

FIG. 9 shows a single-wafer CVD according to a fifth embodiment of the present invention.
It is a conceptual diagram when a silicon substrate is mounted on the substrate mounting part of the apparatus (thin film forming apparatus).

FIG. 10 is a block diagram of a thin film forming apparatus (semiconductor manufacturing apparatus) having a plurality of Ru initial nucleus growth chambers.

FIG. 11 is a process cross-sectional view of a conventional semiconductor manufacturing process using a Ru thin film as a capacitor insulating film.

FIG. 12 is a schematic cross-sectional view of a Ru lower electrode and a Ru upper electrode of a capacitor manufactured in a semiconductor manufacturing process using a conventional Ru thin film as a capacitor insulating film.

FIG. 13 is a cross-sectional SEM photograph of only a Ru layer of a portion having poor surface morphology created in a semiconductor manufacturing process using a conventional Ru thin film as a capacitor insulating film.

[Explanation of symbols]

Reference Signs List 1 P-type silicon substrate 2 Element isolation region 31 Gate oxide film 32 Gate electrode 4 An ⁺ source diffusion layer 4 Bn ⁺ drain diffusion layer 6 Bit line 7 W film 8 Ru film 8 A Ru initial nucleus 9 SOG film 10 BST film 11 Ru film DESCRIPTION OF SYMBOLS 12 Ruthenium oxide film 12A Ruthenium oxide initial nucleus 13 Ruthenium oxide film 20 Susceptor 21 Inert gas introduction pipe 22 Resistance heater 23 Lifter 24 Lifter pin 25 Inert gas tube 26 Elevator 51, 52, 53 Interlayer insulating film 54 Silicon nitride film Reference Signs List 60 initial nucleation chamber 1 61 initial nucleation chamber 2 62 transfer chamber 63 load lock chamber 64 deposition chamber 100 silicon substrate

Claims (3)

[Claims] A lower electrode film formed on a semiconductor substrate;
An insulating thin film formed on the lower electrode film, and an upper electrode film formed on the insulating thin film, at least one of the upper electrode film or the lower electrode film contains ruthenium or ruthenium oxide, And 1 per cm ²
A semiconductor device having crystal grains of × 10 ¹² or more. 2. The method according to claim 1, further comprising: forming a lower electrode film on the semiconductor substrate; forming an insulating thin film on the lower electrode film; and forming an upper electrode film on the insulating thin film. At least one of the lower electrode film and the upper electrode film contains ruthenium or ruthenium oxide, and at least one of the step of forming the lower electrode film and the step of forming the upper electrode film is performed at an initial temperature of the electrode film at a first process temperature. A method for manufacturing a semiconductor device, comprising: a first step of forming a nucleus; and a second step of forming an electrode film at a second process temperature higher than the first process temperature. 3. The semiconductor device is formed flat so that a semiconductor substrate can be placed thereon,
A substrate mounting portion having three or more through-holes opened, and movable independently of the substrate mounting portion, a tip end protruding from the through-hole, and an inert gas ejected from the tip end. A semiconductor manufacturing apparatus comprising an inert gas supply port formed so as to be capable of being provided.