JPH1138465A - Power source circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a power source circuit capable of suppressing current consumption as little as possible, even if a low-voltage battery is incorporated. SOLUTION: The power source circuit is provided with a boosting means 1 for boosting the voltage of a power supply battery, a control means 2 which can be operated by the voltage boosted by the boosting means 1 and control the operation of an equipment and a first switching means 3, a second switching means 4... and an n-th switching means 5 which are connected to the boosting means 1 and the control means 2 and instruct the equipment to execute operation. Then, the boosting means 1 inhibits a boosting operation until operational instructions by the switching means 3-5 are given.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a power supply circuit, and more particularly, to a power supply circuit operable at a low voltage. Power supply circuit.

[0002]

2. Description of the Related Art In recent years, portable electronic devices have made remarkable progress.
For example, in a camera, the operation speed and performance of an arithmetic unit are remarkably increased by increasing the number of elements of an auto focus, increasing the number of elements of a photometric circuit, and increasing the number of various sensors. On the other hand, the miniaturization of equipment is further progressing.

[0003] Under such circumstances, it is desired that a power source such as a battery mounted on the device be smaller, and a lower voltage battery must be used. Accordingly, various power supply circuits that can operate with a low-voltage power supply have been proposed. For example, using a power supply of a 3V dry battery, the power supply voltage is boosted, and then supplied to an arithmetic device or the like, thereby increasing the speed of the arithmetic device.
Also, technical means for ensuring miniaturization have been proposed.

[0004] In addition, using a 1.5V dry cell power supply,
Technical means that boosts the second boosting means to a voltage higher than the operable voltage by the boosting means and operates the control means with the voltage obtained by the second boosting means. It is disclosed in Japanese Unexamined Patent Publication No. 5-281600.

[0005]

However, the technical means proposed in the above-mentioned Japanese Patent Application Laid-Open No. 5-281600 needs to keep operating the control means as long as the battery is loaded in the camera. The first booster will continue to operate. That is, as long as a battery is loaded in the camera, a predetermined current is consumed at all times, and a problem occurs in that the degree of consumption of the battery is remarkable.

The present invention has been made in view of the above problems, and has as its object to provide a power supply circuit capable of minimizing current consumption even when a low-voltage battery is mounted.

[0007]

In order to achieve the above object, a first power supply circuit of the present invention is operable with a booster for boosting a voltage of a power supply battery and a boosted voltage by the booster, First control means for controlling the operation of the device, connected to the boosting means and the first control means,
Switch means for giving an operation instruction to the device, wherein the boosting means inhibits the boosting operation until an operation instruction is given by the switch means.

In order to achieve the above object, a second aspect of the present invention is provided.
The power supply circuit of the boosting means for boosting the voltage of the power supply battery,
It can be operated by the boosted voltage by the boosting means,
First control means for controlling the operation of the equipment, second control means operable with the voltage of the power supply battery, and switch means connected to the second control means for giving an operation instruction to the equipment. The boosting means inhibits the boosting operation until an operation instruction from the switch means is given through the second control means.

In order to achieve the above object, a third aspect of the present invention is provided.
Is a device having a control unit that operates by increasing the voltage of a power supply battery, wherein the boosting operation is started when a switch provided on the device is operated.

[0010]

Embodiments of the present invention will be described below with reference to the drawings.

First, a schematic configuration of a first embodiment of the present invention will be described with reference to FIG. FIG. 1 is a block diagram illustrating a schematic configuration of a power supply circuit according to a first embodiment of the present invention.

As shown in FIG. 1, the power supply circuit according to the first embodiment includes a boosting means 1 for boosting a power supply voltage of a low-voltage battery 6 (see FIG. 2) which is a power supply voltage of a device employing the power supply circuit. A control means 2 operating at a voltage higher than the power supply voltage of the low-voltage battery 6, and at least one or more switch means (first switch means 3, second switch means 4 ... The main part is constituted by the n switch means 5).

Hereinafter, the power supply circuit of the first embodiment configured as described above will be described in more detail.

FIG. 2 is an electric circuit block diagram for explaining the configuration of the first embodiment shown in FIG. 1 in more detail.

The boosting means 1 is connected to a low-voltage (1.5 V in this embodiment) power supply battery 6 which can be mounted on a device having the power supply circuit. 1.5 V) to a predetermined DC voltage (approximately 3 V in the present embodiment), which includes a booster circuit oscillating unit 11, a booster coil 12, a backflow prevention diode 13, a smoothing capacitor 14, a booster transistor 1
5. The main part is constituted by the booster circuit voltage detector 16.

The boosting means 1 is basically constituted by a so-called chopper type boosting circuit, and a boosting circuit voltage detecting section 16
Constantly monitors the boosted voltage Vcc2 of the boosting means 1, and the booster circuit oscillating section 11
While the boosted voltage is managed by the control signal (DC / DCsig1IN) from the CPU, the booster transistor 15 is driven by a predetermined alternating voltage under the control of the control signal (DC / DCsig2IN) from the CPU 17 described later. The output of the step-up transistor 15 driven alternately in this manner is smoothed by the smoothing capacitor 14, whereby a predetermined DC voltage (about 3 V in this embodiment) is obtained and supplied as a power supply voltage to each subsequent circuit. You.

In the first embodiment, the step-up circuit oscillating section 11 includes the switch means (first switch means 3, second switch means 4,..., N-th switch means 5).
The operation is also controlled by
Details will be described later.

The control means 2 includes the step-up circuit oscillating section 1
1 and the like, and includes a CPU 17 that controls each circuit of the device and a reset IC 18 that performs reset control of the CPU 17. The reset IC 18 detects the boosted voltage Vcc2 of the booster 1 and, based on the boosted voltage Vcc2, sends a reset signal (RSTsig) to the CPU 17.
IN) to control the reset operation.

When controlling the booster circuit oscillating section 11, the CPU 17 outputs signals from the switch means (first switch means 3, second switch means 4,..., N-th switch means 5) and outputs from the reset IC 18. This is performed based on the signal. The details will be described later.

The CPU 17 and the reset IC
Reference numeral 18 denotes a predetermined voltage (about 2 to about 2) which does not operate at the low voltage (1.5 V) of the power supply
3V).

The first switch means 3 is composed of a series circuit comprising a normally open switch 19 and a backflow preventing diode 21. The second switch means 4
Is composed of a series circuit including a normally open switch 20 and a backflow prevention diode 22. Similarly,
The n-th switch means 5 has the same configuration as the first switch means 3 or the second switch means 4.

The first switch means 3, the second switch means 4,..., The n-th switch means 5, for example, when the device employing the power supply circuit is a silver halide film camera,
This corresponds to various switches capable of executing an interrupt process for the CPU 17, such as a film rewinding switch, a back cover switch, a power switch, and a release switch.

The first switch means 3, the second switch means 4,..., The n-th switch means 5 have the anodes of the backflow preventing diodes 21, 22,. For example, the on / off operation of the normally open switch 19 corresponding to the release switch controls the operation of the booster circuit oscillating unit 11.

Further, the anodes of the backflow preventing diodes 21, 22... Of the first switch means 3, the second switch means 4.
The signals from these switch means are connected to SW
1sigIN, SW2sigIN... Are input.

Next, the boosting operation of the first embodiment having such a configuration will be described with reference to a timing chart shown in FIG.

FIG. 3 is a timing chart showing the operation of each part relating to the boosting operation in the power supply circuit according to the first embodiment. Hereinafter, each timing will be described.

In FIG. 3, time t0 indicates a state in which the power supply battery 6 is not loaded in the device, that is, an initial state in which all the circuits of the device are stopped.

In this state, when the power supply battery 6 is loaded into the device (time ta), a voltage of 1.5 V is applied to both ends of the booster 1. It should be noted that the booster 1 does not operate only when the power supply battery 6 is loaded, so that the CPU 1
7 and other circuits remain stopped.

Next, when one of the first switch means 3, the second switch means 4... N-th switch means 5 is turned on (time tb), the signals at this time (SWsig1IN, SWsig2IN...). )
The booster 1 starts operating. As a result, the boosted voltage Vcc2 of the booster 1 starts to increase.

When the boosted voltage Vcc2 of the boosting means 1 rises, first, the reset IC 18 becomes an operable voltage, and a reset signal (RSTsig) is sent to the CPU 17.
IN) (time tc). This is a so-called CPU reset state.

Thereafter, the reset IC 18 and the CPU 17
When the output of the reset signal (RSTsigIN) is completed (time td), that is, when the CPU reset is released, the CPU 17 becomes operable and initializes the internal registers.

During this time, the booster circuit oscillating section 11 continues to operate, but when the boosted voltage Vcc2 of the booster 1 reaches a predetermined voltage (3 V) (time te), the booster circuit voltage detector 16 sets the booster circuit detecting section 16 to A control signal (DC / DCs
ig1IN), and controls the boosted voltage from the boosting means 1 until the control signals (SWsig1IN, SWsig2IN...) from the switching means are turned off (time tf).

At time tf, when all of the first switching means 3, the second switching means 4,..., The n-th switching means 5 are turned off, the boosting operation of the boosting means 1 is stopped by the control signal (SWsigIN) at this time. . This allows
Voltage Vcc2 starts to drop.

Here, the section from time te to tf is C
This is a section in which various operations are controlled by the control of the PU 17, for example, in the case of a camera, pressing a shutter button, pressing a forced rewind button, and the like. Also, in this section,
As described above, the operation and stop signal (DC / DCsi) is supplied from the booster circuit voltage detector 16 to the booster circuit oscillating unit 11.
g1IN) is output, and the boosted voltage of the boosting means 1 is maintained at a constant voltage (3 V). Further, at the moment of time tf,
The above various operations are stopped by the control of the CPU 17.

Thereafter, when the voltage Vcc2 falls, a reset signal (RS) is sent from the reset IC 18 to the CPU 17.
TsigIN) is output (time tg), and the CPU 17 is reset.

Further, the voltage Vcc2 falls to reset I
When the inoperable voltage of C18 is reached (time th), all circuits are stopped. Thereafter, the voltage Vcc2 reaches the power supply voltage (1.5 V) of the power supply battery 6 (time ti), and this state is maintained until the power supply battery 6 is removed from the device (time tj).

In the first embodiment, the boosting means 1 is constituted by a chopper type boosting circuit. However, the present invention is not limited to this. The boosting operation according to the present embodiment can be realized by any other boosting method. Needless to say, this is acceptable.

In the first embodiment, the boosting operation of the boosting means 1 is started by turning on the first switching means 3, the second switching means 4... The step-up operation is stopped by the OFF operation. However, the present invention is not limited to this. For example, the switch means is a so-called push type switch, a latch circuit for holding is provided between the switch means and the boost means 1, and the boost operation is started by turning on the push switch. Alternatively, the boost operation may be stopped by turning on again, or the boost operation may be stopped by a signal from the CPU 17.

Further, the step-up operation of the step-up means 1 has been started by any one of the first switch means 3, the second switch means 4... Needless to say, the boosting operation may be started only by one switch.

As described above, according to the power supply circuit of the first embodiment, even if the power supply battery 6 is loaded in the device, the boosting operation of the booster 1 is not started only in this loaded state, and the first switch Since the step-up operation is started when any one of the means 3, the second switch means 4,..., The n-th switch means 5 is operated, there is an effect that the power battery 6 is not wasted.

That is, when a low-voltage power supply such as a 1.5 V dry battery is used, the speed of the arithmetic unit is reduced and the size of the arithmetic unit is reduced. , And can be operated with minimum current consumption.

Next, a second embodiment of the present invention will be described.

First, a schematic configuration of the second embodiment of the present invention will be described with reference to FIG. FIG. 4 is a block diagram showing a schematic configuration of a power supply circuit according to the second embodiment of the present invention.

As shown in the figure, the power supply circuit of the second embodiment comprises a booster 41 for boosting the power supply voltage of a low-voltage battery 47 (see FIG. 5) which becomes the power supply voltage of a device employing the power supply circuit. A first control means 42 operating at a voltage higher than a power supply voltage of the low-voltage battery, a second control means 43 operable at a power supply voltage of the low-voltage battery, and a second control means 43. A main part is constituted by at least one or more switch means (first switch means 44, second switch means 45... N-th switch means 46 in the figure) which can be operated.

Hereinafter, the power supply circuit thus configured according to the second embodiment will be described in more detail.

FIG. 5 is an electric circuit block diagram illustrating the configuration of the second embodiment shown in FIG. 4 in more detail.

The first embodiment does not require any operation when the booster 1 (see FIG. 1) is not operating even if the power supply battery 6 (see FIG. 2) is loaded. It is an embodiment in the case. On the other hand, in the second embodiment, when the power supply battery 47 (VBAT) is loaded, the time te to te shown in FIG.
Although it is not necessary for the CPU 17 (see FIG. 2) to perform high-speed operation as in the section of tf, even when the power supply voltage is as low as 1.5 V, the CPU 17 (see FIG. This is an embodiment in a case where a low-speed operation such as a need to count the clock, a so-called clock mode state, a standby mode state, or the like is required.

As shown in FIG. 5, the boosting means 41 comprises:
Connected to a low-voltage (1.5 V in the present embodiment) power supply battery 47 incorporated in a device including the power supply circuit,
Means for boosting the DC power supply voltage (1.5 V) of the battery 47 to a predetermined DC voltage (about 3 V in the present embodiment), comprising a booster circuit oscillating section 51, a booster coil 52, and a backflow prevention diode 53 , A smoothing capacitor 54, a boosting transistor 55, and a boosting circuit voltage detecting unit 56.

The booster 41 is basically constituted by a so-called chopper type booster as in the first embodiment, and the booster circuit voltage detector 56 constantly outputs the boosted voltage Vcc2 of the booster 41. The booster circuit oscillating section 51 monitors the control signal (D
While the boosted voltage is managed by C / DCsig1IN), the booster transistor 15 is driven by a predetermined alternating voltage under the control of a control signal from a first CPU 59 and a second CPU 57 described later. The output of the step-up transistor 15 driven alternately in this manner is smoothed by the smoothing capacitor 14, whereby a predetermined DC voltage (about 3 V in this embodiment) is obtained and supplied as a power supply voltage to each subsequent circuit. You.

The first control means 42 includes a first CP which controls the circuits of the device, such as the booster circuit oscillating section 51.
U59 and a first CPU 59 for performing reset control of the first CPU 59.
And a reset IC 60. This first reset I
C60 detects the boosted voltage Vcc2 of the booster 41,
A reset signal (RSTsig1IN) is sent to the first CPU 59 based on the boosted voltage Vcc2 to control the reset operation.

On the other hand, the second control means 43 includes a second CPU 57 for controlling a part of the circuit of the device and the second CPU 57.
Second reset IC 58 that performs reset control of CPU 57
It is composed of The second reset IC 58 detects the power supply voltage of the power supply battery 47, and based on this voltage,
A reset signal (RSTsig2I
N) to control the reset operation.

The second CPU 57 is provided with a first CPU
59, an output signal from the switch means (the first switch means 44, the second switch means 45... N-th switch means 46) and an output signal from the second reset IC 58 Is controlled based on the The details will be described later.

The first CPU 59 and the first reset IC 60 are connected to the low power supply voltage (1.
5V), and is configured by an element that operates at a predetermined voltage (about 2 to 3 V) boosted by the boosting means 41.

On the other hand, the second CPU 57 and the second reset IC 58 provide a low power supply voltage (1.
5 V).

The first switch means 44 is composed of a normally open switch 61, and the second switch means 45 is composed of a normally open switch 62. Similarly, the n-th switch means 46 has the same configuration as the first switch means 44 or the second switch means 45. The first switch means 44, the second switch means 45,..., The n-th switch means 46 are all connected to the control input terminal of the second CPU 57.

The first switch means 44, the second switch means 45,..., The n-th switch means 46 include, for example, a film rewinding switch when a device employing the power supply circuit is a silver halide film camera, In addition to various switches capable of executing interrupt processing for the CPU 17 such as a back cover switch, a power switch, and a release switch, any of switches for executing non-interrupt processing such as a mode setting switch may be used. This is because the second CPU 57 can operate at the voltage of the power supply battery 47,
This is because the operation state of the non-interrupt processing switch can be detected by the PU 57 and the booster circuit oscillating unit 51 can start the boosting operation.

Next, the boosting operation of the second embodiment having such a configuration will be described with reference to a timing chart shown in FIG.

FIG. 6 is a timing chart showing the operation of each unit relating to the boosting operation in the power supply circuit according to the second embodiment. Hereinafter, each timing will be described.

In FIG. 6, time t0 indicates a state in which the power supply battery 47 is not loaded in the device, that is, an initial state in which all the circuits of the device are stopped.

In this state, when the power supply battery 47 is loaded into the device (time tk), the charging of the decoupling capacitor due to the loading of the battery 47 causes the booster 4 to operate.
1. The voltage applied to the second CPU 57 and the second reset IC 58 rises from 0 V toward the power supply voltage 1.5 V of the power supply battery 47.

When the operable voltage of the second reset IC 58 is reached (time t1), the second reset IC 58 sends a reset signal (RSTsig) to the second CPU 57.
2IN) is output. This is a so-called CPU reset state.

Thereafter, the reset signal (RSTsig)
2IN), that is, when the CPU reset is released (time tm), the second C
The PU 57 becomes operable, and performs initialization of the internal register and the like. In the case of a camera, for example, this state is a state in which only minimum operations (clock counting, reading of each switch, etc.) called a clock mode and a standby mode are performed. In this state, the second CPU 57 does not need to operate at a high speed, and a low-speed operation is sufficient.

After the voltage applied to the booster 41 reaches 1.5 V (time tn), when one of the first switch 44, the second switch 45,..., The n-th switch 46 is turned on ( Time tp), the control signal (SWsi
g1IN, SWsig2IN...) are input to the second CPU 57, and the second CPU 57 starts operating the booster circuit oscillating section 51 of the booster 41. As a result, the boosted voltage Vcc2 of the booster 41 starts to increase.

Then, the first reset IC 60 outputs the voltage Vc
When the voltage becomes operable due to the rise of c2 (time t
q), a reset signal (RSTsig1
IN) is output. This is a so-called CPU reset state.

Thereafter, the reset signal (RSTsig)
1IN), that is, when the CPU reset is released (time tr), from this moment, the 1C
The PU 59 becomes operable, and performs initialization of the internal register and the like.

During this time, the booster circuit oscillating section 51 continues to operate, but when the boosted voltage Vcc2 of the booster 41 reaches a predetermined voltage (3 V) (time ts), the booster circuit voltage detecting section 56 causes the booster circuit oscillating section 51 to operate. Control unit (DC / DCs)
ig1IN), and controls the boosted voltage from the boosting means 41 until the control signals (SWsig1IN, SWsig2IN...) from the switching means are turned off (time tu).

At time tu, when all of the first switch means 3, the second switch means 4,..., The n-th switch means 5 are turned off, the control signal (SWsig1IN,
SWsig2IN...) Stops the boosting operation of the booster 41. As a result, the voltage Vcc2 starts to decrease.

Here, the section from time ts to tu is a section in which various operations are controlled by the control of the first CPU 59, for example, in the case of a camera, pressing a shutter button, pressing a forced rewind button, and the like. Also, in this section, the operation and stop signals (DC / DC) from the booster circuit voltage detector 56 to the booster circuit oscillating unit 51 are provided as described above.
sig1IN) is output, and the boosted voltage of the booster 41 is maintained at a constant voltage (3 V). Further, at the moment of time tu, the above various operations are stopped under the control of the first CPU 59.

Thereafter, when the voltage Vcc2 falls, the reset signal (RSTsig1IN) is output from the first reset IC 60 to the first CPU 59 (time tv), and the first CPU 59 is reset.

When the voltage Vcc2 further decreases and reaches the inoperable voltage of the first reset IC 60 (time tw),
All circuits other than the second CPU 57 and the second reset IC 58 are stopped. Thereafter, this state is maintained until the voltage Vcc2 reaches the power supply voltage (1.5 V) of the power supply battery 47 and the power supply battery 47 is removed from the device (time tx).

When the power battery 47 is removed from the device (time tx), the second reset IC 5 is discharged by discharging the decoupling capacitor due to the removal of the battery.
8. The voltage applied to the second CPU 57 drops, but at this time, a reset signal (RSTsig2IN) is output from the second reset IC 58 to the second CPU 57,
57 is reset (time ty).

Thereafter, when the operations of the second CPU 57 and the second reset IC 58 are completed (time tz), all the circuits are stopped.

In the second embodiment, the boosting means 41 is constituted by a chopper type booster circuit. However, the present invention is not limited to this, and the boosting operation according to the present embodiment can be realized by any other boosting method. Needless to say, this is acceptable. In addition, since the second CPU 57 is sufficient even with an inexpensive CPU, the cost does not increase much.

The structure of the boosting means 41 for boosting the voltage from the low-voltage power supply battery 47 is a low-voltage battery, as proposed by the present applicant in Japanese Patent Application No. 8-7753. It may be configured by a first booster circuit that boosts the first voltage, and a second booster circuit that boosts a second voltage higher than the first voltage obtained from the first booster circuit. With this configuration, the minimum drive voltage of the booster circuit can be reduced.

According to the second embodiment, the power supply battery 47
Is loaded, first, the second CPU 57 becomes operable, and the first switch means 44, the second switch means 45,...
Until one of the n-th switch means 46 is operated,
The first CPU 59 does not perform the boosting operation by the booster 41.
Is not performed, the second CPU 57
It is possible to minimize the consumption of the power supply battery 47 while performing the minimum operations such as counting the clock and reading the switches, etc., as described above. It is possible to operate at a low voltage as in the above embodiments. The power supply circuit, when using a 1.5V dry cell power supply, maintains a minimum speed despite the fact that the dry battery is mainly loaded in the camera, while ensuring the high speed and small size of the arithmetic unit. Operation is possible with current consumption.

[Appendix] According to the embodiment of the present invention as described in detail above, the following configuration can be obtained. (1) boosting means for boosting a voltage from a low-voltage battery, control means for operating using a voltage boosted by the boosting means, which is a higher voltage than the low-voltage battery, as a power source, At least one or more switch means connected to both the boosting means and the control means and operable;
A power supply circuit, wherein the booster is controlled by the controller.

(2) The first control which operates by using the boosted voltage by the boosting means for boosting the voltage from the low-voltage battery and the boosting means which is higher than the low-voltage battery as a power supply. And a second control unit that operates from the low voltage of the battery, wherein the boosting unit is controlled by the first control unit and the second control unit.

(3) The structure of the boosting means for boosting the voltage from the low-voltage battery includes a first boosting means for boosting a first voltage, which is a low-voltage battery, and a first boosting means obtained by the first boosting means. A second boosting a second voltage higher than the first voltage
The power supply circuit according to (1) or (2), comprising a booster.

(4) Step-up means for stepping up the voltage of the power supply battery, first control means operable by the step-up voltage by the step-up means and controlling the operation of the equipment, step-up means and step-up control means And a switch means connected to at least one of the above and for giving an operation instruction to the device, wherein the boosting means inhibits the boosting operation until an operation instruction is given by the switch means. .

According to the power supply circuit described in the above (4), the boosting operation is not performed until the operation instruction is given by the switch, so that the power supply battery is not wasted.

(5) The power supply circuit according to (4), wherein the first control means is a microprocessor.

According to the power supply circuit described in (5), the microprocessor can operate with the voltage boosted by the booster circuit.

(6) The power supply circuit according to (5), wherein the operation of the switch means causes the microprocessor to execute an interrupt process.

According to the power supply circuit described in the above (6), when the microprocessor executes the interrupt processing, the boosting operation is performed, and the microprocessor can be operated by the boosted voltage.

(7) The second operating at the voltage of the power supply battery
(4) The control means is provided, wherein the second control means starts operating when the power supply battery is loaded.
A power supply circuit according to claim 1.

According to the power supply circuit described in (7), when a power supply battery is loaded, a voltage is applied to the second control means. However, until the operation instruction is given by the switch means, the boosting operation is performed. Is not performed, so that the power battery is not wasted.

(8) The power supply circuit according to (7), wherein the switch means is connected to the first control means via the second control means.

According to the power supply circuit described in (8), the boosting means can be operated via the second control means which is operated by the voltage of the power supply battery. The second control means can perform not only the boosting operation but also various control operations by detecting the operation of the switch means.

(9) The power supply circuit according to (7), wherein the second control means operates constantly.

According to the power supply circuit described in the above (9), when a battery is loaded, the second control means can always operate.

(10) The power supply circuit according to (4), wherein the booster stops the boosting operation when detecting that the switch is turned off.

According to the power supply circuit described in the above (10),
When the switch is turned off, the boosting operation is stopped, so that the boosting operation of the power supply is not performed unnecessarily, and waste of the power supply battery can be prevented.

(11) The power supply circuit according to any one of (4) to (10), wherein the device is a camera.

According to the power supply circuit described in the above (11),
It is difficult for a portable device such as a camera to carry a large power source as a power supply battery, and the present invention is particularly convenient for such a portable device.

[0095]

As described above, according to the present invention, a power supply circuit capable of minimizing current consumption even when a low-voltage battery is mounted can be provided.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a schematic configuration of a power supply circuit according to a first embodiment of the present invention.

FIG. 2 is an electric circuit block diagram illustrating the configuration of the power supply circuit according to the first embodiment in more detail.

FIG. 3 is a timing chart illustrating an operation of each unit related to a boosting operation in the power supply circuit according to the first embodiment.

FIG. 4 is a block diagram illustrating a schematic configuration of a power supply circuit according to a second embodiment of the present invention.

FIG. 5 is an electric circuit block diagram illustrating the configuration of the power supply circuit according to the second embodiment in more detail.

FIG. 6 is a timing chart showing the operation of each unit related to the boosting operation in the power supply circuit according to the second embodiment.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 ... Booster means 2 ... Control means 3 ... First switch means 4 ... Second switch means 5 ... Nth switch means 6 ... Battery 11 ... Booster circuit oscillating part 16 ... Booster circuit voltage detecting part 17 ... CPU 18 ... Reset IC

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁶ Identification code FI H04N 5/225 H04N 5/225 F

Claims (3)

[Claims] 1. A booster for boosting a voltage of a power supply battery, operable by a boosted voltage by the booster,
A first control unit for controlling the operation of the device; and a switch unit connected to the boosting unit and the first control unit for giving an operation instruction to the device. A power supply circuit for inhibiting a boosting operation until a signal is supplied. 2. A booster for boosting a voltage of a power supply battery, and operable by a boosted voltage by the booster,
First control means for controlling the operation of the equipment, second control means operable with the voltage of the power supply battery, and switch means connected to the second control means for giving an operation instruction to the equipment. A power supply circuit, wherein the boosting means inhibits the boosting operation until an operation instruction from the switch means is given through the second control means. 3. A power supply circuit in a device having control means for operating by boosting the voltage of a power supply battery, wherein the boosting operation is started when a switch provided on the device is operated.