JPH1141620A - Signal processing device and recording / reproducing device - Google Patents

Abstract

(57) [Summary] [PROBLEMS] To perform high-precision video signal input / output processing with a small circuit scale. The signal processing device includes a first band limiting unit that limits a band of a luminance signal in an input video signal and has a predetermined group delay time only in a pass band of the luminance signal, and a low-pass filter, Second band limiting means for limiting the band of the chroma signal in the input video signal and having the predetermined group delay time only in the pass band of the chroma signal.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to a signal processing apparatus and a recording / reproducing apparatus, and more particularly, to processing of a video signal.

[0002]

2. Description of the Related Art In recent years, as a device of this type, a device for recording a digital video signal on a tape or a disk has rapidly spread on a consumer level. Examples of this type of device include a digital video camcorder (DVC) conforming to the DVC format standard, and a DVD player for reproducing a digital video disk (DVD) in which a video signal compressed and encoded according to the MPEG standard is recorded on an optical disk. Can be

[0003] In particular, in DVC, not only a function of recording and reproducing a digital video signal but also a function of recording an analog video signal inputted from the outside as a digital signal is desired.

[0004]

As is well known, the characteristics of an analog filter are an important factor in a video signal input / output processing system.

That is, since the aliasing noise is suppressed at the time of sampling by the A / D converter, the gain suppression characteristic outside the band of the video signal is sufficient, and further, the gain characteristic within the signal pass band is flat and the pulse is excellent. It is required to have response characteristics.

In order to realize such a high-precision filter, a filter having a high-order gain cutoff characteristic and having been subjected to sufficient delay equalization in a signal pass band is required. The group delay time of the LPF for the Y signal is usually 500 ns or more.

On the other hand, the chroma signal (hereinafter referred to as C signal) has a narrow signal band and a subcarrier frequency f _sc ± 500.
Although it is conceivable to employ a BPF having a pass band of about kHz, the signal delay time is shorter than that of the above-described LPF for the Y signal, so that the processing timing between the Y signal and the C signal is adjusted. Requires a delay equalizer of several hundred ns or more.

In order to make the input / output signal processing system of the apparatus for recording and reproducing digital video signals as described above more compact, highly accurate and low cost,
The integration of peripheral circuits including the above-mentioned filter is advantageous in system development.

However, if the above-mentioned LPF or BPF is constituted by an active filter in order to make it into an IC, the LPF for the Y signal is required to have a high-order amplitude suppression characteristic of at least 5 or more, and furthermore a primary or secondary order. It is necessary to cascade several stages of delay equalizers to perform delay correction within the band. The hardware scale and power consumption are dominant factors of the input / output signal processing system.

On the other hand, although the signal band of the C signal is narrower than that of the Y signal, it is comparable to the LPF for the Y signal if a band equalizing characteristic and a delay equalizer for adjusting the timing for matching the propagation delay with the Y signal are included. There is a problem that the amount of hardware becomes large and the power consumption also reaches a considerable amount.

An object of the present invention is to solve the above-mentioned problems.

Another object of the present invention is to perform highly accurate video signal input / output processing with a small circuit scale.

[0013]

SUMMARY OF THE INVENTION In order to solve the above-mentioned problems and achieve the object, the present invention limits the band of a luminance signal in an input video signal and sets a predetermined group delay time only in a pass band of the luminance signal. And a second band-limiting unit including a low-pass filter for limiting a band of a chroma signal in the input video signal and having the predetermined group delay time only in a pass band of the chroma signal. It is comprised including.

[0014]

Embodiments of the present invention will be described below in detail with reference to the drawings.

FIG. 1 is a block diagram showing the overall configuration of a DVC to which the present invention is applied.

In FIG. 1, at the time of recording, an analog video signal supplied from the outside is processed by an input / output processing circuit 101 as described later to be converted into a digital signal.
It is output to the expansion circuit 102. The compression / expansion circuit 102 compresses the information amount of the digital video signal output from the input / output circuit using a well-known technique such as DCT or variable length coding, and outputs the compressed information to the recording / reproduction processing circuit 103. The recording / reproducing processing circuit 103 converts the digital video signal output from the compression / decompression circuit 3 into a form suitable for recording by applying a synchronization signal or an ID signal, performing error correction coding, digital modulation processing, or the like. Tape 104 by rotating head
Record above.

At the time of reproduction, the recording / reproduction processing circuit 10
A compression / decompression circuit 3 reproduces a signal from the tape 104 and performs processing such as digital demodulation processing and error correction processing.
Output to 2. The compression / expansion circuit 102 subjects the video signal output from the recording / reproduction processing circuit to processing reverse to that at the time of recording, expands the amount of information, and outputs it to the input / output circuit 101. The input / output circuit 101 converts the digital video signal output from the compression / expansion circuit 102 into an analog signal and outputs it.

Next, the input / output circuit 101, which is a characteristic configuration of the present embodiment, will be described.

FIG. 2 is a diagram showing the configuration of the input system of the input / output circuit 101.

In FIG. 2, input signals 201 and 221 are an analog Y signal and a C signal, respectively. Y signal 201
The gain is adjusted to a predetermined level by the amplifier 202, the band is limited by the LPF 203, and the group delay time is controlled by the delay equalizer 205. FIG. 3 shows characteristics of the delay equalizer 205 including the LPF 203 and the all-pass filter.

In FIG. 3, reference numeral 301 denotes an amplitude characteristic, and 302 denotes a group delay characteristic. The LPF 203 of the present embodiment has a
Sampling clock CLKY2 of D converter 208
Based on 10 frequencies f _sY , at a frequency of １ ／ f _sY ,
It has an amplitude attenuation characteristic of about 12 dB. Also, L
The group delay time in the pass band including the PF 203 and the delay equalizer 205 is YDLY (ns).

LPF 203 and delay equalizer 20
The signal potential of the Y signal 206 processed in step 5 is set by the clamp circuit 207 so as to be suitable for the input range of the A / D converter 208 in the next stage. Specifically, even if the average luminance level of the video signal fluctuates, a clamp operation is performed such that the reference pedestal level (black level) becomes a constant DC potential.

In this embodiment, the A / D converter 208 is
The Y signal output from the clamp circuit 207 is sampled according to a clock CLKY _{210 of} f _sY = 13.5 MHz, and is converted into a digital signal 209 of 1 bit per sample and output.

On the other hand, the gain of the C signal 221 is adjusted by the amplifier 222 so as to be at a predetermined level.
At 3 the band is limited. FIG. 4 shows the characteristics of the LPF 223.

In FIG. 4, reference numeral 401 denotes an amplitude characteristic, and 402 denotes a group delay characteristic. In this embodiment, for the passage of C signal, which sets the cut-off frequency f _c of the LPF223 slightly higher frequency than the sub-carrier frequency f _sc. Further, in this embodiment, to have a peak of the delay time at a cut-off frequency f _c, is set as the delay time gd403 is a delay time YDLY (ns) and an equivalent amount of delay of the Y signal shown in FIG. 3 ing. This is LPF22
It can be realized by changing Q (Quality Factor) of No. 3. FIG. 5 shows a specific configuration of the LPF 223.

In the figure, reference numeral 501 denotes a transconductance amplifier (hereinafter referred to as a Gm amplifier);
03 is a capacitor.

Normally, an active LPF as an IC built-in filter is composed of a Gm amplifier + a capacitor +
It is designed to obtain desired filter characteristics by connecting LPFs composed of buffers in multiple stages.

In FIG. 5, the Gm amplifier 501 and the capacitor 503 use

[0029]

[Outside 1] LPF. By connecting the LPFs formed of the Gm amplifiers in multiple stages, an LPF having a desired cutoff characteristic is realized.

The C signal 224 band-limited by the LPF 223 is subjected to delay correction by the next-stage delay equalizer 225. FIG. 6 shows the characteristics of the delay equalizer 225.

In this embodiment, the delay equalizer 22
Reference numeral 5 denotes an all-pass filter, which is denoted by reference numeral 601 in FIG.
Represents the group delay characteristic of the delay equalizer 225.

In this embodiment, the subcarrier frequency f
lower than _sc, and, to have a peak of the group delay time at a frequency f _gd as the cut-off frequency f _c and symmetric LPF223 respect f _sc, the group delay time LPF22
3 is set to be the same as the group delay time gd403. By setting the group delay characteristic of the delay equalizer 225 in this manner, the group delay time near _fsc, which is the pass band of the C signal, is made flat and the group delay time is made the same as that of the Y signal, as described later. Can be time. In the present embodiment, although the peak of the group delay time in the cut-off frequency f _c near the LPF223, may be at a lower frequency than f _c.

FIG. 7 is a diagram showing the configuration of the delay equalizer 225.

In the drawing, reference numeral 702 denotes an all-pass filter having a first-order or second-order transfer function with a gain of 1, and 703.
Is an amplifier.

In FIG. 7, when the delay circuit 702 is a second-order all-pass filter and has the following general band-pass transfer characteristic,

[0036]

[Outside 2]

The composite function is as follows.

[0038]

[Outside 3]

Here, ω _r and Q are the pole resonance frequency (radian / second) and the pole Q, respectively.

[0040] than this, the group delay is maximum in the immediate vicinity of ω _r, the maximum delay is increased when the Q is increased, the delay characteristic is steep. In the present embodiment, the characteristics of the delay equalizer 225 are changed by controlling ω _r and Q as shown in FIG.

FIG. 8 shows the total characteristics of the LPF 223 and the delay equalizer 225.

In the figure, reference numeral 801 denotes an amplitude characteristic, and 802 denotes a group delay characteristic. Here, the amplitude characteristic near the DC component is suppressed by the coupling capacitor of the LPF 223, and the high band has an LPF characteristic that is attenuated from the frequency f _{sc in} order to pass the C signal in the band. Also, LP
The null point of F is set to twice the frequency of f _sc .

On the other hand, the group delay characteristic is
By setting the group delay characteristics of the delay equalizer 23 and the delay equalizer 225, a flat delay characteristic having a value of gd803 is obtained in the pass band of the C signal near the subcarrier frequency f _sc . Also, this delay time gd803
Is substantially the same as the delay time gd403 of the LPF 223 and the delay time gd602 of the delay equalizer 225.

In this embodiment, the group delay time gd 803 in the pass band of the C signal is changed to the delay time YDL of the Y signal.
By designing to be the same as Y, the Y signal and C
The timing between signals is adjusted.

The signal potential of the C signal whose delay time has been adjusted by the delay equalizer 225 is set by the clamp circuit 227 so as to be suitable for the input range of the A / D converter 228. The sampling clock frequency f _s = 4f _sc by an A / D converter 228 CLKC23
It is sampled according to 0, converted into a digital signal 229 of 1 bit per sample, and output.

As described above, in this embodiment, since the LPF is used as the pre-filter for the A / D conversion in the processing system for the C signal, the circuit scale can be greatly reduced as compared with the case where the BPF is used.

Further, an all-pass filter is provided at the subsequent stage of the LPF, and the group delay characteristic in the pass band of the C signal is controlled by this all-pass filter to adjust the timing with the Y signal processing system. Without increasing the size, the group delay time in the pass band of the C signal and the group delay time of the Y signal processing system can be matched with high accuracy.

In this embodiment, the delay equalizer 225 is provided after the LPF 223. However, the delay equalizer 225 may have a reverse positional relationship. That is, even when the delay equalizer 225 is provided before the LPF 223, the total group delay characteristics are as shown in FIG.

In the above embodiment, the input processing circuit system of the input / output circuit 101 has been described. However, another configuration of the input / output circuit 101 will be described.

FIG. 9 is a diagram showing another configuration of the input / output circuit 101, in which the LPF is shared between the input and output of the video signal.

First, when a video signal is input, Y
The switches 902, 905, and 918 of the signal processing system and the switches 922, 925, and 935 of the C signal processing system are connected to the a side by control signals 937 to 942, respectively. In addition,
These control signals are output according to a mode switch (not shown). The gain of the Y signal 901 input via the switches 918 and 902 is adjusted by the amplifier 903 to a predetermined level, and the LPF and the equalizer 9 are adjusted.
At 04, band limitation and delay time adjustment processing are performed. The LPF and the equalizer 904 of the present embodiment are the LPF and the equalizer 904 shown in FIG.
F203 and equalizer 205 can be applied,
The characteristics are as shown in FIG.

The Y signal whose band has been limited and the delay time has been adjusted by the LPF and the equalizer 904 is output to the clamp circuit 906 via the switch 905, subjected to clamp processing in the same manner as the circuit shown in FIG. The digital signal is converted into a digital signal 908 of 8 bits per sample by the D converter 907 in accordance with the sampling clock CLKY909 and output to the compression / expansion circuit 202.

On the other hand, the gain of the C signal 921 inputted via the switches 935 and 922 is adjusted by the amplifier 923 so as to become a predetermined level, and the LPF and the equalizer 92 are adjusted.
4 is output. LPF and equalizer 924 of the present embodiment
Can apply the LPF 223 and the equalizer 225 shown in FIG. 2, and the characteristics thereof are as shown in FIG. Therefore, also in the present embodiment, the processing timing is matched between the Y signal processing system and the C signal processing system.

The C signal whose band has been limited and the delay time has been adjusted by the LPF and the equalizer 924 is output to the clamp 926 via the switch 925, subjected to a clamp process as in the circuit shown in FIG. D converter 92
7 in accordance with the sampling clock CLKC929 to convert it into a digital signal of 8 bits per sample.
It is output to the expansion circuit 102.

On the other hand, when outputting a video signal, Y
The switches 902, 905, and 918 of the signal processing system and the switches 922, 925, and 935 of the C signal processing system are respectively connected to the b side.

The digital Y signal 910 output from the compression / expansion circuit 102 is converted into an analog Y signal by the D / A converter 916 according to the clock CLKY 911, and the buffer 912, the switch 902, and the amplifier 9
03 to the LPF and equalizer 904. Then, the band is limited and the delay time is adjusted as described above, and output to the outside via the switch 905, the output amplifier 913, and the switch 918.

The digital C signal 930 output from the compression / expansion circuit 102 is converted into an analog C signal by the D / A converter 936 according to the clock CLKC931, and the buffer 932, the switch 922, and the amplifier 9
23 and output to the LPF and equalizer 924. Then, the band is limited and the delay time is adjusted as described above, and is output to the outside via the switch 925, the output amplifier 933, and the switch 935.

As described above, also in this embodiment, the LPF is used as a pre-filter for A / D conversion in the processing system for C signals.
, The circuit scale can be greatly reduced as compared with the case where the BPF is used.

Further, an all-pass filter is provided at the subsequent stage of the LPF, and the group delay characteristic in the pass band of the C signal is controlled by this all-pass filter to adjust the timing with the Y signal processing system. Without increasing the size, the group delay time in the pass band of the C signal and the group delay time of the Y signal processing system can be matched with high accuracy.

In this embodiment, the delay equalizer can be placed before the LPF, and the same effect can be obtained.

Further, in this embodiment, the filter is shared between the input processing system and the output processing system, so that the circuit can be further downsized.

[0062]

As described above, in the signal processing device of the present invention, the band limiting means for the chroma signal is constituted by a low-pass filter, and the delay time of the band limiting means for the luminance signal is reduced within the signal pass band. Since the same delay time is set, high-precision processing can be performed while reducing the circuit scale in the video signal input / output system.

[Brief description of the drawings]

FIG. 1 is a diagram showing a configuration of a digital VTR as an embodiment of the present invention.

FIG. 2 is a diagram illustrating a configuration of an input / output processing circuit of FIG. 1;

FIG. 3 is a diagram showing characteristics of the LPF of FIG. 2;

FIG. 4 is a diagram showing characteristics of the LPF of FIG. 2;

FIG. 5 is a diagram showing a configuration of the LPF of FIG. 2;

FIG. 6 is a diagram illustrating characteristics of the delay equalizer in FIG. 2;

FIG. 7 is a diagram illustrating a configuration of a delay equalizer in FIG. 2;

FIG. 8 is a diagram illustrating a combination characteristic of the LPF and the delay equalizer in FIG. 2;

FIG. 9 is a diagram showing another configuration of the input / output processing circuit of FIG. 1;

[Explanation of symbols]

 203 LPF 205 Delay equalizer 223 LPF 225 Delay equalizer

Claims (21)

[Claims] A first band limiting unit that limits a band of a luminance signal in the input video signal and has a predetermined group delay time only in a pass band of the luminance signal; and a low-pass filter; A second band having a predetermined group delay time only in the pass band of the chroma signal while limiting the band of the chroma signal;
A signal processing device comprising: 2. The low-pass filter having the predetermined group delay time only in the vicinity of a cut-off frequency, and the second band-limiting means determines the predetermined group delay time at a frequency lower than the cut-off frequency of the low-pass filter. The signal processing device according to claim 1, further comprising: an all-pass filter having the same. 3. The signal processing apparatus according to claim 2, wherein the second band limiting unit is configured by connecting the low-pass filter and the all-pass filter in series. 4. The signal processing device according to claim 2, wherein the low-pass filter suppresses a DC component of the chroma signal. 5. A first A / D converter for converting a luminance signal processed by the first band limiting unit into a digital signal according to a first clock having a first frequency;
A second A / D converter for converting the chroma signal processed by the second band-limiter into a digital signal according to a second clock having a second frequency different from the first frequency. The signal processing device according to claim 1, further comprising: 6. The recording medium according to claim 5, further comprising recording means for recording the digital luminance signal and the digital chroma signal output from the first and second A / D conversion means on a recording medium. Signal processing device. 7. The recording device according to claim 1, wherein the recording unit is configured to perform the first and second A / D operations.
7. The signal processing apparatus according to claim 6, further comprising compression means for compressing the information amount of the digital luminance signal and digital chroma signal output from the conversion means. 8. The signal processing apparatus according to claim 1, wherein the second band limiting unit further suppresses a DC component of the chroma signal. 9. The signal processing apparatus according to claim 1, wherein said second band limiting means has a null point at a frequency twice as high as a subcarrier frequency of said chroma signal. 10. A first D / A converter for converting a luminance signal of an input digital video signal into an analog signal and outputting the analog signal to the first band suppressor, and converting a chroma signal of the input digital video signal into an analog signal. 2. The signal processing apparatus according to claim 1, further comprising a second D / A conversion unit that converts the signal to a second signal and outputs the converted signal to the second band suppression unit. 11. The signal processing apparatus according to claim 10, further comprising: a reproducing unit for reproducing the digital video signal from a recording medium; and an input unit for inputting the digital video signal reproduced by the reproducing unit. apparatus. 12. The recording apparatus according to claim 11, wherein said reproducing means includes expanding means for expanding the information amount of said reproduced digital video signal. 13. An apparatus for recording and reproducing a digital video signal on and from a recording medium, wherein the apparatus converts an analog video signal into a digital video signal.
/ D conversion means for converting a digital video signal into an analog video signal
/ A converting means, first band limiting means for limiting a band of a luminance signal in a video signal and having a predetermined group delay time only in a pass band of the luminance signal, and a low-pass filter, and a chroma signal in the video signal. A second band limiting unit having a predetermined group delay time only in the pass band of the chroma signal, a recording / reproducing unit for recording / reproducing a digital video signal on / from a recording medium, The band limiting means processes the luminance signal of the input analog video signal, and the second band limiting means processes the chroma signal of the input analog video signal.
A / D conversion means converts the luminance signal and the chroma signal processed by the first and second band limiting means into a digital luminance signal and a digital chroma signal, respectively, and the recording / reproducing means converts the signal from the A / D conversion means. A recording mode for recording a digital luminance signal and a digital chroma signal, wherein the recording / reproducing means reproduces the digital signal from the recording medium, the D / A conversion means converts the reproduced digital video signal into an analog video signal, The first band limiting unit processes the luminance signal of the analog video signal obtained by the D / A converting unit, and the second band limiting unit processes the chroma signal of the analog video signal obtained by the D / A converting unit. A recording / reproducing apparatus comprising: mode switching means for switching a mode of the apparatus between a reproduction mode for processing a signal and a reproduction mode for processing a signal. 14. A low-pass filter having a predetermined group delay time near a first frequency; and an all-pass filter having the predetermined group delay time at a frequency lower than the first frequency; A signal processing device, wherein the signal processing device is connected to the all-pass filter in series. 15. The signal processing apparatus according to claim 14, wherein each of the low-pass filter and the all-pass filter filters a video signal. 16. The signal processing apparatus according to claim 15, wherein the first frequency is higher than a subcarrier frequency of a chroma signal of the video signal. 17. The device according to claim 16, wherein the low-pass filter has a peak of a group delay time at the first frequency, and the group delay time of the peak is the predetermined group delay time. Signal processing device. 18. The method according to claim 18, wherein the all-pass filter has a group delay time peak at a second frequency lower than the subcarrier frequency, and the peak group delay time is the predetermined group delay time. The signal processing device according to claim 16. 19. The signal processing device according to claim 18, wherein the first frequency and the second frequency are symmetric with respect to the subcarrier frequency. 20. The apparatus according to claim 15, wherein the low-pass filter and the all-pass filter each include a band limiting unit that processes a chroma signal of the video signal and band-limits a luminance signal of the video signal. Signal processing device. 21. The signal processing apparatus according to claim 20, wherein said band limiting means has said predetermined group delay time in a pass band of said luminance signal.