JPH11510014A - 通信装置内でフレームを廃棄する方法及び装置 - Google Patents

通信装置内でフレームを廃棄する方法及び装置

Info

Publication number
JPH11510014A
JPH11510014A JP9506892A JP50689297A JPH11510014A JP H11510014 A JPH11510014 A JP H11510014A JP 9506892 A JP9506892 A JP 9506892A JP 50689297 A JP50689297 A JP 50689297A JP H11510014 A JPH11510014 A JP H11510014A
Authority
JP
Japan
Prior art keywords
cell
cells
buffer
frame
communication device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9506892A
Other languages
English (en)
Japanese (ja)
Inventor
エイ カルダラ，スティーヴン
エイ ハウザー，スティーヴン
エイ マニング，トマス
エヌ ペック，デイヴィッド
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Publication of JPH11510014A publication Critical patent/JPH11510014A/ja
Pending legal-status Critical Current

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    • G—PHYSICS
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    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
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    • H04L12/00—Data switching networks
    • H04L12/54—Store-and-forward switching systems 
    • H04L12/56—Packet switching systems
    • H04L12/5601—Transfer mode dependent, e.g. ATM
    • H04L2012/5678—Traffic aspects, e.g. arbitration, load balancing, smoothing, buffer management
    • H04L2012/5681—Buffer or queue management
    • H04L2012/5682—Threshold; Watermark
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/54—Store-and-forward switching systems 
    • H04L12/56—Packet switching systems
    • H04L12/5601—Transfer mode dependent, e.g. ATM
    • H04L2012/5678—Traffic aspects, e.g. arbitration, load balancing, smoothing, buffer management
    • H04L2012/5681—Buffer or queue management
    • H04L2012/5683—Buffer or queue management for avoiding head of line blocking
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/54—Store-and-forward switching systems 
    • H04L12/56—Packet switching systems
    • H04L12/5601—Transfer mode dependent, e.g. ATM
    • H04L2012/5685—Addressing issues
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/04—Speed or phase control by synchronisation signals
    • H04L7/041—Speed or phase control by synchronisation signals using special codes as synchronising signal
    • H04L7/046—Speed or phase control by synchronisation signals using special codes as synchronising signal using a dotting sequence

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Physics & Mathematics (AREA)
  • Computer Security & Cryptography (AREA)
  • Mathematical Physics (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
JP9506892A 1995-07-19 1996-07-18 通信装置内でフレームを廃棄する方法及び装置 Pending JPH11510014A (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US149895P 1995-07-19 1995-07-19
US60/001,498 1995-07-19
PCT/US1996/011960 WO1997004567A1 (en) 1995-07-19 1996-07-18 Method and apparatus for discarding frames in a communications device

Publications (1)

Publication Number Publication Date
JPH11510014A true JPH11510014A (ja) 1999-08-31

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Family Applications (1)

Application Number Title Priority Date Filing Date
JP9506892A Pending JPH11510014A (ja) 1995-07-19 1996-07-18 通信装置内でフレームを廃棄する方法及び装置

Country Status (4)

Country Link
EP (1) EP0872086A4 (de)
JP (1) JPH11510014A (de)
AU (1) AU6503296A (de)
WO (1) WO1997004567A1 (de)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7009937B2 (en) 2000-07-05 2006-03-07 Nec Corporation Transmission queue managing system capable of efficiently controlling traffic congestion

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4953157A (en) * 1989-04-19 1990-08-28 American Telephone And Telegraph Company Programmable data packet buffer prioritization arrangement
JP3128654B2 (ja) * 1990-10-19 2001-01-29 富士通株式会社 監視制御方法、監視制御装置及び交換システム
US5361372A (en) * 1991-12-27 1994-11-01 Digital Equipment Corporation Memory management for data transmission networks
GB2272612B (en) * 1992-11-06 1996-05-01 Roke Manor Research Improvements in or relating to ATM signal processors

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7009937B2 (en) 2000-07-05 2006-03-07 Nec Corporation Transmission queue managing system capable of efficiently controlling traffic congestion

Also Published As

Publication number Publication date
EP0872086A4 (de) 2001-07-18
WO1997004567A1 (en) 1997-02-06
EP0872086A1 (de) 1998-10-21
AU6503296A (en) 1997-02-18

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