JPH1174346A - Multilayer wiring and manufacturing method thereof - Google Patents

Abstract

[PROBLEMS] To form a structure in which a titanium nitride film is left on the surface of an Al-based metal wiring exposed at the bottom of a fine connection hole, an increase in the number of steps and a special formation are required. Optimization of film conditions and the like were necessary, which was difficult. SOLUTION: A wiring 26 and an insulating film 31 covering the wiring 26 are formed on a substrate 10, and the wiring 26 is formed on the insulating film 31.
The wiring 26 is a multi-layer wiring having a conductive hole 37 formed therein and a conductive plug 37 formed therein. And the plug 37 is connected at least to the upper part of the side wall wiring layer 25. Also, the wiring 2 at the connection portion with the plug 37
6 is formed to have a width smaller than that of the plug 37, the plug 37 is also connected to the side of the side wall wiring layer 25, and the wiring 26 is formed so that the width of the connection portion with the plug 37 is smaller than the width of the other portions. Is preferred.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multilayer wiring and a method of manufacturing the same, and more particularly, to a multilayer wiring using a groove wiring and a method of manufacturing the same.

[0002]

2. Description of the Related Art With the reduction in design rules due to the high integration of VLSIs, the technology of forming fine multilayer wiring has become important. Recently, as a way to achieve this,
So-called groove wiring technology is being studied. The term “groove wiring” means that a groove is formed in advance in a portion of an interlayer insulating film where a wiring is to be formed, a metal such as an aluminum alloy is buried in the groove, and excess metal outside the groove is removed by chemical mechanical polishing (hereinafter referred to as CMP). Means the wiring formed by this. Compared to the conventional wiring formation method, it is easier to etch fine grooves in the interlayer insulating film than to form fine metal wiring by etching metal film, Since it is easier to bury a metal in a narrow groove than to bury an insulating film in a trench, it can be said that the technology of forming the groove wiring is advantageous for miniaturization.

[0003]

However, the trench wiring technique has the following problems. As a conventional multilayer wiring structure not using trench wiring, a structure in which an aluminum alloy of a lower wiring is exposed at the bottom of a connection hole and a structure in which titanium nitride (TiN) of the uppermost layer of the lower wiring is formed at the bottom of the connection hole are used. And a structure in which the aluminum alloy was not exposed.

In general, the latter structure is considered to have higher reliability in fine wiring. In the case of the structure in which the aluminum alloy is exposed, in order to obtain good electrical connection, immediately before forming the upper wiring, the natural oxide film formed on the exposed surface of the aluminum alloy is subjected to argon (Ar) sputter etching or the like. Need to be removed. However, as connection holes become finer, it is becoming increasingly difficult to do this reliably. On the other hand, in a structure in which titanium nitride (TiN) is left at the bottom of the connection hole, good electrical connection can be obtained without strictly removing the natural oxide film. Here, in order to obtain the latter structure in the conventional wiring forming method, it was possible to realize the latter structure by relatively easy means such as thickening titanium nitride (TiN) of the lower wiring.

However, in the process of forming the trench wiring, formation of the latter structure is not always easy.
Several methods have been proposed to form this, but all of them have drawbacks such as an increase in the number of steps and the need to optimize special film forming conditions.

[0006]

SUMMARY OF THE INVENTION The present invention is directed to a multilayer wiring and a method of manufacturing the same to solve the above-mentioned problems.

[0007] The multi-layer wiring is formed by wiring formed on a substrate, a connection hole formed in an insulating film covering the wiring, and connecting to the wiring, and a conductive plug formed in the connection hole. The wiring is composed of a main wiring layer made of a conductive layer and a side wall wiring layer provided on the side wall of the main wiring layer made of a conductive nitride film, and the plug is formed of at least the side wall wiring layer. Connected to the top.

In the above multilayer wiring, the wiring is composed of a main wiring layer made of a conductive layer and a side wall wiring layer provided on the side wall of the main wiring layer made of a conductive nitride film. Even if it is oxidized to form an insulating metal oxide film, the conductive nitride film of the sidewall wiring layer is not oxidized. Therefore, the conductive plug formed in the connection hole connected to the wiring can be stably conducted at least with the side wall wiring layer.

A first method for manufacturing a multilayer wiring comprises the steps of:
After forming a groove for providing a wiring in the insulating film, forming a base film including at least a conductive nitride film on the inner wall of the groove, a conductive layer is formed so as to fill the inside of the groove.
Next, the conductive layer and the base film remaining on the first insulating film are removed, and a wiring is formed inside the groove with the main wiring layer made of the conductive layer and the sidewall wiring layer made of the base film. Then, after forming the second insulating film covering the wiring on the first insulating film, a connection hole communicating with the wiring is formed in the second insulating film. Thereafter, a conductive plug is formed inside the connection hole.

In the first method of manufacturing a multilayer wiring, a base film including at least a conductive nitride film is formed on the inner wall of a groove formed in a first insulating film on a substrate, and then the inside of the groove is buried. Since the conductive layer is formed, the wiring formed in the trench has a side wall wiring layer made of a base film including a conductive nitride film formed on the side wall of the main wiring layer made of the conductive layer. Then, after forming the second insulating film, a connection hole communicating with the wiring is formed, so that the wiring upper portion including the main wiring layer and the side wall wiring layer is exposed at the bottom of the connection hole. Thereafter, since a conductive plug is formed inside the connection hole, even if an oxide film is formed on the surface of the main wiring layer, the plug is formed by a nitride film of a side wall wiring layer formed on the side wall of the main wiring layer. Thus, the wiring is stably connected.

In a second method of manufacturing a multilayer wiring, a first groove for providing a wiring is formed in a first insulating film on a substrate, and a base film including at least a conductive nitride film on an inner wall of the first groove. Is formed, a conductive layer is formed so as to fill the first groove. Next, the conductive layer and the base film remaining on the first insulating film are removed, and a wiring is formed inside the first groove with the main wiring layer made of the conductive layer and the sidewall wiring layer made of the base film.
Then, a second insulating film covering the wiring is formed on the first insulating film,
Further, after forming a third insulating film on the second insulating film, a second groove for providing an upper wiring is formed in the third insulating film, and a connection hole is formed in the second insulating film from a bottom of the second groove to the wiring. To form After that, a buried conductive layer is formed inside the second groove and inside the connection hole.

In the second method of manufacturing a multilayer wiring, a base film including at least a conductive nitride film is formed on the inner wall of a first groove formed in a first insulating film on a substrate, and then the inside of the first groove is formed. Since the conductive layer is formed so as to bury the trenches, the wiring formed in the first trench is composed of a main wiring layer made of a conductive layer and a side wall made of a base film including a conductive nitride film formed on the side wall. It is formed with the conductive layer. After forming the second insulating film and the third insulating film, a second groove in which an upper wiring is provided is formed in the third insulating film, and a connection hole is formed in the second insulating film from the bottom of the second groove to the wiring. Therefore, the upper part of the side wall wiring layer formed on the side wall of the main wiring layer is exposed at the bottom of the connection hole. After that, a buried conductive layer is formed inside the second trench and inside the connection hole. Therefore, even if an oxide film is formed on the surface of the main wiring layer, the buried conductive layer has a conductive property of the side wall wiring layer. Connect to nitride film. Therefore, the embedded conductive layer is stably connected to the wiring. Moreover, the step of forming the upper wiring in the second groove and the step of forming the plug in the connection hole can be performed in the same step.

[0013]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An example of a first embodiment relating to a multilayer wiring according to the present invention will be described with reference to a schematic diagram of FIG.
FIG. 1 shows, as an example, a multilayer wiring by a stacked contact, (1) shows a sectional view of a main part, and (2) shows an A
FIG. 4 shows a cross-sectional view taken along line A.

As shown in FIG. 1, an insulating film 12 is formed on a semiconductor substrate 11. The insulating film 12 has, for example, a laminated structure in which a lower layer is made of a boron phosphorus silicate glass (BPSG) film 13 and an upper layer is made of a silicon nitride film 14. The insulating film 12 has a semiconductor substrate 11
Is formed. This connection hole 15
A base film 16 made of a titanium nitride film is formed on the inner wall surface of the substrate, and a conductive material 17 made of tungsten is buried in the inside of the connection hole 15. A plug 18 is formed by the base film 16 and the conductive material 17. Is formed. The substrate 10 is configured as described above.

The plug 1 is formed on the insulating film 12.
8 is formed. This insulating film 21
Is formed with a groove 22 passing over the plug 18.
Moreover, the groove 22 is formed so that a portion on the plug 18 is thinner than other portions. A base film 23 formed by laminating a titanium film and a titanium nitride film, which is a conductive nitride film, is formed on the inner wall surface of the groove 22. Further, inside the groove 22, aluminum containing copper (hereinafter, Al-Cu ) Are buried. That is, the wiring 26 is constituted by the main wiring layer 24 and the side wall wiring layer 25 formed of the base film 23 provided on the side wall thereof.

Further, the wiring 26 is formed on the insulating film 21.
An insulating film 31 is formed so as to cover. This insulating film 31
The lower layer is plasma CVD (Chemical Vapor Depositio
The upper layer is made of the silicon oxide film 32 formed by n). The insulating film 31 has a connection hole 3 passing over a thin portion of the wiring 26.
4 are formed. The connection hole 34 is provided in the wiring 26
If the upper part is exposed, the upper surface of the thin portion of the wiring 26 and the upper part of the side wall of the wiring 26 may be formed as shown in the drawing, or only the upper surface of the wiring 26 may be exposed. May be formed. This connection hole 34
A base film 35 formed by laminating a titanium film and a titanium nitride film is formed on the inner wall surface of the substrate.
A buried conductive layer made of u is formed. Therefore, the plug 3 is formed by the base film 35 and the buried conductive layer 36.
7 are configured. The material for filling the connection holes 34 in the side wall portions of the wiring 26 is shown only in the base film 35 in the drawing, but the material may be filled with the base film 35 and the buried conductive layer 36.

Further, the plug 3 is formed on the insulating film 31.
7 is formed. This insulating film 41
Is composed of, for example, a silicon oxide film formed by plasma CVD. The insulating film 41 has a groove 42 in which a portion connected to the plug 37 is formed thin. On the inner wall surface of the groove 42, a base film 43 in which a titanium film and a titanium nitride film are laminated is formed.
An upper wiring 45 is formed by burying a main wiring layer 44 made of Al-Cu in the interior of the semiconductor device 2.

In the multilayer wiring of the first embodiment, the wiring 2
Reference numeral 6 denotes a main wiring layer 24 and a side wall wiring layer 25 provided on the side wall thereof. Since the side wall wiring layer 24 is made of a titanium nitride film which is a conductive nitride film, the surface of the main wiring layer 24 is Even if the insulating metal oxide film is formed by oxidation, the sidewall wiring layer 25 is not oxidized. Moreover, the side wall wiring layer 2
Since the conductive layer 5 has conductivity, the plug 37 connected to the wiring 26 can be stably conducted at least with the side wall wiring layer 25.

Further, since the width of the wiring 26 at the connection portion with the plug 37 is formed to be narrower than the width of the plug 37, the area of the upper surface of the main wiring layer 24 at the connection portion of the plug 37 is smaller than that of the related art. Also narrows. Therefore, in the connection portion with the plug 37 formed inside the connection hole 34, the portion of the main wiring layer 24 that is easily oxidized is reduced, so that stable conduction is obtained by the side wall wiring layer 25.
In the case where the plug 37 is also connected to the side of the side wall wiring layer 25, more stable conduction is obtained by increasing the contact area between the side wall wiring layer 25 and the plug 37. Further, since the portion of the wiring 26 to which the plug 37 (connection hole 34) is connected is formed to have a width smaller than the width of the wiring 26 other than that portion, the resistance of the wiring 26 other than the connection portion increases. Is suppressed.

Next, an example of the second embodiment relating to the multilayer wiring will be described with reference to the schematic configuration diagram of FIG. FIG. 2 shows, as an example, a multilayer wiring formed by a dual damascene method, (1) showing a cross-sectional view of a main part, and (2) showing BB
FIG. In FIG. 2, the same components as those shown in FIG. 1 are denoted by the same reference numerals.

As shown in FIG. 2, an insulating film 12 is formed on a semiconductor substrate 11. The insulating film 12 has a lower layer made of a BPSG film 13 and an upper layer made of a silicon nitride film 14. The substrate 10 is configured as described above.

Further, on the insulating film 12, an insulating film 21 is formed. The insulating film 21 has a first groove 28 (first groove 28).
(Corresponding to the groove 22 of the embodiment). Moreover,
The first groove 28 is formed so that a portion where a connection hole is formed is thinner than other portions. A base film 23 formed by laminating a titanium film and a titanium nitride film is formed on the inner wall surface of the first groove 28, and the inside of the first groove 28 is made of aluminum containing copper (hereinafter, referred to as Al-Cu). Main wiring layer 24 is buried. That is, the wiring 26 is constituted by the main wiring layer 24 and the side wall wiring layer 25 made of the base film 23 provided on the side wall.

The insulating film 21 has a connection hole (not shown) connected to a thick portion of the wiring 26, and a conductive plug (not shown) is formed in the connection hole.
May be formed.

Further, the wiring 26 is formed on the insulating film 21.
An insulating film 31 is formed so as to cover. This insulating film 31
The lower layer is made of a silicon oxide film 32 formed by plasma CVD, and the upper layer is made of a silicon nitride film 33. Further, on this insulating film 31, an insulating film 41 made of a silicon oxide film formed by plasma CVD is formed. In the insulating film 41, a second groove 46 (corresponding to the groove 42 of the first embodiment) for forming a wiring is formed. Further, a connection hole 34 extending from the bottom of the second groove 46 to the narrow portion of the wiring 26 is formed in the insulating film 3.
1 is formed. The connection hole 34 is provided in the wiring 26
If the upper part is exposed, the upper surface of the thin portion of the wiring 26 and the upper part of the side wall of the wiring 26 may be formed as shown in the drawing, or only the upper surface of the wiring 26 may be exposed. May be formed.

A base film 35 formed by laminating a titanium film and a titanium nitride film is formed on the inner wall surface of the second groove 46 and the connection hole 34, and the inside of the second groove 46 and the connection hole 34 is formed of Al-Cu. Buried conductive layer 38 of buried. Therefore, an upper wiring 45 is formed inside the second groove 46 by the base film 35 and the buried conductive layer 38. Further, inside the connection hole 34, a plug 37 is formed by the base film 35 and the buried conductive layer 38. The connection hole 34 in the side wall of the wiring 26
In the drawing, only the base film 35 is shown as a material for embedding, but the material for embedding may be embedded with the base film 35 and the buried conductive layer 38.

In the multilayer wiring of the second embodiment, as in the multilayer wiring of the first embodiment, the wiring 26 is
4 and a side wall wiring layer 25 provided on the side wall thereof. Since the side wall wiring layer 24 is made of a titanium nitride film, which is a conductive nitride film, the surface of the main wiring layer 24 is oxidized to have an insulating property. Even if a metal oxide film is formed on the side wall wiring layer 2
5 is not oxidized. Moreover, since the side wall wiring layer 25 has conductivity, the plug 37 connected to the wiring 26 is formed.
Can be stably conducted at least by the side wall wiring layer 25.

If the width of the wiring 26 at the connection portion with the plug 37 is formed to be smaller than the width of the plug 37, the area of the upper surface of the main wiring layer 24 becomes smaller.
Therefore, the plug 3 formed inside the connection hole 34
The portion of the main wiring layer 24, which is easily oxidized, is reduced at the portion connected to the conductive layer 7, and the side wall wiring layer 25 provides stable conduction. Moreover, when the plug 37 is also connected to the side of the side wall wiring layer 25, more stable conduction is obtained by increasing the contact area between the side wall wiring layer 25 and the plug 37.

Further, since the portion of the wiring 26 to which the plug 37 (connection hole 34) is connected is formed to have a width smaller than that of the wiring 26 other than that portion, an increase in the resistance of the wiring 26 other than the connection portion is suppressed. Is done.

Next, an example of an embodiment relating to a first method for manufacturing a multilayer wiring according to the present invention will be described as a first embodiment with reference to manufacturing process diagrams shown in FIGS. 3 and 4
Here, as an example, a multilayer wiring having a stacked contact structure is shown. 3 and 4, the same components as those shown in FIG. 1 are denoted by the same reference numerals.

First, as shown in FIG. 3A, after a predetermined element is formed on a semiconductor substrate 11, a boron phosphorus silicate glass (BPSG) film 13 is formed to a thickness of, for example, 0.8 μm.
After the BPSG is deposited to a thickness of, for example, a CVD method, the BPSG is subjected to a reflow process by predetermined annealing. Thereafter, the silicon nitride (SiN) film 14 is
The insulating film 12 is formed by being deposited to a thickness of 0 nm.

Next, a connection hole 15 is opened in the insulating film 12 by a usual lithography technique and a reactive ion etching (hereinafter referred to as RIE) technique. At this time, RI
In E, etching is performed by sequentially switching the etching conditions for the silicon nitride film 14 and the BPSG film 13.

The etching conditions for the silicon nitride film 14 are set as follows as an example. The etching gas is trifluoromethane (CHF ₃ ); flow rate =
75 sccm (hereinafter, sccm indicates a volume flow rate (cm ³ / min) in a standard state), oxygen (O ₂ ); flow rate =
The RF power was 600 W, the pressure of the etching atmosphere was 5 Pa, and the substrate temperature was 20 ° C.

The etching conditions for the BPSG film 13 are set as follows as an example. As the etching gas, trifluoromethane (CHF ₃ ); flow rate = 75 sccm and oxygen (O ₂ ); flow rate = 7 sccm are used, RF power is 1.2 kW, etching atmosphere pressure is 7 Pa, and substrate temperature is 20 ° C. did.

Next, after a base film 16 made of a titanium nitride film is formed on the inner wall surface of the connection hole 15, a conductive material 17 made of tungsten is buried in the connection hole 15 by an ordinary blanket tungsten formation process. Plug 18 made of base film 16 and conductive material 17
To form Thus, the substrate 10 is configured.

Next, as shown in FIG. 3B, an insulating film (first insulating film) 21 covering the plug 18 is formed on the insulating film 12 by, for example, tetraethoxysilane (TEO).
S) Silicon oxide is deposited to a thickness of, for example, 500 nm by plasma enhancement chemical vapor deposition (hereinafter referred to as CVD) using [Si (OC ₂ H ₅ ) ₄ ].

Subsequently, as shown in FIG. 3C, a groove 22 passing over the plug 18 is formed in the insulating film 21 by ordinary lithography and RIE.
Here, the silicon nitride film 14 of the insulating film 12 serves as an etching stopper at the time of etching for processing the groove 22. The groove 22 is formed so that a portion on the plug 18 (a portion where a connection hole is formed in a later step) is thinner than other portions. For example, the width of only the portion of the groove 22 connected to the upper layer wiring is, for example, 0.2 μm, and the width of the other portions is, for example, 0.4 μm.

Next, as shown in FIGS. 3 (4) and 4 (5), a high-pressure reflow process is performed. The high-pressure reflow process includes, for example, a sputter etching step, a step of forming a titanium film and a titanium nitride film, a step of forming a conductive layer made of Al—Cu, and a step of burying the conductive layer. First, after performing sputter etching, a base film 23 including at least a conductive nitride film is formed on the inner wall of the groove 22 by stacking, for example, a titanium (Ti) film and a titanium nitride (TiN) film. Next, the groove 22 is formed on the insulating film 21.
A conductive layer 27 such as Al-Cu is formed to fill the inside, and high-pressure reflow is performed.

The high-pressure reflow process conditions were set as follows as an example. First, an example of the process conditions of the sputter etching (here, argon sputter etching) step will be described below. The process gas used was argon (Ar); the flow rate was 100 sccm, the applied voltage was 1 kV, the pressure of the etching atmosphere was 0.4 Pa, the substrate temperature was 400 ° C., and the etching amount was 3 in terms of a silicon oxide film.
It was set to 0 nm.

The conditions for forming the titanium film were set as follows as an example. Argon (Ar); flow rate = 100 sccm was used as the DC process gas, and the power was 6
kW, the pressure of the film formation atmosphere is 0.4 Pa, and the film formation temperature is 40
0 ° C.

The conditions for forming the titanium nitride film were set as follows as an example. Argon (A
r); flow rate = 20 sccm and nitrogen (N ₂ ); flow rate = 70
The DC power was 12 kW, the pressure of the film formation atmosphere was 0.4 Pa, and the film formation temperature was 400 ° C.

Aluminum of conductive layer 27 is 0.5%
The conditions for forming the copper (Al-0.5% Cu) film were set as follows as an example. Argon (A
r); flow rate = 100 sccm, DC power is 15
kW, the pressure of the film formation atmosphere is 0.4 Pa, and the film formation temperature is 40
0 ° C.

The high-pressure reflow conditions were set as follows, for example. Argon (A
r), the pressure of the reflow atmosphere was 70 MPa, and the reflow time was 1 minute.

Thereafter, for example, by a normal CMP process,
Conductive layer 27 remaining on first insulating film 21 and underlying film 2
3 is removed, and as shown in FIG. 4 (5), a wiring 26 is formed in the groove 22 by the main wiring layer 24 made of the conductive layer 27 and the side wall wiring layer 25 made of the base film 23.

Next, as shown in FIG. 4 (6), an insulating film (second insulating film) 31 covering the wiring 26 on the insulating film 21.
To form The insulating film 31 is formed, for example, by depositing a silicon oxide film 32 to a thickness of, for example, 0.8 μm by plasma enhancement CVD, and subsequently depositing the silicon nitride film 3.
3 is formed to a thickness of, for example, 50 nm.

Next, normal lithography technology and RIE
A connection hole 34 communicating with a narrow portion of the wiring 26 is formed in the insulating film 31 by a technique. At this time, the connection hole 3
The etching for forming 4 is preferably performed so as to open to the side wall portion of the wiring 26 by over-etching.

Thereafter, a series of high-pressure reflow processes similar to those described above are performed. First, after performing sputter etching, as shown in FIG. 4 (7), the base film 3 including at least a conductive nitride film is formed on the inner wall of the connection hole 34.
5, for example, a titanium (Ti) film and titanium nitride (TiN)
A film is formed by lamination. Next, after forming an embedded conductive layer 36 such as Al-Cu on the insulating film 31,
The buried conductive layer 36 is buried in the connection hole 34 by performing high-pressure reflow. Then, by the CMP process,
The buried conductive layer 36 and the underlying film 35 remaining on the insulating film 31 are removed, and a plug 37 is formed with the buried conductive layer 36 and the underlying film 35 inside the connection hole 34. This drawing shows a state after the plug 37 is formed. In addition,
As for the material for filling the connection holes 34 in the side wall portions of the wiring 26, only the base film 35 is shown in FIG.
5 and the buried conductive layer 36.

Thereafter, the plug 3 is formed on the insulating film 31.
7 is formed, and a groove 42 is formed in the insulating film 41.
To form The groove 42 is formed such that a portion connected to the plug 37 is thinner than other portions. Then, a base film 43 in which a titanium film and a titanium nitride film are stacked is formed on the inner wall of the groove 42, and a main wiring layer 44 made of Al—Cu is embedded in the groove 42. Then, the insulating film 4 is formed by CMP.
The upper wiring 45 composed of the main wiring layer 44 and the base film 43 is formed inside the groove 42 by removing the excess main wiring layer 44 and the base film 43 on the upper surface of the substrate 1. Such a process may be repeated.

In the first method of manufacturing the multilayer wiring, the substrate 1
After a base film 23 including at least a conductive nitride film is formed on the inner wall of the groove 22 formed in the insulating film (first insulating film) 21 on the substrate 0, the conductive layer 27 is buried in the groove 22.
Is formed, the wiring 26 formed in the groove 22 is formed.
Is composed of a main wiring layer 24 made of a conductive layer 27 and a side wall wiring layer 25 made of a base film 23 including a conductive nitride film formed on the side wall thereof. Therefore, the sidewall conductive layer 25 made of the base film 23 including the conductive nitride film can be easily replaced with the main wiring layer 24 without performing a complicated process.
Can be formed on the side wall.

After the second insulating film 31 is formed, the connection hole 34 leading to the wiring 26 is formed.
At the bottom of the wiring 4, the upper part of the wiring 26 composed of the side wall wiring layer 25 together with the main wiring layer 24 is exposed. Thereafter, since a conductive plug 37 is formed inside the connection hole 34, even if an oxide film is formed on the surface of the main wiring layer 24, the plug 37 can be stably formed by the nitride film of the side wall wiring layer 25. It will be connected to the wiring. Therefore, the connection resistance is more stable than the contact structure in which the plug bottom surface contacts only the aluminum surface of the lower wiring.

The groove 2 at the portion where the connection hole 34 is connected
2 is formed to have a width smaller than the width of the connection hole 34,
The area of the upper surface of the main wiring layer 24 is reduced. Therefore, the connection portion with the plug 37 formed inside the connection hole 34 is
The portion of the main wiring layer 24 that is easily oxidized is reduced, and the conductive nitride film forming the side wall wiring layer 25 provides stable conduction. In the manufacturing method in which the connection hole 34 is formed so as to reach the side of the wiring 26, more stable conduction is obtained by increasing the contact area between the nitride film of the side wall wiring layer 25 and the plug 37. Further, the connection hole 34
Is formed to have a width smaller than that of the groove 22 other than that part, the increase in the resistance of the wiring 26 other than the connection part is suppressed.

Next, an example of an embodiment according to a second method for manufacturing a multilayer wiring according to the present invention will be described as a second embodiment with reference to a manufacturing process diagram of FIG. In FIG. 5, the same components as those shown in FIG. 2 are denoted by the same reference numerals.

As shown in FIG. 5A, after a predetermined element is formed on the semiconductor substrate 11 by the same process as in the first embodiment, a BPSG film 13 and a silicon nitride film 14 are deposited. To form an insulating film 12. Thus, the substrate 10 is configured. Next, an insulating film (first insulating film) 21 is formed on the insulating film 12 by, for example,
It is formed by depositing to a thickness of nm. Subsequently, the insulating film 21 is formed by ordinary lithography and RIE techniques.
First, a first groove 28 (corresponding to the groove 22 of the first embodiment) is processed. At this time, a portion of the first groove 28 where a connection hole is formed in a later step is formed thinner than other portions. For example,
The width of only the portion of the first groove 28 connected to the upper layer wiring is, for example, 0.2 μm, and the width of the other portions is, for example,
μm.

Next, a high-pressure reflow process is performed. First, after performing sputter etching, a base film 23 including at least a conductive nitride film is formed on the inner wall of the first groove 28.
For example, it is formed by stacking a titanium (Ti) film and a titanium nitride (TiN) film. Next, a conductive layer 27 such as Al-Cu is formed on the insulating film 21 so as to fill the first groove 28, and high-pressure reflow is performed. Conditions for forming each film,
The high-pressure reflow conditions are the same as in the first embodiment.

Then, for example, by a normal CMP process,
Conductive layer 27 remaining on first insulating film 21 and underlying film 2
3 is removed, and a wiring 26 is formed in the first groove 28 by the main wiring layer 24 made of the conductive layer 27 and the side wall wiring layer 25 made of the base film 23.

A connection hole (not shown) may be formed in the insulating film 21 so as to connect to the thick portion of the wiring 26, and a plug may be formed in the connection hole.

Next, as shown in FIG. 5B, an insulating film (second insulating film) 31 covering the wiring 26 on the insulating film 21.
To form The insulating film 31 is formed, for example, by depositing a silicon oxide film 32 to a thickness of, for example, 0.8 μm by plasma enhancement CVD, and subsequently depositing the silicon nitride film 3.
3 is formed to a thickness of, for example, 50 nm. Furthermore, a silicon oxide film is deposited to a thickness of, for example, 0.5 μm by plasma enhancement CVD to form an insulating film (third layer).
An insulating film 41 is formed. As described above, it is desirable that the insulating film (third insulating film) 41 be formed of a material that can be selectively etched with respect to the insulating film (second insulating film) 31.

Subsequently, the conventional lithography technique and R
A second groove 46 in which an upper wiring is to be formed is formed in the insulating film 41 by the IE technique. At this time, the width of the second groove 46 is set to 0.2 μm for the portion connected to the upper layer wiring, and set to 0.4 μm for the other portions. In addition, in the above etching, the insulating film 41 is selectively etched with respect to the insulating film 31, and thus the etching stops at the surface of the insulating film 31.

Next, as shown in FIG. 5C, a connection hole 34 communicating from the bottom of the second groove 46 to a narrow portion of the wiring 26 is formed in the insulating film 31 by the usual lithography technique and RIE technique. Form. At this time, the connection hole 3
It is preferable that the etching of No. 4 is performed so as to open to the side wall of the wiring 26 by over-etching.

Thereafter, a series of high-pressure reflow processes similar to those described above are performed. First, after performing sputter etching, as shown in FIG. 5D, a base film 35 including at least a conductive nitride film is formed on the inner walls of the connection holes 34 and the second grooves 46 by, for example, titanium (Ti). It is formed by laminating a film and a titanium nitride (TiN) film. Next, a buried conductive layer 3 such as Al-Cu is formed on the insulating film 41.
After the formation of 8, high-pressure reflow is performed to bury the buried conductive layer 38 in the second groove 46 and the connection hole 34. Then, the embedded conductive layer 38 and the underlying film 35 remaining on the insulating film 41 are removed by a CMP process, and the embedded conductive layer 36 and the underlying film 3 are left inside the connection hole 34.
5 to form a plug 37, and buried conductive layer 36 and base film 35 in second trench 46 to form upper layer wiring 45.
To form This drawing shows a state after the upper wiring 45 is formed. The connection hole 34 in the side wall of the wiring 26
In the drawing, only the base film 35 is shown as a material for embedding, but the material for embedding may be embedded with the base film 35 and the buried conductive layer 38.

In the second method of manufacturing a multilayer wiring, the substrate 1
First groove 28 formed in insulating film (first insulating film) 21 on zero
After a base film 23 including at least a conductive nitride film is formed on the inner wall of the first trench 28, a conductive layer 27 is formed so as to fill the inside of the first groove 28, and an extra conductive layer 27 and a base film on the insulating film 21 are formed. 23 is removed, the wiring 26 formed in the first groove 28 becomes the main wiring layer 24 made of the conductive layer 27.
And a sidewall conductive layer 25 formed of a base film 23 including a conductive nitride film formed on the sidewall thereof. Therefore, it is possible to easily form the side wall conductive layer 25 including the base film 23 including the conductive nitride film on the side wall of the main wiring layer 24 without performing a complicated process.

After forming the insulating film (second insulating film) 31 and the insulating film (third insulating film) 41, a second groove 46 in which an upper layer wiring is provided is formed in the insulating film 41, and the second groove 46 is formed in the insulating film 31. Since the connection hole 34 communicating with the wiring 26 is formed from the bottom of the second groove 46, the main wiring layer 24 is formed at the bottom of the connection hole 34.
The upper part of the side wall wiring layer 25 formed on the side wall is exposed. Thereafter, the buried conductive layer 38 is formed inside the second groove 46 and the inside of the connection hole 34. Therefore, even if an oxide film is formed on the surface of the main wiring layer 24, the buried conductive layer 38 Connect to the conductive nitride film of layer 25. Therefore, the buried conductive layer 38 is stably connected to the wiring 26.

Further, it is possible to adopt a so-called dual damascene process in which the step of forming the upper wiring in the second groove 46 and the step of forming the plug 37 in the connection hole 34 are performed in the same step. Is reduced.

The first portion of the portion to which the connection hole 34 is connected
Since the width of the groove 28 is smaller than the width of the connection hole 34, the area of the upper surface of the main wiring layer 24 is reduced. for that reason,
In the connection portion with the buried conductive layer 38 buried in the connection hole 34, the portion of the main wiring layer 24 that is easily oxidized is reduced, and the conductive nitride film of the side wall wiring layer 25 provides stable conduction. In the manufacturing method in which the connection hole 34 is formed so as to reach the side of the wiring 26 (sidewall wiring layer 25),
By increasing the contact area between the buried conductive layer 38 and the nitride film of the side wall wiring layer 25, more stable conduction can be obtained. Further, since the portion of the first groove 28 to which the connection hole 34 is connected is formed to have a width smaller than that of the first groove 28 other than the portion, an increase in the resistance of the wiring 26 other than the connection portion is suppressed.

The present invention is not limited to the above embodiments. For example, instead of titanium nitride, titanium tungsten (TiW), tungsten silicide (WSi),
It is also possible to use tungsten (W), tantalum (Ta), or the like. In addition to aluminum copper alloy, aluminum silicon copper alloy, aluminum germanium alloy,
It is also possible to use an aluminum scandium alloy, pure aluminum, or the like. The embedding of the aluminum alloy can be performed by ordinary reflow treatment, high-temperature sputtering, or the like, in addition to the high-pressure reflow method. Further, a film of titanium nitride or an aluminum-based metal material may be formed by a CVD method.

[0065]

As described above, according to the multilayer wiring of the present invention, the wiring is constituted by the main wiring layer and the side wall wiring layer including the conductive nitride film provided on the side wall thereof.
Even if the surface of the main wiring layer is oxidized to form an insulating metal oxide film, the conductive plug formed in the wiring and the connection hole by the conductive nitride film of the sidewall wiring layer that is not oxidized, It is possible to obtain stable conduction. Thus, even if the main wiring layer is made of a metal material that is easily oxidized, for example, an aluminum-based metal, an increase in connection resistance can be suppressed.

According to the first method of manufacturing the multilayer wiring of the present invention, the side wall wiring layer made of the base film including the conductive nitride film is formed on the side wall of the main wiring layer constituting the wiring. Even if an oxide film is formed on the surface of the main wiring layer, no oxide film is formed on the conductive nitride film of the side wall wiring layer. Therefore, stable conduction between the wiring and the plug can be obtained by the conductive nitride film. Therefore, an increase in the connection resistance between the wiring and the plug can be suppressed.

According to the second method of manufacturing the multilayer wiring of the present invention, the side wall wiring layer made of the base film including the conductive nitride film is formed on the side wall of the main wiring layer constituting the wiring. Even if an oxide film is formed on the surface of the main wiring layer, no oxide film is formed on the conductive nitride film of the side wall wiring layer. Therefore, stable conduction between the wiring and the plug can be obtained by the conductive nitride film. Therefore, an increase in the connection resistance between the wiring and the plug can be suppressed. In addition, since the step of forming the upper layer wiring in the second groove and the step of forming the plug in the connection hole can be performed in the same step, the number of steps can be reduced.

[Brief description of the drawings]

FIG. 1 is a schematic configuration diagram showing an example of a first embodiment relating to a multilayer wiring of the present invention.

FIG. 2 is a schematic configuration diagram of an example of a second embodiment relating to multilayer wiring.

FIG. 3 is a manufacturing process diagram (part 1) of an example of an embodiment according to a first method for manufacturing a multilayer wiring of the present invention;

FIG. 4 is a diagram (part 2) illustrating an example of an embodiment of a first method of manufacturing a multilayer wiring according to the present invention;

FIG. 5 is a manufacturing process diagram of an example of an embodiment according to a second method for manufacturing a multilayer wiring of the present invention.

[Explanation of symbols]

10: substrate, 24: main wiring layer, 25: side wall wiring layer, 26
... wiring, 31 ... insulating film, 34 ... connection hole, 37 ... plug

Claims (9)

[Claims] 1. A wiring formed on a substrate, a connection hole formed in an insulating film covering the wiring and communicating with the wiring, and a conductive plug formed in the connection hole. Wherein the wiring comprises a main wiring layer and a side wall wiring layer which includes at least a conductive nitride film and is provided on a side wall of the main wiring layer; A multilayer wiring connected to at least an upper part of the side wall wiring layer. 2. The multi-layer wiring according to claim 1, wherein the wiring is formed such that a connection portion with the plug is narrower than a width of the plug, and the plug is formed on a side portion of the side wall wiring layer. Characterized by the fact that they are also connected. 3. The multilayer wiring according to claim 2, wherein the wiring is formed so that a wiring width at a connection portion with the plug is smaller than a wiring width at other portions. . 4. A step of forming a groove for providing a wiring in a first insulating film on a substrate; and forming a base film including at least a conductive nitride film on an inner wall of the groove, and then forming an inside of the groove. Forming a conductive layer in a buried state, removing the conductive layer and the base film remaining on the first insulating film, and forming a main wiring layer made of the conductive layer inside the groove; Forming a wiring with a sidewall wiring layer made of a base film; forming a second insulating film covering the wiring on the first insulating film; forming a connection hole communicating with the wiring in the second insulating film. Forming a conductive plug inside the connection hole. 5. The method of manufacturing a multilayer wiring according to claim 4, wherein the groove at a portion where the connection hole is connected is formed to have a width smaller than the width of the connection hole. Production method. 6. The method for manufacturing a multilayer wiring according to claim 5, wherein the groove at a portion to which the connection hole is connected is formed to have a smaller width than the groove other than the portion to which the connection hole is connected. A method for manufacturing a multilayer wiring, comprising: 7. A step of forming a first groove for providing a wiring in a first insulating film on a substrate, and forming a base film including at least a conductive nitride film on an inner wall of the first groove. Forming a conductive layer so as to bury the inside of the first groove; removing the conductive layer and the base film remaining on the first insulating film to form the conductive layer inside the first groove; Forming a wiring with a main wiring layer made of a layer and a side wall wiring layer made of the base film; forming a second insulating film covering the wiring on the first insulating film; Forming a third insulating film thereon; forming a second groove for providing an upper layer wiring in the third insulating film; connecting the second insulating film to the wiring from the bottom of the second groove. Forming a connection hole, and filling a conductive layer in the inside of the second groove and the inside of the connection hole. Method for manufacturing a multilayer wiring which is characterized in that a step of forming. 8. The method for manufacturing a multilayer wiring according to claim 7, wherein the first groove in a portion to which the connection hole is connected is formed to have a width smaller than the width of the connection hole. Wiring manufacturing method. 9. The method for manufacturing a multilayer wiring according to claim 8, wherein the first groove at a portion to which the connection hole is connected is narrower than the first groove other than the portion to which the connection hole is connected. Forming a multilayer wiring.