JPH1187331A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPH1187331A JPH1187331A JP23572897A JP23572897A JPH1187331A JP H1187331 A JPH1187331 A JP H1187331A JP 23572897 A JP23572897 A JP 23572897A JP 23572897 A JP23572897 A JP 23572897A JP H1187331 A JPH1187331 A JP H1187331A
- Authority
- JP
- Japan
- Prior art keywords
- film
- passivation film
- etching
- metal conductor
- inorganic passivation
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 29
- 238000004519 manufacturing process Methods 0.000 title claims description 9
- 238000002161 passivation Methods 0.000 claims abstract description 63
- 229910052751 metal Inorganic materials 0.000 claims abstract description 41
- 239000002184 metal Substances 0.000 claims abstract description 41
- 239000007789 gas Substances 0.000 claims abstract description 33
- 238000000034 method Methods 0.000 claims abstract description 26
- YCKRFDGAMUMZLT-UHFFFAOYSA-N Fluorine atom Chemical compound [F] YCKRFDGAMUMZLT-UHFFFAOYSA-N 0.000 claims abstract description 25
- 238000005530 etching Methods 0.000 claims abstract description 25
- 229910052731 fluorine Inorganic materials 0.000 claims abstract description 25
- 239000011737 fluorine Substances 0.000 claims abstract description 25
- 239000000758 substrate Substances 0.000 claims abstract description 7
- 238000001020 plasma etching Methods 0.000 claims abstract description 5
- 239000004020 conductor Substances 0.000 claims description 35
- 238000000206 photolithography Methods 0.000 claims description 5
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 4
- 239000001301 oxygen Substances 0.000 claims description 4
- 229910052760 oxygen Inorganic materials 0.000 claims description 4
- MYMOFIZGZYHOMD-UHFFFAOYSA-N Dioxygen Chemical compound O=O MYMOFIZGZYHOMD-UHFFFAOYSA-N 0.000 abstract description 10
- 229910001882 dioxygen Inorganic materials 0.000 abstract description 10
- 238000005260 corrosion Methods 0.000 abstract description 3
- 230000007797 corrosion Effects 0.000 abstract description 3
- 239000000356 contaminant Substances 0.000 abstract 2
- 238000005520 cutting process Methods 0.000 description 17
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 7
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 6
- 229920001721 polyimide Polymers 0.000 description 6
- 230000000052 comparative effect Effects 0.000 description 4
- 238000006243 chemical reaction Methods 0.000 description 3
- 230000007547 defect Effects 0.000 description 3
- 239000000203 mixture Substances 0.000 description 3
- 239000004642 Polyimide Substances 0.000 description 2
- 238000011109 contamination Methods 0.000 description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 2
- 238000000227 grinding Methods 0.000 description 2
- 230000003647 oxidation Effects 0.000 description 2
- 238000007254 oxidation reaction Methods 0.000 description 2
- 229910000838 Al alloy Inorganic materials 0.000 description 1
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 230000002950 deficient Effects 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 239000003292 glue Substances 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 230000002209 hydrophobic effect Effects 0.000 description 1
- 239000012299 nitrogen atmosphere Substances 0.000 description 1
- 239000002243 precursor Substances 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 230000003746 surface roughness Effects 0.000 description 1
- 238000004506 ultrasonic cleaning Methods 0.000 description 1
- 238000005406 washing Methods 0.000 description 1
Landscapes
- Drying Of Semiconductors (AREA)
- Formation Of Insulating Films (AREA)
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】この発明は、有機パシベーシ
ョン膜をエッチングのマスクとして用いて無機パシベー
ション膜をエッチングする半導体装置の製造方法に関す
るものである。[0001] 1. Field of the Invention [0002] The present invention relates to a method for manufacturing a semiconductor device in which an inorganic passivation film is etched using an organic passivation film as an etching mask.
【０００２】[0002]
【従来の技術】半導体装置内部の回路素子を応力、水
分、α線等から保護するために金属導体膜で形成された
配線の上部に無機パシベーション膜を、さらにその無機
パシベーション膜の上にポリイミド等の有機パシベーシ
ョン膜を設けることは一般的である。この場合、一部の
パシベーション膜をエッチングして半導体装置内部の回
路と外部の間で電気信号を伝達するために金属導体膜
（電極）を表出させることが必要である。所定の形状に
形成し硬化処理を行った感光性の有機パシベーション膜
をマスクとして下層の無機パシベーション膜をプラズマ
エッチングし下層のＡｌパッド等の金属導体膜を表出さ
せる方法（方法Ｂ）は工程省略の方法としてよく用いら
れている。この場合、下地の金属導体膜をエッチングす
ることなく無機パシベーション膜のみをエッチングする
必要があるため、ＣＦ4 あるいはＣＨＦ 3 等のフッ素系
ガスをエッチングガスとして用いる。2. Description of the Related Art A circuit element in a semiconductor device is exposed to stress and water.
Formed of metal conductor film to protect from
An inorganic passivation film on top of the wiring
Organic passivation such as polyimide on passivation film
It is common to provide a coating film. In this case, some
Etch the passivation film to recover the circuit inside the semiconductor device.
Metallic conductive film for transmitting electrical signals between road and outside
It is necessary to expose (electrode). To the prescribed shape
Photosensitive organic passivation film formed and cured
Plasma of the lower inorganic passivation film using
Etching to expose the underlying metal conductor film such as Al pad
(Method B) is often used as a method for omitting steps.
Have been. In this case, the underlying metal conductor film is etched.
Only the inorganic passivation film without etching
CFFourOr CHF ThreeSuch as fluorine
A gas is used as an etching gas.
【０００３】無機パシベーション膜をあらかじめフォト
リソグラフィ工程とプラズマエッチング工程で除去した
後に有機パシベーション膜を形成する方法（方法Ｃ）と
比較すると方法Ｂは大幅に工程数を省略することが出来
るため非常に有効な方法である。方法Ｂと方法Ｃの工程
を表１に示す。[0003] Compared with the method of forming an organic passivation film after removing the inorganic passivation film by a photolithography step and a plasma etching step (method C), the method B is very effective because the number of steps can be greatly reduced. It is a way. Table 1 shows the steps of Method B and Method C.
【０００４】[0004]
【表１】 [Table 1]
【０００５】[0005]
【発明が解決しようとする課題】しかしながら、従来の
方法Ｂではエッチングの次工程のウエハの部品加工及び
組立工程すなわち所定の厚みに裏面を研削するあるいは
所定の形状にウエハを切削する等の工程で、露出してい
る金属導体膜の表面が腐食するという問題があった。ま
た、ウエハの切削屑が金属導体膜上に付着し電気信号を
半導体装置内部と外部で伝達するワイヤボンドが金属導
体膜上に付着しないという不都合、不良が生じることが
わかった。かかる不都合の発生原因は明らかではない
が、エッチング処理の際に用いたフッ素系プラズマガス
が半導体装置表面上に残留する事で以下の様な機構で不
具合が発生していると考えられる。However, in the conventional method B, in the part processing and assembling step of the wafer subsequent to the etching, that is, in the step of grinding the back surface to a predetermined thickness or cutting the wafer into a predetermined shape, etc. In addition, there is a problem that the exposed surface of the metal conductor film is corroded. Further, it has been found that inconveniences and defects occur in that cutting chips from the wafer adhere to the metal conductor film and wire bonds for transmitting electric signals between the inside and the outside of the semiconductor device do not adhere to the metal conductor film. Although the cause of the inconvenience is not clear, it is considered that the following mechanism causes a problem due to the fluorine-based plasma gas used during the etching process remaining on the surface of the semiconductor device.
【０００６】（１）ウエハの加工の際に使用する水の中
で残留フッ素系ガスがフッ酸に変化し金属導体膜上で電
池反応を起こし金属導体膜を腐食させる。 （２）腐食した金属導体膜はその表面粗さが粗くなり切
削屑が表面に容易に付着する。 （３）ウエハを切削する際には水流を用いて切削屑の除
去を行うが、残留フッ素系ガスによりウエハ表面が疎水
性となるため切削屑を含んだ水が局所的に凝集しやす
い。凝集した水がウエハ上に残留し最終的に乾燥した後
に切削屑が局所的に凝集する。(1) Residual fluorine-based gas changes into hydrofluoric acid in water used for processing a wafer, causing a battery reaction on the metal conductor film to corrode the metal conductor film. (2) The surface roughness of the corroded metal conductor film becomes coarse, and cutting chips easily adhere to the surface. (3) When cutting the wafer, the cutting chips are removed by using a water flow. However, the water containing the cutting chips tends to locally aggregate because the wafer surface becomes hydrophobic due to the residual fluorine-based gas. After the coagulated water remains on the wafer and finally drys, the cuttings locally coagulate.
【０００７】したがって、この発明の目的は、かかる問
題の検討並びに不都合に鑑みてなされたもので、残留フ
ッ素系ガスを除去し、露出している金属導体膜の腐食、
汚れおよびワイヤボンド不良などを防止することができ
る半導体装置の製造方法を提供することである。SUMMARY OF THE INVENTION Accordingly, an object of the present invention has been made in consideration of the above problems and in view of the inconvenience thereof.
An object of the present invention is to provide a method for manufacturing a semiconductor device that can prevent contamination and defective wire bonding.
【０００８】[0008]
【課題を解決するための手段】上記課題を解決するため
にこの発明の半導体装置の製造方法は、半導体基板上に
所定の形状に形成された金属導体膜上に、無機パシベー
ション膜を形成した後、感光性の有機パシベーション膜
をフォトリソグラフィ工程で所定の形状に形成したもの
を硬化し、硬化後の有機パシベーション膜をマスクとし
て下層の無機パシベーション膜をプラズマエッチングを
用いて除去し下層の金属導体膜を表出させる工程で、フ
ッ素系ガスで無機パシベーション膜を除去した後、酸素
（Ｏ2 ）ガスプラズマのみでエッチング処理を行うこと
を特徴とするものである。In order to solve the above-mentioned problems, a method of manufacturing a semiconductor device according to the present invention comprises a method of forming an inorganic passivation film on a metal conductor film formed in a predetermined shape on a semiconductor substrate. A photosensitive organic passivation film formed into a predetermined shape by a photolithography process is cured, and the cured inorganic passivation film is used as a mask to remove the lower inorganic passivation film using plasma etching to remove the lower metal conductor film. In the step of exposing, the inorganic passivation film is removed with a fluorine-based gas, and then etching is performed using only oxygen (O 2 ) gas plasma.
【０００９】このように、フッ素系ガスで無機パシベー
ション膜を除去した後、酸素ガスプラズマのみでエッチ
ング処理を行うので、金属導体膜上および有機パシベー
ション膜上に吸着している残留フッ素系ガスは酸化され
ることで除去される。そして、表面に吸着したフッ素系
ガスが除去されることにより、エッチングの後のウエハ
を所定の形状に切削する工程で、金属導体膜を腐食させ
ることはなく、これに伴い切削屑が金属導体膜表面に付
着して汚れることもないのでワイヤボンドを金属導体膜
に確実に接着させることができる。As described above, after the inorganic passivation film is removed with the fluorine-based gas, the etching process is performed only with the oxygen gas plasma. Therefore, the residual fluorine-based gas adsorbed on the metal conductor film and the organic passivation film is oxidized. It is removed by being done. By removing the fluorine-based gas adsorbed on the surface, the metal conductor film is not corroded in the step of cutting the wafer after etching into a predetermined shape, and accordingly, cutting chips are generated. Since it does not adhere to the surface and is not stained, the wire bond can be securely bonded to the metal conductor film.
【００１０】また、酸素ガスプラズマでエッチングを行
うと、無機パシベーション膜及び金属導体膜についてエ
ッチングされない。一方、有機パシベーション膜は酸素
ガスプラズマで酸化されてエッチングされるが、フッ素
系ガスを除去するのに必要な時間範囲内ではパシベーシ
ョンの膜厚が０．０１μｍ〜０．１μｍ減少する程度で
あり、パシベーションとしての機能には大きな影響を及
ぼさない。When etching is performed by using oxygen gas plasma, the inorganic passivation film and the metal conductor film are not etched. On the other hand, the organic passivation film is oxidized and etched by the oxygen gas plasma, but the film thickness of the passivation is reduced by about 0.01 μm to 0.1 μm within a time range necessary for removing the fluorine-based gas, Does not significantly affect the function as passivation.
【００１１】[0011]
【発明の実施の形態】この発明の実施の形態の半導体装
置の製造方法を図１〜図３に基づいて説明する。図１は
この発明の実施の形態で有機パシベーションをマスクと
して無機パシベーション膜をエッチングした状態の断面
図である。図２はこの発明の実施の形態で金属導体膜上
に無機パシベーション膜を形成した状態の断面図、図３
はこの発明の実施の形態で無機パシベーション膜上に有
機パシベーション膜を所定の形状に形成した状態の断面
図を示す。図１において、１は感光性の有機パシベーシ
ョン膜、２はシリコンナイトライド（Ｓｉ3 Ｎ4)膜等か
らなる無機パシベーション膜、３は半導体基板、４はア
ルミニウム（Ａｌ）あるいはアルミニウム合金膜等から
なる金属導体膜である。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A method for manufacturing a semiconductor device according to an embodiment of the present invention will be described with reference to FIGS. FIG. 1 is a cross-sectional view of an embodiment of the present invention in which an inorganic passivation film is etched using organic passivation as a mask. FIG. 2 is a sectional view showing a state in which an inorganic passivation film is formed on a metal conductor film according to the embodiment of the present invention.
FIG. 1 is a sectional view showing a state in which an organic passivation film is formed in a predetermined shape on an inorganic passivation film in the embodiment of the present invention. In FIG. 1, 1 is a photosensitive organic passivation film, 2 is an inorganic passivation film made of a silicon nitride (Si 3 N 4 ) film or the like, 3 is a semiconductor substrate, 4 is an aluminum (Al) or aluminum alloy film or the like. It is a metal conductor film.
【００１２】上記のように構成された半導体装置の製造
方法（方法Ａ）の工程を表２に示す。Table 2 shows the steps of the method for manufacturing a semiconductor device (method A) configured as described above.
【００１３】[0013]
【表２】 [Table 2]
【００１４】すなわち、半導体基板３上に所定の形状に
形成された金属導体膜４上に、無機パシベーション膜２
を形成した後（工程１）、感光性の有機パシベーション
膜１をフォトリソグラフィ工程で所定の形状に形成した
ものを硬化する（工程２〜５）。硬化後の有機パシベー
ション膜１をマスクとして下層の無機パシベーション膜
２をプラズマエッチングを用いて除去し下層の金属導体
膜４を表出させる。このとき、ＣＦ4 あるいはＣＨＦ3
等のフッ素系ガスで無機パシベーション膜２を除去した
後（工程６）、酸素（Ｏ2 ）ガスプラズマのみでエッチ
ング処理を行う（工程７）。That is, the inorganic passivation film 2 is formed on the metal conductor film 4 formed in a predetermined shape on the semiconductor substrate 3.
Is formed (Step 1), the photosensitive organic passivation film 1 formed into a predetermined shape by a photolithography step is cured (Steps 2 to 5). Using the cured organic passivation film 1 as a mask, the lower inorganic passivation film 2 is removed by plasma etching to expose the lower metal conductor film 4. At this time, CF 4 or CHF 3
After removing the inorganic passivation film 2 with a fluorine-based gas such as (Step 6), an etching process is performed only with oxygen (O 2 ) gas plasma (Step 7).
【００１５】つぎに、半導体装置の製造方法の実施例に
ついて説明する。Next, an embodiment of a method of manufacturing a semiconductor device will be described.
【００１６】[0016]
【実施例】図２に示すように、所定の形状に形成された
Ａｌ膜（金属導体膜４）上にＣＶＤで膜厚１μｍのＳｉ
3 Ｎ4 膜（無機パシベーション膜２）を形成する。形成
されたＳｉ3 Ｎ4 膜上に旭化成（株）製の感光性ポリイ
ミド前駆体Ｉ−８３２０Ａを用いて硬化後、膜厚７μｍ
のポリイミド膜（有機パシベーション膜１）を形成す
る。ポリイミド膜をマスクとして用いてＳｉ3 Ｎ4 膜を
エッチングし電気信号を取り出すＡｌパッドを表出させ
るために、フォトリソグラフィ工程でポリイミド膜には
あらかじめ所定の形状の開口部が設けてある。ポリイミ
ド膜は所定のパターンを形成後窒素雰囲気下で硬化処理
を行う。ポリイミド膜を形成した状態の半導体装置の断
面を図３に示す。As shown in FIG. 2, an Al film (metal conductive film 4) formed in a predetermined shape is formed on a Si film having a thickness of 1 μm by CVD.
A 3 N 4 film (inorganic passivation film 2) is formed. After curing using a photosensitive polyimide precursor I-8320A manufactured by Asahi Kasei Corporation on the formed Si 3 N 4 film, the film thickness is 7 μm.
(Organic passivation film 1) is formed. In order to expose an Al pad for extracting an electric signal by etching the Si 3 N 4 film using the polyimide film as a mask, an opening having a predetermined shape is provided in the polyimide film in a photolithography process. After forming a predetermined pattern, the polyimide film is cured in a nitrogen atmosphere. FIG. 3 shows a cross section of the semiconductor device in a state where the polyimide film is formed.
【００１７】この後、上記半導体基板を東京エレクトロ
ン社製ドライエッチング装置ＴＥ−８５００を用いて表
３に示すガス組成１でまず９５秒エッチングを行い、Ｓ
ｉ3Ｎ4 を除去して金属導体膜４のＡｌパッドを表出さ
せる。終了後引き続きドライエッチャー内のガスを排出
し、排出終了後表３に示す組成２のガスを再度チャンバ
内に充填して１０秒間エッチングを行う。エッチング終
了後の半導体装置の断面を図１に示す。拡散工程終了後
のウエハを以下の手順で組立、部品加工工程を行う。Thereafter, the above-mentioned semiconductor substrate was first etched for 95 seconds with a gas composition 1 shown in Table 3 using a dry etching apparatus TE-8500 manufactured by Tokyo Electron Limited,
By removing i 3 N 4 , the Al pad of the metal conductor film 4 is exposed. After the completion, the gas in the dry etcher is continuously discharged, and after the discharge is completed, a gas having a composition 2 shown in Table 3 is filled into the chamber again and etching is performed for 10 seconds. FIG. 1 shows a cross section of the semiconductor device after the etching is completed. The wafer after the diffusion step is assembled and subjected to a part processing step in the following procedure.
【００１８】（１）バックグラインドシートをウエハ主
面に接着した後、ウエハ厚み３００μｍまで裏面を研削
する。 （２）バックグラインドシートを機械的に剥離した後、
ウエハ面に残留したシートの糊成分を純水で洗浄し除去
する。 （３）ダイシング装置を用いてウエハを所定のチップ形
状に切削し半導体チップを作製した。切削時には切削ブ
レードの加熱防止及び切削屑の除去のために純水をブレ
ード、ウエハ表面に供給した。(1) After bonding the back grinding sheet to the main surface of the wafer, the back surface is ground to a wafer thickness of 300 μm. (2) After mechanically peeling the back grind sheet,
The glue component of the sheet remaining on the wafer surface is removed by washing with pure water. (3) The wafer was cut into a predetermined chip shape using a dicing device to produce semiconductor chips. During cutting, pure water was supplied to the blade and the wafer surface to prevent heating of the cutting blade and remove cutting chips.
【００１９】比較例 上記実施例で組成２のガスを用いたエッチングを行わず
に、その他の工程は同じ方法を用いて半導体チップを作
製した。COMPARATIVE EXAMPLE A semiconductor chip was manufactured by using the same method as in the above example, except that the etching using the gas of composition 2 was not performed.
【００２０】[0020]
【表３】 [Table 3]
【００２１】実施例、比較例で作製された工程（２）終
了後のウエハ及び工程（３）の終了後の半導体チップの
５０個のＡｌパッドの表面観察を行った。また工程
（３）終了後の半導体チップについて所定のリードフレ
ームに接着し、３０ｍｍφの金線を用いて前記Ａｌパッ
ド上にワイヤボンドを１０００箇所行った。比較例のウ
エハではパッド表面に数μｍ程度の腐食孔が多数観察さ
れた、チップ状態ではパッド表面に切削屑が付着してい
た。これらの付着物は超音波洗浄でも除去することが出
来なかった。また比較例のワイヤボンドでは金ボールが
Ａｌパッドに接着しない不良が発生した。不良数の結果
を表４に示す。The surface of the 50 Al pads of the wafer after the completion of the step (2) and the semiconductor chip after the completion of the step (3) manufactured in the examples and the comparative examples were observed. Further, the semiconductor chip after the step (3) was bonded to a predetermined lead frame, and 1000 wire bonds were made on the Al pad using a 30 mmφ gold wire. In the wafer of the comparative example, many corrosion holes of about several μm were observed on the pad surface, and in the chip state, cutting chips were attached to the pad surface. These deposits could not be removed by ultrasonic cleaning. In the wire bond of the comparative example, a defect that the gold ball did not adhere to the Al pad occurred. Table 4 shows the results of the number of defects.
【００２２】[0022]
【表４】 [Table 4]
【００２３】以上のようにこの実施の形態によれば、フ
ッ素系ガスで無機パシベーション膜２を除去した後、酸
素ガスプラズマのみでエッチング処理を行うので、金属
導体膜４上および有機パシベーション膜１上に吸着して
いる残留フッ素系ガスは酸化されることで除去される。
そして、表面に吸着したフッ素系ガスが除去されること
により、エッチングの後のウエハを所定の形状に切削す
る工程で、残留フッ素系ガスがフッ酸に変化して金属導
体膜４上で電池反応を起こし金属導体膜４を腐食させる
ということはなく、これに伴い切削屑が金属導体膜４表
面に付着し難い構造となり、金属導体膜４表面の汚れを
防止できるのでワイヤボンドを金属導体膜４に確実に接
着させることができる。As described above, according to this embodiment, after the inorganic passivation film 2 is removed with the fluorine-based gas, the etching process is performed only with the oxygen gas plasma, so that the metal passivation film 4 and the organic passivation film 1 are formed. The residual fluorine-based gas adsorbed on the surface is removed by oxidation.
Then, by removing the fluorine-based gas adsorbed on the surface, in the step of cutting the wafer after etching into a predetermined shape, the residual fluorine-based gas changes to hydrofluoric acid and the battery reaction on the metal conductor film 4 This does not cause the metal conductor film 4 to corrode, so that the cutting chips are hardly attached to the surface of the metal conductor film 4 and the surface of the metal conductor film 4 can be prevented from being stained. Can be securely bonded.
【００２４】また、酸素ガスプラズマでエッチングを行
うと、無機パシベーション膜２及び金属導体膜４につい
てエッチングされない。一方、有機パシベーション膜１
は酸素ガスプラズマで酸化されてエッチングされるが、
フッ素系ガスを除去するのに必要な時間範囲内ではパシ
ベーションの膜厚が０．０１μｍ〜０．１μｍ減少する
程度であり、パシベーションとしての機能には大きな影
響を及ぼさない。When etching is performed using oxygen gas plasma, the inorganic passivation film 2 and the metal conductor film 4 are not etched. On the other hand, the organic passivation film 1
Is oxidized and etched by oxygen gas plasma,
Within the time range required to remove the fluorine-based gas, the passivation film thickness is reduced by about 0.01 μm to 0.1 μm, and does not significantly affect the function as passivation.
【００２５】[0025]
【発明の効果】この発明の半導体装置の製造方法によれ
ば、フッ素系ガスで無機パシベーション膜を除去した
後、酸素ガスプラズマのみでエッチング処理を行うの
で、金属導体膜上および有機パシベーション膜上に吸着
している残留フッ素系ガスは酸化されることで除去され
る。そして、表面に吸着したフッ素系ガスが除去される
ことにより、エッチングの後のウエハを所定の形状に切
削する工程で、残留フッ素系ガスがフッ酸に変化して金
属導体膜上で電池反応を起こし金属導体膜を腐食させる
ということはなく、これに伴い切削屑が金属導体膜表面
に付着し難い構造となり、金属導体膜表面の汚れを防止
できるのでワイヤボンドを金属導体膜に確実に接着させ
ることができる。According to the method for manufacturing a semiconductor device of the present invention, after the inorganic passivation film is removed with a fluorine-based gas, the etching process is performed only with oxygen gas plasma, so that the metal passivation film is formed on the metal conductor film and the organic passivation film. The adsorbed residual fluorine-based gas is removed by oxidation. Then, by removing the fluorine-based gas adsorbed on the surface, in the step of cutting the wafer after etching into a predetermined shape, the residual fluorine-based gas is changed into hydrofluoric acid to cause a battery reaction on the metal conductor film. It does not cause the metal conductor film to erode, and the resulting structure makes it difficult for cutting chips to adhere to the surface of the metal conductor film, and prevents contamination of the surface of the metal conductor film, so that the wire bond is securely bonded to the metal conductor film. be able to.
【００２６】また、酸素ガスプラズマでエッチングを行
うと、無機パシベーション膜及び金属導体膜についてエ
ッチングされない。一方、有機パシベーション膜は酸素
ガスプラズマで酸化されてエッチングされるが、フッ素
系ガスを除去するのに必要な時間範囲内ではパシベーシ
ョンの膜厚が０．０１μｍ〜０．１μｍ減少する程度で
あり、パシベーションとしての機能には大きな影響を及
ぼさない。When etching is performed with oxygen gas plasma, the inorganic passivation film and the metal conductor film are not etched. On the other hand, the organic passivation film is oxidized and etched by the oxygen gas plasma, but the film thickness of the passivation is reduced by about 0.01 μm to 0.1 μm within a time range necessary for removing the fluorine-based gas, Does not significantly affect the function as passivation.
【図１】この発明の実施の形態でフッソ系ガスでのエッ
チング終了後、引き続き酸素プラズマを用いてエッチン
グを行った状態の半導体装置の断面図である。FIG. 1 is a cross-sectional view of a semiconductor device according to an embodiment of the present invention in a state where etching has been performed using oxygen plasma after completion of etching with a fluorine-based gas.
【図２】この発明の実施の形態で金属導体膜上に無機パ
シベーション膜を形成した状態の半導体装置の断面図で
ある。FIG. 2 is a cross-sectional view of the semiconductor device according to the embodiment of the present invention in which an inorganic passivation film is formed on a metal conductor film.
【図３】この発明の実施の形態で無機パシベーション膜
を形成した後、感光性の有機パシベーション膜を所定の
形状に形成し硬化した状態の半導体装置の断面図であ
る。FIG. 3 is a cross-sectional view of a semiconductor device in a state where a photosensitive organic passivation film is formed into a predetermined shape and cured after an inorganic passivation film is formed in the embodiment of the present invention.
１ 有機パシベーション膜 ２ 無機パシベーション膜 ３ 半導体基板 ４ 金属導体膜（Ａｌパッド） Reference Signs List 1 organic passivation film 2 inorganic passivation film 3 semiconductor substrate 4 metal conductor film (Al pad)
Claims (1)
金属導体膜上に、無機パシベーション膜を形成した後、
感光性の有機パシベーション膜をフォトリソグラフィ工
程で所定の形状に形成したものを硬化し、硬化後の前記
有機パシベーション膜をマスクとして下層の前記無機パ
シベーション膜をプラズマエッチングを用いて除去し下
層の前記金属導体膜を表出させる工程で、フッ素系ガス
で無機パシベーション膜を除去した後、酸素（Ｏ2 ）ガ
スプラズマのみでエッチング処理を行うことを特徴とす
る半導体装置の製造方法。1. After forming an inorganic passivation film on a metal conductor film formed in a predetermined shape on a semiconductor substrate,
A photosensitive organic passivation film formed in a predetermined shape by a photolithography process is cured, and the inorganic passivation film of the lower layer is removed by using plasma etching with the cured organic passivation film as a mask, and the lower metal layer is removed. A method of manufacturing a semiconductor device, comprising: removing an inorganic passivation film with a fluorine-based gas in a step of exposing a conductive film; and performing an etching process using only oxygen (O 2 ) gas plasma.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP23572897A JPH1187331A (en) | 1997-09-01 | 1997-09-01 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP23572897A JPH1187331A (en) | 1997-09-01 | 1997-09-01 | Manufacture of semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH1187331A true JPH1187331A (en) | 1999-03-30 |
Family
ID=16990359
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP23572897A Pending JPH1187331A (en) | 1997-09-01 | 1997-09-01 | Manufacture of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH1187331A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2009524217A (en) * | 2006-01-12 | 2009-06-25 | クリー インコーポレイテッド | Edge termination structure for silicon carbide device and method of manufacturing silicon carbide device including edge termination structure |
| US8124480B2 (en) | 2003-01-15 | 2012-02-28 | Cree, Inc. | Methods of fabricating silicon carbide devices incorporating multiple floating guard ring edge terminations |
-
1997
- 1997-09-01 JP JP23572897A patent/JPH1187331A/en active Pending
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8124480B2 (en) | 2003-01-15 | 2012-02-28 | Cree, Inc. | Methods of fabricating silicon carbide devices incorporating multiple floating guard ring edge terminations |
| US9515135B2 (en) | 2003-01-15 | 2016-12-06 | Cree, Inc. | Edge termination structures for silicon carbide devices |
| JP2009524217A (en) * | 2006-01-12 | 2009-06-25 | クリー インコーポレイテッド | Edge termination structure for silicon carbide device and method of manufacturing silicon carbide device including edge termination structure |
| JP2013062518A (en) * | 2006-01-12 | 2013-04-04 | Cree Inc | Edge termination structure for silicon carbide device and manufacturing method of silicon carbide device including edge termination structure |
| KR101493101B1 (en) * | 2006-01-12 | 2015-02-12 | 크리 인코포레이티드 | Edge termination structures for silicon carbide devices and methods of fabricating silicon carbide devices incorporating same |
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